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PSMN063-150D,118 [NXP]

PSMN063-150D - N-channel TrenchMOS SiliconMAX standard level FET DPAK 3-Pin;
PSMN063-150D,118
型号： PSMN063-150D,118
厂家： NXP    NXP
描述：

PSMN063-150D - N-channel TrenchMOS SiliconMAX standard level FET DPAK 3-Pin

开关 脉冲 晶体管
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PSMN063-150D  
N-channel enhancement mode field-effect transistor  
Rev. 03 — 31 October 2001  
Product data  
1. Product profile  
1.1 Description  
N-channel enhancement mode field-effect transistor in a plastic package using  
TrenchMOS1 technology.  
Product availability:  
PSMN063-150D in SOT428 (D-PAK).  
1.2 Features  
■ TrenchMOS™ technology  
■ Fast Switching  
■ Very low on-state resistance  
■ Low thermal resistance  
1.3 Applications  
■ DC to DC converters  
■ Switched mode power supplies  
1.4 Quick reference data  
■ VDS = 150 V  
■ Ptot = 150 W  
■ ID = 29 A  
■ RDSon ≤ 63 mΩ  
2. Pinning information  
Table 1:  
Pinning - SOT428 (D-PAK), simplified outline and symbol  
Pin  
1
Description  
gate (g)  
Simplified outline  
Symbol  
mb  
d
[1]  
2
drain (d)  
3
source (s)  
g
mb  
connected to drain (d)  
s
MBB076  
2
1
3
Top view  
MBK091  
[1] It is not possible to make a connection to pin 2 of the SOT428 package.  
1. TrenchMOS™ is a trademark of Koninklijke Philips Electronics N.V.  
 
 
 
 
 
PSMN063-150D  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
3. Limiting values  
Table 2:  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol Parameter  
Conditions  
Tj = 25 to 175 oC  
Tj = 25 to 175 oC; RGS = 20 kΩ  
Min  
−
Max  
150  
150  
±20  
29  
Unit  
V
VDS  
VDGR  
VGS  
ID  
drain-source voltage (DC)  
drain-gate voltage (DC)  
gate-source voltage (DC)  
drain current (DC)  
−
V
−
V
Tmb = 25 °C; VGS = 10 V;  
−
A
Figure 2 and 3  
T
mb = 100 °C; VGS = 10 V;  
−
−
20  
A
A
Figure 2 and 3  
IDM  
peak drain current  
Tmb = 25 °C; pulsed; tp ≤ 10 µs;  
116  
Figure 3  
Ptot  
Tstg  
Tj  
total power dissipation  
storage temperature  
Tmb = 25 °C; Figure 1  
−
150  
W
−55  
−55  
+175  
+175  
°C  
°C  
operating junction temperature  
Source-drain diode  
IS  
source (diode forward) current (DC)  
peak source (diode forward) current  
Tmb = 25 °C  
−
−
29  
A
A
ISM  
Tmb = 25 °C; pulsed; tp ≤ 10 µs  
116  
Avalanche ruggedness  
EAS non-repetitive avalanche energy  
unclamped inductive load;  
ID = 26 A; tp = 0.2 ms;  
−
−
502  
29  
mJ  
A
VDD ≤ 25 V; RGS = 50 Ω;  
VGS = 10 V; starting Tj = 25 °C  
IAS  
non-repetitive avalanche current  
unclamped inductive load;  
VDD ≤ 25 V; RGS = 50 Ω;  
VGS = 10 V; starting Tj = 25 °C  
9397 750 08594  
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 03 — 31 October 2001  
2 of 12  
 
PSMN063-150D  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
03aa24  
120  
120  
I
der  
P
der  
(%)  
(%)  
80  
80  
40  
40  
0
0
0
50  
100  
150  
200  
(oC)  
0
50  
100  
150  
200  
(oC)  
T
mb  
T
mb  
V
GS ≥ 10 V  
Ptot  
Pder  
=
× 100%  
-----------------------  
ID  
P
°
tot(25 C)  
Ider  
=
× 100%  
-------------------  
I
°
D(25 C)  
Fig 1. Normalized total power dissipation as a  
function of mounting base temperature.  
Fig 2. Normalized continuous drain current as a  
function of mounting base temperature.  
003aaa148  
3
10  
I
D
R
= V  
/ I  
DS D  
DSon  
(A)  
2
10  
t
= 10 µs  
p
100 µs  
10  
1 ms  
DC  
100 ms  
10 ms  
1
-1  
10  
3
10  
2
1
10  
10  
V
(V)  
DS  
Tmb = 25 °C; IDM is single pulse  
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.  
9397 750 08594  
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 03 — 31 October 2001  
3 of 12  
PSMN063-150D  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
4. Thermal characteristics  
Table 3:  
Symbol  
Rth(j-mb)  
Thermal characteristics  
Parameter  
Conditions  
Value  
Unit  
thermal resistance from junction to mounting  
base  
Figure 4  
1.0  
K/W  
Rth(j-a)  
thermal resistance from junction to ambient  
Vertical in still air  
50  
K/W  
4.1 Transient thermal impedance  
003aaa149  
10  
Z
th(j-mb)  
(K/W)  
δ =  
1
0.5  
0.2  
0.1  
-1  
10  
0.05  
t
P
p
δ =  
0.02  
T
single pulse  
-2  
10  
10  
t
t
p
T
-3  
-6  
10  
-5  
10  
-4  
10  
-3  
10  
-2  
10  
-1  
10  
1
t
(s)  
p
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.  
9397 750 08594  
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 03 — 31 October 2001  
4 of 12  
 
 
PSMN063-150D  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
5. Characteristics  
Table 4:  
Tj = 25 °C unless otherwise specified  
Symbol Parameter  
Static characteristics  
V(BR)DSS drain-source breakdown  
voltage  
Characteristics  
Conditions  
Min  
Typ  
Max  
Unit  
ID = 250 µA; VGS = 0 V  
Tj = 25 °C  
150  
133  
−
−
−
−
V
V
Tj = −55 °C  
VGS(th)  
gate-source threshold voltage ID = 1 mA; VDS = VGS  
Figure 9  
Tj = 25 °C  
;
2
1
−
3
−
−
4
−
6
V
V
V
Tj = 175 °C  
Tj = −55 °C  
IDSS  
drain-source leakage current VDS = 150 V; VGS = 0 V  
Tj = 25 °C  
Tj = 175 °C  
−
−
−
0.05  
−
10  
µA  
µA  
nA  
500  
100  
IGSS  
gate-source leakage current VGS = ±10 V; VDS = 0 V  
0.02  
RDSon  
drain-source on-state  
resistance  
VGS = 10 V; ID = 15 A;  
Figure 7 and 8  
Tj = 25 °C  
−
−
60  
63  
mΩ  
mΩ  
Tj = 175 °C  
−
176  
Dynamic characteristics  
Qg(tot)  
Qgs  
Qgd  
Ciss  
Coss  
Crss  
td(on)  
tr  
total gate charge  
ID = 30 A; VDS = 120 V;  
VGS = 10 V; Figure 14  
−
−
−
−
−
−
−
−
−
−
55  
−
−
27  
−
−
−
−
−
−
−
nC  
nC  
nC  
pF  
pF  
pF  
ns  
ns  
ns  
ns  
gate-source charge  
gate-drain (Miller) charge  
input capacitance  
10  
20  
VGS = 0 V; VDS = 25 V;  
f = 1 MHz; Figure 12  
2390  
240  
98  
output capacitance  
reverse transfer capacitance  
turn-on delay time  
turn-on rise time  
VDD = 75 V; RD = 2.7 Ω;  
VGS = 10 V; RG = 5.6 Ω  
14  
50  
td(off)  
tf  
turn-off delay time  
turn-off fall time  
48  
38  
Source-drain diode  
VSD  
source-drain (diode forward) IS = 25 A; VGS = 0 V;  
−
0.9  
1.2  
V
voltage  
Figure 13  
trr  
reverse recovery time  
recovered charge  
IS = 20 A;  
dIS/dt = −100 A/µs;  
VGS = 0 V; VDS = 25 V  
−
−
105  
−
−
ns  
Qr  
0.55  
µC  
9397 750 08594  
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 03 — 31 October 2001  
5 of 12  
 
PSMN063-150D  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
003aaa152  
003aaa150  
30  
30  
V
(V) =  
8.0  
10  
6.0  
GS  
I
D
I
D
(A)  
(A)  
20  
20  
5.4  
5.2  
o
T = 175  
j
C
o
25  
C
10  
0
10  
5.0  
4.8  
4.6  
4.4  
0
0
2
6
8
4
0
0.4  
0.8  
1.2  
1.6  
2.0  
(V)  
V
(V)  
GS  
V
DS  
Tj = 25 °C  
Tj = 25 °C and 175 °C; VDS > ID × RDSon  
Fig 5. Output characteristics: drain current as a  
function of drain-source voltage; typical values.  
Fig 6. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values.  
003aaa151  
03aa30  
2.8  
0.20  
4.4  
4.6  
4.8  
a
R
DSon  
(Ω)  
0.16  
5.0  
2.4  
2.0  
1.6  
5.2  
0.12  
0.08  
5.4  
6
1.2  
0.8  
0.04  
0
V
(V) = 8  
10  
GS  
0.4  
-60  
0
5
10  
15  
20  
25  
30  
140  
20  
60  
100  
180  
-20  
o
T ( C)  
I
(A)  
D
j
Tj = 25 °C  
RDSon  
a=  
-----------------------------  
RDSon(25°C)  
Fig 7. Drain-source on-state resistance as a function  
of drain current; typical values.  
Fig 8. Normalized drain source on-state resistance  
factor as a function of junction temperature.  
9397 750 08594  
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 03 — 31 October 2001  
6 of 12  
PSMN063-150D  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
03aa32  
03aa35  
5
V
I
GS(th)  
(V)  
4
D
(A)  
max  
3
typ  
2
1
min  
0
0
60  
120  
180  
-60  
V
(V)  
GS  
T (ºC)  
j
ID = 1 mA; VDS = VGS  
Tj = 25 °C; VDS = 5 V  
Fig 9. Gate-source threshold voltage as a function of  
junction temperature.  
Fig 10. Sub-threshold drain current as a function of  
gate-source voltage.  
003aaa154  
003aaa153  
4
10  
40  
g
C
(pF)  
fs  
C
iss  
(S)  
o
T = 25  
C
j
30  
20  
10  
0
3
10  
C
oss  
o
T = 175  
C
j
C
rss  
2
10  
10  
10  
2
10  
-1  
1
10  
0
20  
10  
30  
V
(V)  
I
(A)  
DS  
D
Tj = 25 °C; VDS > ID × RDSon  
VGS = 0 V; f = 1 MHz  
Fig 11. Forward transconductance as a function of  
drain current; typical values.  
Fig 12. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values.  
9397 750 08594  
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 03 — 31 October 2001  
7 of 12  
PSMN063-150D  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
003aaa156  
003aaa155  
30  
12  
V
I
GS  
S
(V)  
(A)  
o
V
= 30 V  
V
T = 175  
C
DD  
j
20  
8
o
T = 25  
C
= 120 V  
j
DD  
4
0
10  
0
0
0.4  
0.8  
1.2  
0
20  
60  
40  
Q
(nC)  
G
V
(V)  
SD  
Tj = 25 °C and 175 °C; VGS = 0 V  
ID = 30 A; VDD = 30 V and 120 V  
Fig 13. Source (diode forward) current as a function of  
source-drain (diode forward) voltage; typical  
values.  
Fig 14. Gate-source voltage as a function of gate  
charge; typical values.  
9397 750 08594  
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 03 — 31 October 2001  
8 of 12  
PSMN063-150D  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
6. Package outline  
Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads  
(one lead cropped)  
SOT428  
seating plane  
y
A
A
E
A
2
A
b
D
1
1
2
mounting  
base  
E
1
D
H
E
L
2
2
L
1
L
1
3
b
b
w
M
A
c
1
e
e
1
0
10  
20 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
b
E
H
E
max.  
D
L
1
min.  
A
max.  
E
max.  
y
D
max.  
1
1
(1)  
1
A
A
b
2
UNIT  
mm  
b
c
e
e
1
L
L
w
2
1
2
max.  
max.  
min.  
max.  
0.65 0.89  
0.45 0.71  
0.7  
0.5  
2.38  
2.22  
0.89 1.1  
0.71 0.9  
5.36  
5.26  
0.4 6.22  
0.2 5.98  
6.73  
6.47  
10.4 2.95  
9.6  
2.55  
4.81  
4.45  
4.57  
0.2  
0.2  
4.0 2.285  
0.5  
Note  
1. Measured from heatsink back to lead.  
REFERENCES  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
JEDEC  
EIAJ  
98-04-07  
99-09-13  
SOT428  
TO-252  
SC-63  
Fig 15. SOT428 (D-PAK).  
9397 750 08594  
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 03 — 31 October 2001  
9 of 12  
 
PSMN063-150D  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
7. Revision history  
Table 5:  
Revision history  
CPCN  
Rev Date  
Description  
03 20011031  
-
Product data; third version; supersedes second version PSMN063_150D_2 of  
1 August 1999.  
• Max value of Qgd added in table 5.  
02 19990801  
-
-
Product specification; second version PSMN063_150D_2; supersedes initial Lotus  
Manuscript version of August 1999 Rev 1.000.  
01  
-
Initial version; not published.  
9397 750 08594  
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 03 — 31 October 2001  
10 of 12  
 
PSMN063-150D  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
8. Data sheet status  
Data sheet status[1]  
Product status[2]  
Definition  
Objective data  
Development  
This data sheet contains data from the objective specification for product development. Philips Semiconductors  
reserves the right to change the specification in any manner without notice.  
Preliminary data  
Product data  
Qualification  
Production  
This data sheet contains data from the preliminary specification. Supplementary data will be published at a  
later date. Philips Semiconductors reserves the right to change the specification without notice, in order to  
improve the design and supply the best possible product.  
This data sheet contains data from the product specification. Philips Semiconductors reserves the right to  
make changes at any time in order to improve the design, manufacturing and supply. Changes will be  
communicated according to the Customer Product/Process Change Notification (CPCN) procedure  
SNW-SQ-650A.  
[1]  
[2]  
Please consult the most recently issued data sheet before initiating or completing a design.  
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at  
URL http://www.semiconductors.philips.com.  
9. Definitions  
10. Disclaimers  
Short-form specification — The data in a short-form specification is  
extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Life support — These products are not designed for use in life support  
appliances, devices, or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors  
customers using or selling these products for use in such applications do so  
at their own risk and agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
Limiting values definition — Limiting values given are in accordance with  
the Absolute Maximum Rating System (IEC 60134). Stress above one or  
more of the limiting values may cause permanent damage to the device.  
These are stress ratings only and operation of the device at these or at any  
other conditions above those given in the Characteristics sections of the  
specification is not implied. Exposure to limiting values for extended periods  
may affect device reliability.  
Right to make changes — Philips Semiconductors reserves the right to  
make changes, without notice, in the products, including circuits, standard  
cells, and/or software, described or contained herein in order to improve  
design and/or performance. Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no  
licence or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are  
free from patent, copyright, or mask work right infringement, unless otherwise  
specified.  
Application information — Applications that are described herein for any  
of these products are for illustrative purposes only. Philips Semiconductors  
make no representation or warranty that such applications will be suitable for  
the specified use without further testing or modification.  
Contact information  
For additional information, please visit http://www.semiconductors.philips.com.  
For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.  
Fax: +31 40 27 24825  
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.  
11 of 12  
9397 750 08594  
Product data  
Rev. 03 — 31 October 2001  
 
 
 
 
PSMN063-150D  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1  
1.1  
1.2  
1.3  
1.4  
2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 1  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4  
Transient thermal impedance . . . . . . . . . . . . . . 4  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11  
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
3
4
4.1  
5
6
7
8
9
10  
© Koninklijke Philips Electronics N.V. 2001.  
Printed in The Netherlands  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior  
written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or  
contract, is believed to be accurate and reliable and may be changed without notice. No  
liability will be accepted by the publisher for any consequence of its use. Publication  
thereof does not convey nor imply any license under patent- or other industrial or  
intellectual property rights.  
Date of release: 31 October 2001  
Document order number: 9397 750 08594  

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