PSMN7R8-120PSQ [NXP]

PSMN7R8-120PS MIKEB - N-channel 120V 7.9mΩ standard level MOSFET in TO220 TO-220 3-Pin;
PSMN7R8-120PSQ
型号: PSMN7R8-120PSQ
厂家: NXP    NXP
描述:

PSMN7R8-120PS MIKEB - N-channel 120V 7.9mΩ standard level MOSFET in TO220 TO-220 3-Pin

文件: 总13页 (文件大小:262K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
B
A
0
2
2
-
O
T
PSMN7R8-120PS  
N-channel 120V 7.9mΩ standard level MOSFET in TO220  
25 January 2013  
Product data sheet  
1. General description  
Standard level N-channel MOSFET in TO220 package qualified to 175C. This product is  
designed and qualified for use in a wide range of industrial, communications and power  
supply equipment.  
2. Features and benefits  
High efficiency due to low switching and conduction losses  
TO220 package  
Suitable for standard level gate drive  
3. Applications  
AC-to-DC power supply  
Synchronous rectification  
Motor control  
4. Quick reference data  
Table 1.  
Symbol  
Quick reference data  
Parameter  
Conditions  
Min  
Typ  
Max  
120  
70  
Unit  
V
VDS  
ID  
drain-source voltage  
drain current  
Tj ≥ 25 °C; Tj ≤ 175 °C  
Tmb = 25 °C; VGS = 10 V; Fig. 1  
-
-
-
-
-
-
A
Ptot  
total power dissipation Tmb = 25 °C; Fig. 2  
349  
W
Static characteristics  
RDSon drain-source on-state  
resistance  
Dynamic characteristics  
VGS = 10 V; ID = 25 A; Tj = 25 °C;  
Fig. 12  
4.7  
6.72  
7.9  
mΩ  
QGD  
gate-drain charge  
total gate charge  
VGS = 10 V; ID = 25 A; VDS = 60 V;  
Fig. 14; Fig. 15  
-
-
50.5  
167  
-
-
nC  
nC  
QG(tot)  
Avalanche ruggedness  
EDS(AL)S non-repetitive drain-  
VGS = 10 V; Tj(init) = 25 °C; ID = 70 A;  
Vsup ≤ 120 V; unclamped; RGS = 50 Ω;  
Fig. 3  
-
-
386  
mJ  
source avalanche  
energy  
Scan or click this QR code to view the latest information for this product  
 
 
 
 
NXP Semiconductors  
PSMN7R8-120PS  
N-channel 120V 7.9mΩ standard level MOSFET in TO220  
5. Pinning information  
Table 2.  
Pin  
Pinning information  
Symbol Description  
Simplified outline  
Graphic symbol  
mb  
D
S
1
G
D
S
D
gate  
2
drain  
source  
drain  
G
3
mbb076  
mb  
1
2 3  
TO-220AB (SOT78)  
6. Ordering information  
Table 3.  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
PSMN7R8-120PS  
TO-220AB  
plastic single-ended package; heatsink mounted; 1 mounting  
hole; 3-lead TO-220AB  
SOT78  
7. Marking  
Table 4.  
Marking codes  
Type number  
Marking code  
PSMN7R8-120PS  
PSMN7R8-120PS  
8. Limiting values  
Table 5.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VDS  
Parameter  
Conditions  
Min  
Max  
120  
120  
20  
Unit  
V
drain-source voltage  
drain-gate voltage  
gate-source voltage  
drain current  
Tj ≥ 25 °C; Tj ≤ 175 °C  
Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ  
-
VDGR  
VGS  
-
V
-20  
V
ID  
VGS = 10 V; Tmb = 25 °C; Fig. 1  
VGS = 10 V; Tmb = 100 °C; Fig. 1  
pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 4  
-
-
-
70  
A
70  
A
IDM  
peak drain current  
280  
A
PSMN7R8-120PS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved  
Product data sheet  
25 January 2013  
2 / 13  
 
 
 
 
NXP Semiconductors  
PSMN7R8-120PS  
N-channel 120V 7.9mΩ standard level MOSFET in TO220  
Symbol  
Ptot  
Parameter  
Conditions  
Min  
-
Max  
349  
175  
175  
260  
Unit  
W
total power dissipation  
storage temperature  
junction temperature  
peak soldering temperature  
Tmb = 25 °C; Fig. 2  
Tstg  
-55  
-55  
-
°C  
Tj  
°C  
Tsld(M)  
°C  
Source-drain diode  
IS  
source current  
peak source current  
Tmb = 25 °C  
-
-
70  
A
A
ISM  
pulsed; tp ≤ 10 µs; Tmb = 25 °C  
280  
Avalanche ruggedness  
EDS(AL)S non-repetitive drain-source  
avalanche energy  
VGS = 10 V; Tj(init) = 25 °C; ID = 70 A;  
Vsup ≤ 120 V; unclamped; RGS = 50 Ω;  
Fig. 3  
-
386  
mJ  
003aak697  
03aa16  
80  
60  
40  
20  
0
120  
I
D
(A)  
P
der  
(%)  
80  
40  
0
0
50  
100  
150  
T (°C)  
200  
0
50  
100  
150  
200  
j
T
(°C)  
mb  
Fig. 1. Continuous drain current as a function of  
mounting base temperature  
Fig. 2. Normalized total power dissipation as a  
function of mounting base temperature  
PSMN7R8-120PS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved  
Product data sheet  
25 January 2013  
3 / 13  
 
 
NXP Semiconductors  
PSMN7R8-120PS  
N-channel 120V 7.9mΩ standard level MOSFET in TO220  
003aak698  
2
10  
I
AL  
(A)  
(1)  
10  
(2)  
1
10  
-3  
-2  
-1  
10  
10  
1
10  
t
(ms)  
AL  
Fig. 3. Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time  
003aak696  
3
2
10  
10  
I
D
(A)  
Limit R  
= V / I  
DS  
DSon  
D
t
= 10 us  
p
100 us  
10  
DC  
1 ms  
1
10 ms  
100 ms  
-1  
10  
2
3
1
10  
10  
10  
V
(V)  
DS  
Fig. 4. Safe operating area; continuous and peak drain current as a function of drain-source voltage  
9. Thermal characteristics  
Table 6.  
Symbol  
Thermal characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Rth(j-mb)  
thermal resistance  
from junction to  
mounting base  
Fig. 5  
-
0.35  
0.43  
K/W  
PSMN7R8-120PS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved  
Product data sheet  
25 January 2013  
4 / 13  
 
 
 
NXP Semiconductors  
PSMN7R8-120PS  
N-channel 120V 7.9mΩ standard level MOSFET in TO220  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Rth(j-a)  
thermal resistance  
from junction to  
ambient  
vertical in free air  
-
60  
-
K/W  
003aak695  
1
Z
th(j-mb)  
= 0.5  
δ
(K/W)  
0.2  
0.1  
0.1  
0.05  
0.02  
t
p
P
10-2  
δ =  
T
single shot  
t
t
p
T
10-3  
10-6  
10-5  
10-4  
10-3  
10-2  
10-1  
1
t (s)  
p
Fig. 5. Transient thermal impedance from junction to mounting base as a function of pulse duration  
10. Characteristics  
Table 7.  
Symbol  
Characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Static characteristics  
V(BR)DSS drain-source  
breakdown voltage  
ID = 250 µA; VGS = 0 V; Tj = 25 °C  
ID = 250 µA; VGS = 0 V; Tj = -55 °C  
120  
108  
2
-
-
V
V
V
-
-
VGS(th)  
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C;  
3
4
voltage  
Fig. 10; Fig. 11  
ID = 1 mA; VDS = VGS; Tj = 175 °C;  
Fig. 10  
1
-
-
-
-
V
V
ID = 1 mA; VDS = VGS; Tj = -55 °C;  
Fig. 10  
4.6  
IDSS  
drain leakage current  
gate leakage current  
VDS = 120 V; VGS = 0 V; Tj = 25 °C  
VDS = 120 V; VGS = 0 V; Tj = 175 °C  
VGS = 20 V; VDS = 0 V; Tj = 25 °C  
VGS = -20 V; VDS = 0 V; Tj = 25 °C  
-
0.1  
-
1
µA  
µA  
nA  
nA  
mΩ  
-
500  
100  
100  
7.9  
IGSS  
-
10  
10  
6.72  
-
RDSon  
drain-source on-state  
resistance  
VGS = 10 V; ID = 25 A; Tj = 25 °C;  
Fig. 12  
4.7  
VGS = 10 V; ID = 25 A; Tj = 175 °C;  
Fig. 12; Fig. 13  
-
19.3  
22.9  
mΩ  
PSMN7R8-120PS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved  
Product data sheet  
25 January 2013  
5 / 13  
 
 
NXP Semiconductors  
PSMN7R8-120PS  
N-channel 120V 7.9mΩ standard level MOSFET in TO220  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
RG  
internal gate  
f = 1 MHz  
0.39  
0.78  
1.56  
Ω
resistance (AC)  
Dynamic characteristics  
QG(tot) total gate charge  
QGS  
ID = 25 A; VDS = 60 V; VGS = 10 V;  
Fig. 14; Fig. 15  
-
-
-
167  
-
-
-
nC  
nC  
nC  
gate-source charge  
36.9  
24.2  
QGS(th)  
pre-threshold gate-  
source charge  
QGS(th-pl)  
post-threshold gate-  
source charge  
-
12.7  
-
nC  
QGD  
gate-drain charge  
-
-
50.5  
4.5  
-
-
nC  
V
VGS(pl)  
gate-source plateau  
voltage  
ID = 25 A; VDS = 60 V; Fig. 14; Fig. 15  
Ciss  
Coss  
Crss  
input capacitance  
output capacitance  
VDS = 60 V; VGS = 0 V; f = 1 MHz;  
Tj = 25 °C; Fig. 16  
-
-
-
9473  
441  
-
-
-
pF  
pF  
pF  
reverse transfer  
capacitance  
298  
td(on)  
tr  
td(off)  
tf  
turn-on delay time  
rise time  
VDS = 60 V; RL = 2.4 Ω; VGS = 10 V;  
RG(ext) = 5 Ω; Tj = 25 °C  
-
-
-
-
45.5  
55.3  
151.8  
60.8  
-
-
-
-
ns  
ns  
ns  
ns  
turn-off delay time  
fall time  
Source-drain diode  
VSD source-drain voltage  
trr  
IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 17  
-
-
-
0.81  
75.7  
264  
1.2  
V
reverse recovery time IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V;  
-
-
ns  
nC  
VDS = 60 V  
Qr  
recovered charge  
PSMN7R8-120PS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved  
Product data sheet  
25 January 2013  
6 / 13  
NXP Semiconductors  
PSMN7R8-120PS  
N-channel 120V 7.9mΩ standard level MOSFET in TO220  
003aak689  
003aak688  
120  
40  
I
6
5.5  
10  
8
6.5  
D
R
(A)  
DSon  
V
(V) = 5  
(m  
)
GS  
Ω
100  
80  
60  
40  
20  
0
30  
20  
10  
0
4.5  
4
0
4
8
12  
16  
0
1
2
3
V
(V)  
V
(V)  
DS  
GS  
Fig. 7. Drain-source on-state resistance as a function  
of gate-source voltage; typical values  
Fig. 6. Output characteristics: drain current as a  
function of drain-source voltage; typical values  
003aak686  
003aak687  
200  
100  
I
g
D
fs  
(A)  
(S)  
80  
150  
60  
40  
100  
50  
0
T = 25  
j
C
T = 175  
j
C
°
°
20  
0
0
1
2
3
4
5
6
0
20  
40  
60  
80  
100  
V
(V)  
I
(A)  
GS  
D
Fig. 8. Forward transconductance as a function of  
drain current; typical values  
Fig. 9. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values  
PSMN7R8-120PS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved  
Product data sheet  
25 January 2013  
7 / 13  
NXP Semiconductors  
PSMN7R8-120PS  
N-channel 120V 7.9mΩ standard level MOSFET in TO220  
003aad280  
03aa35  
- 1  
5
10  
I
V
D
GS(th)  
(A)  
(V)  
min  
typ  
max  
- 2  
- 3  
- 4  
- 5  
- 6  
4
10  
10  
10  
10  
10  
max  
3
2
1
0
typ  
min  
- 60  
0
60  
120  
180  
0
2
4
6
T (°C)  
j
V
(V)  
GS  
Fig. 10. Gate-source threshold voltage as a function of Fig. 11. Sub-threshold drain current as a function of  
junction temperature gate-source voltage  
003aak694  
003aag654  
12  
3
R
DSon  
a
(mW)  
11  
V
(V) =  
4.5  
5
GS  
2.5  
10  
9
2
1.5  
1
5.5  
10  
8
6
6.5  
7
7
0.5  
0
6
5
0
25  
50  
75  
100  
125  
-60  
0
60  
120  
180  
I
(A)  
T ( C)  
D
°
j
Fig. 13. Normalized drain-source on-state resistance  
factor as a function of junction temperature  
Fig. 12. Drain-source on-state resistance as a function  
of drain current; typical values  
PSMN7R8-120PS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved  
Product data sheet  
25 January 2013  
8 / 13  
 
 
 
 
NXP Semiconductors  
PSMN7R8-120PS  
N-channel 120V 7.9mΩ standard level MOSFET in TO220  
003aak691  
10  
V
DS  
V
GS  
(V)  
V
=
96 V  
DS  
I
D
8
6
4
2
0
60 V  
24 V  
V
GS(pl)  
V
GS(th)  
GS  
V
Q
Q
GS1  
GS2  
Q
Q
GD  
GS  
Q
G(tot)  
003aaa508  
Fig. 14. Gate charge waveform definitions  
0
50  
100  
150  
200  
Q
(nC)  
G
Fig. 15. Gate-source voltage as a function of gate  
charge; typical values  
003aak692  
003aak693  
5
10  
100  
C
(pF)  
I
S
(A)  
80  
C
iss  
4
10  
60  
40  
3
10  
C
C
oss  
T = 25  
j
C
°
T = 175 C  
°
j
20  
0
rss  
2
10  
-1  
2
10  
1
10  
10  
0
0.3  
0.6  
0.9  
V
1.2  
V
(V)  
(V)  
DS  
SD  
Fig. 16. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values  
Fig. 17. Source (diode forward) current as a function of  
source-drain (diode forward) voltage; typical  
values  
PSMN7R8-120PS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved  
Product data sheet  
25 January 2013  
9 / 13  
 
 
 
 
NXP Semiconductors  
PSMN7R8-120PS  
N-channel 120V 7.9mΩ standard level MOSFET in TO220  
11. Package outline  
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB  
SOT78  
E
p
A
A
1
q
mounting  
D
1
base  
D
(1)  
(1)  
L
L
1
2
Q
(2)  
b
1
L
(3×)  
(2)  
b
2
(2×)  
1
2
3
b(3×)  
c
e
e
0
5
10 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
(1)  
L
2
(2)  
(2)  
(1)  
1
UNIT  
mm  
A
A
b
b
b
c
D
D
1
E
e
L
L
p
q
Q
1
1
2
max.  
4.7  
4.1  
1.40  
1.25  
0.9  
0.6  
1.6  
1.0  
1.3  
1.0  
0.7  
0.4  
16.0  
15.2  
6.6  
5.9  
10.3  
9.7  
15.0 3.30  
12.8 2.79  
3.8  
3.5  
3.0  
2.7  
2.6  
2.2  
2.54  
3.0  
Notes  
1. Lead shoulder designs may vary.  
2. Dimension includes excess dambar.  
REFERENCES  
OUTLINE  
VERSION  
EUROPEAN  
PROJECTION  
ISSUE DATE  
IEC  
JEDEC  
JEITA  
08-04-23  
08-06-13  
SOT78  
SC-46  
3-lead TO-220AB  
Fig. 18. Package outline TO-220AB (SOT78)  
PSMN7R8-120PS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved  
Product data sheet  
25 January 2013  
10 / 13  
 
NXP Semiconductors  
PSMN7R8-120PS  
N-channel 120V 7.9mΩ standard level MOSFET in TO220  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation -  
lost profits, lost savings, business interruption, costs related to the removal  
or replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
12. Legal information  
12.1 Data sheet status  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of NXP Semiconductors.  
Document  
Product  
Definition  
status [1][2] status [3]  
Objective  
[short] data  
sheet  
Development This document contains data from  
the objective specification for product  
development.  
Right to make changes — NXP Semiconductors reserves the right to  
make changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
Preliminary  
[short] data  
sheet  
Qualification This document contains data from the  
preliminary specification.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors and its suppliers accept no liability for  
inclusion and/or use of NXP Semiconductors products in such equipment or  
applications and therefore such inclusion and/or use is at the customer’s own  
risk.  
Product  
[short] data  
sheet  
Production  
This document contains the product  
specification.  
[1] Please consult the most recently issued document before initiating or  
completing a design.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have  
changed since this document was published and may differ in case of  
multiple devices. The latest product status information is available on  
the Internet at URL http://www.nxp.com.  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
12.2 Definitions  
Preview — The document is a preview version only. The document is still  
subject to formal approval, which may result in modifications or additions.  
NXP Semiconductors does not give any representations or warranties as to  
the accuracy or completeness of information included herein and shall have  
no liability for the consequences of use of such information.  
Customers are responsible for the design and operation of their  
applications and products using NXP Semiconductors products, and NXP  
Semiconductors accepts no liability for any assistance with applications or  
customer product design. It is customer’s sole responsibility to determine  
whether the NXP Semiconductors product is suitable and fit for the  
customer’s applications and products planned, as well as for the planned  
application and use of customer’s third party customer(s). Customers should  
provide appropriate design and operating safeguards to minimize the risks  
associated with their applications and products.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences  
of use of such information.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default  
in the customer’s applications or products, or the application or use by  
customer’s third party customer(s). Customer is responsible for doing all  
necessary testing for the customer’s applications and products using NXP  
Semiconductors products in order to avoid a default of the applications  
and the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is  
intended for quick reference only and should not be relied upon to contain  
detailed and full information. For detailed and full information see the  
relevant full data sheet, which is available on request via the local NXP  
Semiconductors sales office. In case of any inconsistency or conflict with the  
short data sheet, the full data sheet shall prevail.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product  
is deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
12.3 Disclaimers  
Limited warranty and liability — Information in this document is believed  
to be accurate and reliable. However, NXP Semiconductors does not give  
any representations or warranties, expressed or implied, as to the accuracy  
or completeness of such information and shall have no liability for the  
consequences of use of such information. NXP Semiconductors takes no  
responsibility for the content in this document if provided by an information  
source outside of NXP Semiconductors.  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
PSMN7R8-120PS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved  
Product data sheet  
25 January 2013  
11 / 13  
 
 
 
 
 
NXP Semiconductors  
PSMN7R8-120PS  
N-channel 120V 7.9mΩ standard level MOSFET in TO220  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific NXP Semiconductors product is automotive qualified,  
the product is not suitable for automotive use. It is neither qualified nor  
tested in accordance with automotive testing or application requirements.  
NXP Semiconductors accepts no liability for inclusion and/or use of non-  
automotive qualified products in automotive equipment or applications.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards,  
customer (a) shall use the product without NXP Semiconductors’ warranty  
of the product for such automotive applications, use and specifications, and  
(b) whenever customer uses the product for automotive applications beyond  
NXP Semiconductors’ specifications such use shall be solely at customer’s  
own risk, and (c) customer fully indemnifies NXP Semiconductors for any  
liability, damages or failed product claims resulting from customer design and  
use of the product for automotive applications beyond NXP Semiconductors’  
standard warranty and NXP Semiconductors’ product specifications.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
12.4 Trademarks  
Notice: All referenced brands, product names, service names and  
trademarks are the property of their respective owners.  
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,  
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,  
ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,  
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,  
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.  
HD Radio and HD Radio logo — are trademarks of iBiquity Digital  
Corporation.  
PSMN7R8-120PS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved  
Product data sheet  
25 January 2013  
12 / 13  
 
NXP Semiconductors  
PSMN7R8-120PS  
N-channel 120V 7.9mΩ standard level MOSFET in TO220  
13. Contents  
1
General description ............................................... 1  
2
Features and benefits ............................................1  
Applications ........................................................... 1  
Quick reference data ............................................. 1  
Pinning information ...............................................2  
Ordering information .............................................2  
Marking ...................................................................2  
Limiting values .......................................................2  
Thermal characteristics .........................................4  
Characteristics .......................................................5  
Package outline ................................................... 10  
3
4
5
6
7
8
9
10  
11  
12  
Legal information .................................................11  
Data sheet status ............................................... 11  
Definitions ...........................................................11  
Disclaimers .........................................................11  
Trademarks ........................................................ 12  
12.1  
12.2  
12.3  
12.4  
© NXP B.V. 2013. All rights reserved  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 25 January 2013  
PSMN7R8-120PS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved  
Product data sheet  
25 January 2013  
13 / 13  

相关型号:

PSMN8R0-30YL

N-channel 8.3 mΩ 30 V TrenchMOS logic level FET in LFPAK
NXP

PSMN8R0-30YLC

N-channel 30 V 7.9 mΩ logic level MOSFET in LFPAK using NextPower technology
NXP

PSMN8R0-30YL_1105

N-channel 8.3 mΩ 30 V TrenchMOS logic level FET in LFPAK
NXP

PSMN8R0-40BS

N-channel 40 V 7.6 mΩ standard level MOSFET in D2PAKProduction
NEXPERIA

PSMN8R0-40HL

N-channel 40 V, 9.4 mOhm, logic level MOSFET in LFPAK56D using TrenchMOS technologyProduction
NEXPERIA

PSMN8R0-40PS

N-channel 40 V 7.6 mΩ standard level MOSFET
NXP

PSMN8R0-40PS

N-channel 40 V 7.6 mΩ standard level MOSFETProduction
NEXPERIA

PSMN8R0-80YL

N-channel 80 V, 8 mΩ logic level MOSFET in LFPAK56Production
NEXPERIA

PSMN8R2-80YS

N-channel LFPAK 80 V 8.5 mΩ standard level MOSFET
NXP

PSMN8R2-80YS

N-channel LFPAK 80 V 8.5 mΩ standard level MOSFETProduction
NEXPERIA

PSMN8R2-80YS,115

MOSFET N-CH 80V 82A LFPAK
ETC

PSMN8R3-40YS

N-channel LFPAK 40 V 8.6 mΩ standard level MOSFET
NXP