PUML1/DG [NXP]
TRANSISTOR 100 mA, 50 V, 2 CHANNEL, NPN, Si, SMALL SIGNAL TRANSISTOR, PLASTIC, SMD, SC-88, 6 PIN, BIP General Purpose Small Signal;型号: | PUML1/DG |
厂家: | NXP |
描述: | TRANSISTOR 100 mA, 50 V, 2 CHANNEL, NPN, Si, SMALL SIGNAL TRANSISTOR, PLASTIC, SMD, SC-88, 6 PIN, BIP General Purpose Small Signal 开关 光电二极管 晶体管 |
文件: | 总12页 (文件大小:85K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PUML1/DG
50 V, 200 mA NPN general-purpose transistor/
100 mA NPN resistor-equipped transistor
Rev. 01 — 14 July 2008
Product data sheet
1. Product profile
1.1 General description
NPN general-purpose transistor and NPN Resistor-Equipped Transistor (RET) in one
SOT363 (SC-88) very small Surface-Mounted Device (SMD) plastic package.
1.2 Features
I General-purpose transistor:
N 200 mA collector current IC
I Resistor-equipped transistor:
N Built-in bias resistors
I Simplifies circuit design
I Reduces component count
I Reduces pick and place costs
I Very small SMD plastic package
I AEC-Q101 qualified
1.3 Applications
I Inverter and switches
I Low-frequency amplifier
I Driver stages
1.4 Quick reference data
Table 1.
Quick reference data
Symbol Parameter
Conditions
Min
Typ
Max
Unit
TR1 (general-purpose transistor)
VCEO
IC
collector-emitter voltage
collector current
open base
-
-
-
-
50
V
-
200
340
mA
hFE
DC current gain
VCE = 10 V;
IC = 2 mA
210
TR2 (resistor-equipped transistor)
VCEO
IO
collector-emitter voltage
output current
open base
-
-
50
V
-
-
100
13
mA
kΩ
R1
bias resistor 1 (input)
bias resistor ratio
7
10
1
R2/R1
0.8
1.2
PUML1/DG
NXP Semiconductors
50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET
2. Pinning information
Table 2.
Pinning
Pin
1
Description
Simplified outline
Graphic symbol
emitter TR1
6
5
4
6
5
4
2
base TR1
3
output (collector) TR2
GND (emitter) TR2
input (base) TR2
collector TR1
R1
R2
4
TR2
1
2
3
5
TR1
1
6
2
3
006aab253
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
PUML1/DG
SC-88
plastic surface-mounted package; 6 leads
SOT363
4. Marking
Table 4.
Marking codes
Type number
Marking code[1]
PUML1/DG
PA*
[1] * = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
Max
Unit
TR1 (general-purpose transistor)
VCBO
VCEO
VEBO
IC
collector-base voltage
collector-emitter voltage
emitter-base voltage
collector current
open emitter
open base
-
-
-
-
-
60
50
V
V
open collector
6
V
200
200
mA
mA
ICM
peak collector current
single pulse;
tp ≤ 1 ms
IBM
peak base current
single pulse;
-
100
mA
tp ≤ 1 ms
PUML1_DG_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 14 July 2008
2 of 12
PUML1/DG
NXP Semiconductors
50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET
Table 5.
Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
amb ≤ 25 °C
Min
Max
Unit
[1]
Ptot
total power dissipation
T
-
200
mW
TR2 (resistor-equipped transistor)
VCBO
VCEO
VEBO
VI
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage
open emitter
open base
-
-
-
50
50
10
V
V
V
open collector
positive
-
-
-
-
+40
−10
100
100
V
negative
V
IO
output current
mA
mA
ICM
peak collector current
single pulse;
tp ≤ 1 ms
[1]
[1]
Ptot
total power dissipation
T
amb ≤ 25 °C
amb ≤ 25 °C
-
200
mW
Per device
Ptot
Tj
total power dissipation
junction temperature
ambient temperature
storage temperature
T
-
300
mW
°C
-
150
Tamb
Tstg
−55
−65
+150
+150
°C
°C
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
006aab254
300
P
tot
(mW)
200
100
0
−75
−25
25
75
125
175
(°C)
T
amb
FR4 PCB, standard footprint
Fig 1. Per transistor: Power derating curve
PUML1_DG_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 14 July 2008
3 of 12
PUML1/DG
NXP Semiconductors
50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET
6. Thermal characteristics
Table 6.
Thermal characteristics
Symbol Parameter
Per transistor
Conditions
Min
Typ
Max Unit
[1]
[1]
Rth(j-a)
thermal resistance from junction in free air
to ambient
-
-
625
417
K/W
K/W
Per device
Rth(j-a)
thermal resistance from junction in free air
to ambient
-
-
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
006aab255
3
10
duty cycle =
1
Z
(
th(j-a)
0.75
)
K/W
0.5
0.2
0.33
2
10
0.1
0.05
0.02
0.01
10
0
1
10
−5
−4
−3
−2
−1
2
3
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, standard footprint
Fig 2. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration
PUML1_DG_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 14 July 2008
4 of 12
PUML1/DG
NXP Semiconductors
50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET
7. Characteristics
Table 7.
Characteristics
Tamb = 25 °C unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
TR1 (general-purpose transistor)
ICBO
collector-base cut-off
current
VCB = 60 V; IE = 0 A
-
-
-
-
10
5
nA
VCB = 60 V; IE = 0 A;
µA
Tj = 150 °C
IEBO
hFE
emitter-base cut-off
current
VEB = 5 V; IC = 0 A
-
-
10
nA
DC current gain
VCE = 2 V; IC = 100 mA
VCE = 10 V; IC = 2 mA
IC = 100 mA; IB = 10 mA
90
210
-
-
-
-
-
340
250
VCEsat
fT
collector-emitter
saturation voltage
mV
transition frequency
VCE = 10 V; IC = 2 mA;
f = 100 MHz
100
-
-
MHz
MHz
pF
VCE = 6 V; IC = 10 mA;
f = 100 MHz
-
-
230
-
-
Cc
collector capacitance
VCB = 10 V; IE = ie = 0 A;
f = 1 MHz
3
TR2 (resistor-equipped transistor)
ICBO
collector-base cut-off
current
VCB = 50 V; IE = 0 A
-
-
100
nA
ICEO
collector-emitter cut-off VCE = 30 V; IB = 0 A
-
-
-
-
1
µA
µA
current
VCE = 30 V; IB = 0 A;
50
Tj = 150 °C
IEBO
emitter-base cut-off
current
VEB = 5 V; IC = 0 A
-
-
400
µA
hFE
DC current gain
VCE = 5 V; IC = 5 mA
30
-
-
-
-
VCEsat
collector-emitter
IC = 10 mA; IB = 0.5 mA
150
mV
saturation voltage
VI(off)
VI(on)
R1
off-state input voltage
on-state input voltage
bias resistor 1 (input)
bias resistor ratio
VCE = 5 V; IC = 100 µA
-
1.1
1.8
10
1
0.8
-
V
VCE = 0.3 V; IC = 10 mA
2.5
7
V
13
1.2
2.5
kΩ
R2/R1
Cc
0.8
-
collector capacitance
VCB = 10 V; IE = ie = 0 A;
f = 1 MHz
-
pF
PUML1_DG_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 14 July 2008
5 of 12
PUML1/DG
NXP Semiconductors
50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET
006aab256
006aaa993
500
0.1
I
(mA) = 0.56
B
0.50
0.44
h
I
C
(A)
FE
(1)
400
0.08
0.38
0.32
0.26
300
200
100
0
0.06
0.04
0.02
0
(2)
(3)
0.20
0.14
0.08
0.02
−1
2
3
10
1
10
10
10
0
2
4
6
8
10
(V)
I
(mA)
V
CE
C
VCE = 10 V
Tamb = 25 °C
(1) Tamb = 150 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
Fig 3. TR1: DC current gain as a function of collector
current; typical values
Fig 4. TR1: Collector current as a function of
collector-emitter voltage; typical values
006aab257
006aab258
1.3
1
V
BEsat
(V)
V
CEsat
(V)
(1)
(2)
0.9
0.5
0.1
−1
10
(3)
(1)
(2)
(3)
−2
10
−1
2
3
−1
2
3
10
1
10
10
10
10
1
10
10
10
I
(mA)
I (mA)
C
C
IC/IB = 10
IC/IB = 10
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(3) Tamb = 150 °C
(1) Tamb = 150 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
Fig 5. TR1: Base-emitter saturation voltage as a
function of collector current; typical values
Fig 6. TR1: Collector-emitter saturation voltage as a
function of collector current; typical values
PUML1_DG_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 14 July 2008
6 of 12
PUML1/DG
NXP Semiconductors
50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET
006aaa034
006aaa035
3
10
1
(1)
(2)
(3)
h
FE
V
CEsat
(V)
2
10
(1)
(2)
(3)
−1
10
10
−2
1
10
10
−1
2
2
1
10
10
1
10
10
I
(mA)
I (mA)
C
C
VCE = 5 V
IC/IB = 20
(1) Tamb = 150 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
Fig 7. TR2: DC current gain as a function of collector
current; typical values
Fig 8. TR2: Collector-emitter saturation voltage as a
function of collector current; typical values
006aaa036
006aaa037
10
10
V
I(on)
V
I(off)
(V)
(V)
(1)
(2)
(1)
(2)
(3)
1
1
(3)
−1
−1
10
10
−1
2
−2
−1
10
1
10
10
10
10
1
10
I
(mA)
I (mA)
C
C
VCE = 0.3 V
VCE = 5 V
(1) Tamb = −40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(1) Tamb = −40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig 9. TR2: On-state input voltage as a function of
collector current; typical values
Fig 10. TR2: Off-state input voltage as a function of
collector current; typical values
PUML1_DG_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 14 July 2008
7 of 12
PUML1/DG
NXP Semiconductors
50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET
8. Test information
8.1 Quality information
This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is
suitable for use in automotive applications.
9. Package outline
2.2
1.8
1.1
0.8
0.45
0.15
6
5
4
2.2 1.35
2.0 1.15
pin 1
index
1
2
3
0.25
0.10
0.3
0.2
0.65
1.3
Dimensions in mm
06-03-16
Fig 11. Package outline SOT363 (SC-88)
10. Packing information
Table 8.
Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.[1]
Type number Package Description
Packing quantity
3000
10000
-135
[2]
[3]
PUML1/DG
SOT363 4 mm pitch, 8 mm tape and reel; T1
4 mm pitch, 8 mm tape and reel; T2
-115
-125
-165
[1] For further information and the availability of packing methods, see Section 14.
[2] T1: normal taping
[3] T2: reverse taping
PUML1_DG_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 14 July 2008
8 of 12
PUML1/DG
NXP Semiconductors
50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET
11. Soldering
2.65
solder lands
0.4 (2×)
1.5
2.35
0.6
(4×)
0.5
(4×)
solder resist
solder paste
0.5
(4×)
0.6
(2×)
occupied area
0.6
(4×)
Dimensions in mm
1.8
sot363_fr
Fig 12. Reflow soldering footprint SOT363 (SC-88)
1.5
solder lands
solder resist
occupied area
2.5
0.3
4.5
1.5
Dimensions in mm
preferred transport
direction during soldering
1.3
1.3
2.45
5.3
sot363_fw
Fig 13. Wave soldering footprint SOT363 (SC-88)
PUML1_DG_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 14 July 2008
9 of 12
PUML1/DG
NXP Semiconductors
50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET
12. Revision history
Table 9.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PUML1_DG_1
20080714
Product data sheet
-
-
PUML1_DG_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 14 July 2008
10 of 12
PUML1/DG
NXP Semiconductors
50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET
13. Legal information
13.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
13.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
13.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
13.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
14. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
PUML1_DG_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 14 July 2008
11 of 12
PUML1/DG
NXP Semiconductors
50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET
15. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
1.1
1.2
1.3
1.4
2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Test information. . . . . . . . . . . . . . . . . . . . . . . . . 8
Quality information . . . . . . . . . . . . . . . . . . . . . . 8
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
Packing information. . . . . . . . . . . . . . . . . . . . . . 8
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10
3
4
5
6
7
8
8.1
9
10
11
12
13
Legal information. . . . . . . . . . . . . . . . . . . . . . . 11
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 11
13.1
13.2
13.3
13.4
14
15
Contact information. . . . . . . . . . . . . . . . . . . . . 11
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2008.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 14 July 2008
Document identifier: PUML1_DG_1
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