SA56600-42D-T [NXP]
IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8, 3.90 MM, PLASTIC, MS-012, SOP-8, Power Management Circuit;
| 型号： | SA56600-42D-T |
| 厂家： | 
NXP |
| 描述： | IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8, 3.90 MM, PLASTIC, MS-012, SOP-8, Power Management Circuit 光电二极管 |
| 文件： | 总12页 (文件大小：135K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
SA56600-42
System reset for lithium battery backup
Product data
2001 Jun 19
Supersedes data of 2001 Apr 24
File under Integrated Circuits, Standard Analog
Philips
Semiconductors
Philips Semiconductors
Product data
System reset for lithium battery back-up
SA56600-42
GENERAL DESCRIPTION
The SA56600-42 is designed to protect SRAM data in computer
systems during periods of sagging power supply voltages and power
outages. When the power supply voltage drops to typically 4.2 V, the
CS output goes to a logic LOW state pulling CE to a LOW state,
disabling the SRAM device. In addition, a reset logic LOW is asserted
for system use. If the supply voltage drops further, to 3.3 V typically
or lower, the SA56600-42 switches the system’s operation from the
main power supply source to the Lithium back-up battery. As the
main supply is restored and the voltage rises to 3.3 V or higher, the
SRAM support voltage transfers from the Lithium back-up battery to
the main supply. When the main supply voltage rises to greater than
typically 4.2 V, the CS output goes to a logic HIGH state for SRAM
CE control. Reset assertion is released and normal operation is
resumed. This sequence ensures reliable preservation of SRAM
data during periods of supply deficiency and interruptions.
The SA56600-42 is offered in the SO8 surface mount package.
FEATURES
APPLICATIONS
• Supply switching at 4.2 V threshold (falling supply)
DC
• Memory cards (SRAM)
• RESET output
• Both CS and CS outputs available for SRAM control
• During battery back-up operation:
• PCs, word processors
• FAX machines, photocopiers, office equipment
• Sequence controllers
– Low supply current (0.3 µA typical)
• Video games and other equipment with SRAM
– Low input/output voltage drop (0.3 V typical at 100 µA)
– Low reverse current leakage (0.1 µA max.)
• During normal operation:
– Low input/output voltage drop (0.2 V typical at 50 mA)
– 4.8 V typical output voltage at 50 mA with V = 5.0 V
CC
– Restoration of main supply operation at 3.3 V
SIMPLIFIED SYSTEM DIAGRAM
V
V
OUT
6
4
SA56600-42
BATT
8
V
CC
V
CC
V
DD
3.3 V
DETECTION
CITCUIT
R
R
PU
LITHIUM
BATTERY
2
RESET
SRAM
CS
CS
3
5
CE
GND
4.2 V
DETECTION
CITCUIT
1
GND
7
SL01277
Y
Figure 1. Simplified system diagram.
ORDERING INFORMATION
PACKAGE
TEMPERATURE
RANGE
TYPE NUMBER
NAME
DESCRIPTION
SA56600-42D
2001 Jun 19
SO8
plastic small outline package; 8 leads; body width 3.9 mm
–40 to +85 °C
2
853–2249 26559
Philips Semiconductors
Product data
System reset for lithium battery back-up
SA56600-42
Part number marking
PIN CONFIGURATION
The package is marked with a four letter code in the first line to the
right of the logo. The first three letters designate the product. The
fourth letter, represented by ‘x’, is a date tracking code. The
remaining two or three lines of characters are internal manufacturing
codes.
TOP VIEW
GND
RESET
CS
1
2
3
4
8
7
6
5
V
CC
Y
SO8
V
OUT
V
CS
BATT
SL01278
Figure 2. Pin configuration.
Part number
Marking
SA56600-42
A A A x
PIN DESCRIPTION
PIN
1
SYMBOL
GND
DESCRIPTION
Circuit ground for the device.
2
RESET
Asserted open collector output LOW whenever the V input source voltage falls below V (4.2 V typical).
CC S
The open collector topology requires an external pull-up resistor.
3
CS
Chip select HIGH output signal, asserted whenever the V input source voltage is above V (4.2 V typical).
CC S
Can be used as a chip enable HIGH (CE) signal for system SRAM.
4
5
V
Positive polarity connection for lithium back-up battery.
BATT
CS
Asserted chip select LOW output signal whenever the V input source voltage is above V (4.2 V typical)
CC S
and Y is grounded. Can be used as a chip enable LOW (CE) signal for system SRAM.
6
V
OUT
Primary power with lithium battery back-up power for the protected system. Switch over to lithium battery
back-up operation occurs when V falls below V .
CC
S
7
8
Y
V
Open Emitter input to microcontroller used to enable CS output (microcontroller controls CS function).
Primary input power source for device.
CC
MAXIMUM RATINGS
SYMBOL
PARAMETER
RATING
–0.3 to +7.0
–0.3 to +7.0
80
UNIT
V
V
V
Power supply voltage
Operating voltage
Output current
CC(max)
CC(op)
V
I
O
I
O
(V
(V
)
CC
mA
µA
°C
)
Output current
200
BATT
T
Operating temperature
Storage temperature
Power dissipation
–40 to +85
–40 to +125
250
oper
T
stg
°C
P
mW
3
2001 Jun 19
Philips Semiconductors
Product data
System reset for lithium battery back-up
SA56600-42
ELECTRICAL CHARACTERISTICS
Characteristics measured with V = 5.0 V, and T
= 25 °C, unless otherwise specified.
CC
amb
SYMBOL
PARAMETER
CONDITIONS
MIN.
–
TYP.
1.4
MAX.
2.2
0.05
–
UNIT
mA
V
I
Supply current
V
= 5.0 V; V
= 3.0 V; I = 0 mA
BATT O
CC
CC
V
I/O voltage difference 1
Output voltage 1
V
= 5.0 V; V
= 5.0 V; V
= 3.0 V; I = 1.0 mA
–
0.03
4.97
4.90
4.20
100
SAT1
O1
O2
S
CC
CC
BATT
BATT
O
V
V
V
V
= 3.0 V; I = 1.0 mA
4.95
4.75
4.00
–
V
O
Output voltage 2
V
CC
= 5.0 V; V
= 3.0 V; I = 15 mA
–
V
BATT
O
Detection threshold
Detection hysteresis
Reset output LOW
V
CC
falling
4.40
–
V
∆V
∆V = V (rising V ) – V (falling V )
CC
mA
V
S
RSL
RSH
S
SH
CC
SL
V
V
CC
= 3.7 V
–
0.2
0.4
±0.1
1.2
I
Reset leakage current HIGH
V
CC
= 5.0 V; V = 7.0 V
–
±0.01
0.8
µA
V
RS
V
OPL
Reset assertion
V
RSL
≤ 0.4 V; V falling; R = 10 kΩ
–
CC
PU
(minimum operating voltage)
V
V
V
V
CS output voltage LOW
CS output voltage HIGH
CS output voltage LOW
CS output voltage HIGH
V
= 3.7 V; V
= 3.0 V; I = 1.0 µA
–
4.90
–
–
–
–
–
–
0.1
–
V
V
CSL
CSH
CSL
CSH
CC
BATT
CS
V
CC
= 5.0 V; V
= 3.0 V; I = –1.0 µA
CS
BATT
V
= 5.0 V; V
= 3.0 V; I = 1.0 µA
0.2
–
V
CC
CC
BATT
BATT
CS
V
= 3.7 V; V
= 3.0 V; I = –1.0 µA
V
– 0.1
V
CS
O
∆V /∆T
Detection voltage temperature
characteristic
–40 ≤ T
≤ +85
–
±0.05
%/°C
S
amb
V
V
Battery back-up threshold
Battery back-up hysteresis
V
falling
3.15
–
3.30
100
3.45
1.0
V
BT
CC
V
=
mV
BT(HYS)
BT(HYS)
V
BTH
(V rising) – V
(V falling)
CC
BTL CC
V /∆T
BT
Switching voltage temperature
characteristic
–40 ≤ T
≤ +85
–
–
±0.05
%/°C
amb
I
Loss current
V
= 0 V; V
= 3.0 V; I = 0 µA
–
–
0.3
0.2
2.8
2.7
1.25
–
0.5
0.3
–
µA
V
L
CC
BATT
O
V
V
V
V
I/O voltage difference 2
Output voltage 3
V
CC
V
CC
= 0 V; V
= 3.0 V; I = 1.0 µA
O
SAT2
O3
BATT
BATT
= 0 V; V
= 0 V; V
= 3.0 V; I = 1.0 µA
2.7
2.6
–
V
O
Output voltage 4
V
= 3.0 V; I = 100 µA
–
V
O4
CC
BATT
CS
Reference voltage (typical)
–
V
REF
I
I
t
t
V
BATT
leakage current
V
CC
= 5.0 V; V = 0 V
BATT
–
0.1
400
20
20
µA
µA
ns
ns
BL
Y current
V
CC
= 5.0 V; V
= 3.0 V; V = 0 V
–
150
8.0
8.0
YLO
PLH
PHL
BATT
Y
Y propagation delay time (Note 1)
Y propagation delay time (Note 1)
VY = logic LOW to logic HIGH
VY = logic HIGH to logic LOW
–
–
NOTE:
1. Y input rise and fall time less than 6.0 ns. 15 pF capacitance load on CS (Pin 5 to GND).
4
2001 Jun 19
Philips Semiconductors
Product data
System reset for lithium battery back-up
SA56600-42
TYPICAL PERFORMANCE CURVES
5.3
5.2
5.1
5.0
4.9
4.8
4.7
4.6
4.5
5.0
V
V
= 5.0 V
= 3.0 V
CC
BATT
V
V
= 5.0 V
= 3.0 V
CC
BATT
T
= –40 °C
RESET, RESET, CS, CS = OPEN
Y = GND
amb
4.9
4.8
4.7
4.6
4.5
I
= 0 mA
OUT
20 mA
40 mA
T
amb
= 25 °C
= 85 °C
= 125 °C
60 mA
T
amb
T
amb
80 mA
0
10
20
30
40
50
60
70
80
–50
–25
0
25
50
75
100
125
I , OUTPUT CURRENT (mA)
OUT
T , TEMPERATURE (°C)
amb
SL01330
SL01332
Figure 3. Output voltage versus output current.
Figure 4. Output voltage versus temperature.
3.0
2.9
3.0
2.9
2.8
V
V
= 0 V
= 3.0 V
V
V
= 0 V
CC
BATT
CC
= 3.0 V
BATT
RESET, RESET, CS, CS = OPEN
Y = GND
I
= 1.0 µA
OUT
2.8
T
= 125 °C
= 85 °C
amb
200 µA
400 µA
2.7
2.6
2.5
2.4
2.7
2.6
2.5
2.4
2.3
T
amb
600 µA
800 µA
T
= 25 °C
= –40 °C
200
amb
1000 µA
T
amb
2.3
0
400
600
800
1000
–50
–25
0
25
50
75
100
125
I , OUTPUT CURRENT (mA)
O
T , TEMPERATURE (°C)
amb
SL01331
SL01333
Figure 5. Output voltage versus current.
Figure 6. Output voltage versus temperature.
5.0
4.5
4.0
3.5
3.0
15
10
V
V
T
= OPEN
= 3.0 V
= 25 °C
I = 0 mA
O
OUT
BATT
amb
V
T
= 3.0 V
= 25 °C
BATT
amb
5.0
0
2.5
2.0
1.5
1.0
0.5
0
–5.0
–10
0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10
0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0 10.0
SL01335
V
, SUPPLY VOLTAGE (V)
V
CC
, SUPPLY VOLTAGE (V)
CC
SL01334
Figure 7. Supply current versus supply voltage.
Figure 8. Battery current versus supply voltage.
5
2001 Jun 19
Philips Semiconductors
Product data
System reset for lithium battery back-up
SA56600-42
4.30
150
125
100
75
∆V = V – V
SL
S
SH
V
V
= FALLING
CC
(V = Rising then Falling)
CC
= 3.0 V
BATT
V
= 3.0 V
BATT
RESET, CS = OPEN
Y = GND
RESET, CS, V
Y = GND
= OPEN
OUT
4.25
4.20
4.15
4.10
50
–50
–25
0
25
50
75
100
125
–50
–25
0
25
50
75
100
125
T , TEMPERATURE °C)
amb
T , TEMPERATURE (°C)
amb
SL01336
SL01337
Figure 9. Detection threshold versus temperature.
Figure 10. Detection hysteresis versus temperature.
4
3.00
2.75
2.00
1.75
1.50
1.25
1.00
10
V
V
= 3.0 V
= OPEN
V
V
= 5.0 V
CC
= 0 V
BATT
BATT
OUT
3
2
10
10
1
10
10
0
–50
–25
0
25
50
75
100
125
–50
–25
0
25
50
75
100
125
T , TEMPERATURE (°C)
amb
T , TEMPERATURE (°C)
amb
SL01338
SL01339
Figure 11. Power supply current versus temperature.
Figure 12. Output reverse current versus temperature.
4
10
V
V
= 0 V
CC
= 3.0 V
BATT
I
= 0 µA
OUT
3
2
10
10
1
0
10
10
–50
–25
0
25
50
75
100
125
T , TEMPERATURE (°C)
amb
SL01334
Figure 13. Battery loss current versus temperature.
6
2001 Jun 19
Philips Semiconductors
Product data
System reset for lithium battery back-up
SA56600-42
CS goes to a LOW logic state only when V is above 4.2 V plus
TECHNICAL DESCRIPTION
CC
hysteresis, and Y is simultaneously at a LOW logic state. If Y is not
a LOW logic state (is open or at a HIGH logic state) CS will be at a
HIGH logic state. Essentially, Y functions as a control switch for CS
and is normally used as an input gating signal from the computer’s
microprocessor.
The SA56600-42 provides battery back-up functions to protect
SRAM data in computer memory systems. In addition, it provides
RESET, Chip Select HIGH (CS), and Chip Select LOW (CS)
outputs. The device incorporates a 3.3 V detection circuit,
4.2 V detection circuit, PNP switching transistor, and Schottky diode
for low drop lithium battery connection to the output.
Caution should be exercised in the application to keep the voltage
on Y to less than 5.0 V when the V voltage is less than 4.2 V to
CC
During power-up, RESET is actively asserted (LOW logic state) at
avoid breaking down the Emitter-Base junction of the internal NPN
transistor associated with Y. Breakdown of the junction may produce
excessive current flow causing damage to the device. When the
V
voltages as low as 0.8 V and does not output a release (HIGH
CC
logic state) until V attains 4.2 V plus hysteresis. CS, in a similar
manner, only transitions to a HIGH logic state when V attains
4.2 V plus hysteresis. This ensures adequate voltage being present
at the output of the SA56600 for proper operation of the associated
computer system.
CC
CC
V
CC
voltage is less than 4.2 V, the base of the NPN transistor
associated with the Y is at a LOW logic state and most susceptible
to an overvoltage on Y.
Recovering primary V power is sensed by the 3.3 V detection
circuit. The PNP switching transistor is activated when the applied
CC
If the V voltage falls below 4.2 V, CS and RESET both go to a
LOW logic state. During this time, with CS in a LOW logic state, no
data ca be read from, or written to, the SRAM device. If the primary
CC
V
CC
voltage reaches 3.3 V plus hysteresis. When this event occurs,
the Schottky diode becomes back-biased, automatically
disconnecting the lithium battery from the output and the SRAM is
voltage (V ) continues to fall to 3.3 V and below, the PNP
CC
switching transistor disconnects the primary input source power
once again supported by the primary V power source. Full
CC
(V ) from the output and the Schottky diode automatically couples
CC
operation is restored when the applied primary V voltage reaches
CC
the lithium battery power to the output of the SA56600 to supply
sustaining power to the SRAM memory.
the required 4.2 V plus hysteresis value. This level is sensed by the
4.2 V detection circuit. RESET and CS are then caused to go to a
HIGH logic state, and the computer memory is back in full operation
without any loss of SRAM data.
The SA56600 provides complementary CS and CS outputs. The
outputs differ in ways other than being simple complements of each
other. The logic state of CS is strictly a function of V voltage.
CC
When V is above 4.2 V plus hysteresis, CS is in a HIGH logic
CC
state. When V is below 4.2 V, CS is in a LOW logic state.
CC
V
V
OUT
VOLTAGE
TO SRAM
SA56600–42
6
4
BATT
V
8
CC
R
47 kΩ
PNP
SWITCHING
TRANSISTOR
R
R
R
R
R
R
R
R
R1
C1
C2
R
R
R
R
R
R
LITHIUM
BATTERY
R
R
47 kΩ
R
R
1
GND
1
GND
5
3
7
2
R1 = OVERVOLTAGE CURRENT LIMITING RESISTOR
C1, C2 = POWER SUPPLY BYPASS CAPACITOR
CS
Y
CS
RESET
SL01342
Figure 14. Functional diagram.
7
2001 Jun 19
Philips Semiconductors
Product data
System reset for lithium battery back-up
SA56600-42
Timing diagram
The Timing Diagram shown in Figure 15 depicts the operation of the
SA56600-42 in its intended application, with a 3.0 V Lithium battery
serving as a backup power source for external SRAM circuitry (see
the Simplified system diagram, Figure 1). Letters indicate events
along the Time axis.
F: As V continues to rise, RESET, CS, and V
also continue to
CC
OUT
rise. Just before ‘F’, Y is asserted HIGH by the microprocessing
circuitry. This causes CS to change from a LOW state to a HIGH
state. Following ‘F’ the microprocessing circuitry is signaling Y
through repetitive cycles. This causes CS to also cycle, but has no
effect on the battery circuit.
A: At ‘A’, the V primary power source is off. As a result of the
CC
backup battery, the CS and V
outputs are almost up to the
G: At ‘G’, the V voltage begins to fall. As a result RESET, CS,
CC
OUT
Lithium battery potential (V ). All other outputs (Y, RESET, and CS)
and V fall.
CC
B
are at or very near ground potential.
H: When the V voltage falls to V (4.2 V) it is detected by the
CC
S
B - C: At ‘B’, the V voltage begins to rise. Also the RESET
voltage initially rises but then abruptly returns to a LOW state at ‘C’.
internal 4.2 V detector circuit. The detector circuit forces RESET and
CS LOW, deselecting the SRAM and stopping data storage and
retrieval. The PNP series pass switching transistor disconnects the
primary input source voltage from the output, transferring the SRAM
to the backup battery. In addition, because Y is already at a LOW
CC
when the V voltage reaches the level which activates the internal
CC
bias circuitry and asserts RESET to a logic LOW. This occurs at
approximately 0.8 volts.
state, CS rises abruptly close to V followed by a continued fall to
S
D - E: At ‘D’ the internal 3.3 V detection circuit is activated when
V
B
(Lithium battery potential), following V
.
CC
V
CC
voltage rises to 3.3 V. The circuit causes the PNP series pass
switching transistor in the output to activate, connecting the main
power supply voltage (V ) to the output. This causes the Lithium
J: At ‘J’, V
has also fallen with V to a level that is now
OUT CC
dictated by the Lithium battery potential. The Lithium battery is now
maintaining the V voltage to preserve the SRAM data.
CC
battery to be automatically disconnected from V
by back-biasing
OUT
OUT
the Schottky diode. As a result, CS and V
begin to rise with V
.
CC
OUT
K - L: As the V voltage falls to a level which no longer allows the
CC
E: At ‘E’, V has risen to the upper detection threshold (V plus
internal bias circuitry to remain active, the assertion of RESET can
no longer be maintained. RESET rises slightly, then falls to ground
CC
S
hysteresis) as sensed by the device’s internal 4.2 V detection circuit.
This event signals that the output voltage is adequate to support full
operation of the associated external computer circuitry. RESET goes
HIGH, allowing the microprocessor circuitry to operate.
Simultaneously, CS also goes HIGH, signaling the SRAM to start
receiving data. CS goes LOW as a result of Y simultaneously being
at a LOW state.
as V falls to ground.
CC
M: Y is asserted HIGH again by the microprocessor, but because
V
CC
is below V , CS remains HIGH and CS remains LOW,
S
preventing the SRAM from being selected.
Y controls the CS output. As long as Y is LOW, the CS output is
enabled.
5.0
V
V
S
B
V
CC
V
OPL
0
0
0
0
0
Y
RESET
V
RSH
V
RSL
CS
V
CSH
V
CSL
≤V
B
CS
V
CSH
V
CSL
V
OUT
V
O1, O2
V
O3, O4
0
A
B
C
D
E
F
G
H
J
K L
TIME
SL01341
Figure 15. Timing diagram.
8
2001 Jun 19
Philips Semiconductors
Product data
System reset for lithium battery back-up
SA56600-42
PACKING METHOD
GUARD
BAND
TAPE
TAPE DETAIL
REEL
ASSEMBLY
COVER TAPE
CARRIER TAPE
BARCODE
LABEL
BOX
SL01305
Figure 16. Tape and reel packing method.
9
2001 Jun 19
Philips Semiconductors
Product data
System reset for lithium battery back-up
SA56600-42
SO8: plastic small outline package; 8 leads; body width 3.9 mm
pin 1 index
B
2
4.95
4.80
0.51
0.33
4.95
4.80
1.27
0.38
0.076
0.003
1.73
0.189 0.013
0.195 0.020
0.050
0.015
0.068
SO8
10
2001 Jun 19
Philips Semiconductors
Product data
System reset for lithium battery back-up
SA56600-42
NOTES
11
2001 Jun 19
Philips Semiconductors
Product data
System reset for lithium battery back-up
SA56600-42
Data sheet status
Product
status
Definitions
[1]
Data sheet status
[2]
Objective data
Development
This data sheet contains data from the objective specification for product development.
Philips Semiconductors reserves the right to change the specification in any manner without notice.
Preliminary data
Product data
Qualification
Production
This data sheet contains data from the preliminary specification. Supplementary data will be
published at a later date. Philips Semiconductors reserves the right to change the specification
without notice, in order to improve the design and supply the best possible product.
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply.
Changes will be communicated according to the Customer Product/Process Change Notification
(CPCN) procedure SNW-SQ-650A.
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on
the Internet at URL http://www.semiconductors.philips.com.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 2001
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Date of release: 06-01
Document order number:
9397 750 08448
Philips
Semiconductors
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