SA56613-47 [NXP]
IC,VOLT REGULATOR,FIXED,+5V,CMOS,SOP,8PIN,PLASTIC;
| 型号： | SA56613-47 |
| 厂家： | 
NXP |
| 描述： | IC,VOLT REGULATOR,FIXED,+5V,CMOS,SOP,8PIN,PLASTIC |
| 文件： | 总11页 (文件大小：114K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
SA56613-XX
5 V, 150 mA LDO and independent
delayed RESET
Product data
2003 Oct 30
Supersedes data of 2002 Mar 25
Philips
Semiconductors
Philips Semiconductors
Product data
5 V, 150 mA LDO and independent delayed RESET
SA56613-XX
DESCRIPTION
The SA56613-XX has a precise fixed 5 V output with a typical
accuracy of ±2% to provide very low dropout and low noise in
CD-ROM drives, battery-operated systems, and portable computers
applications. This regulator consists of an internal voltage reference,
an error amplifier, a driver with current limiter and a thermal
shutdown.
An Active-LOW RESET is asserted when the regulator output
voltage (V ) falls below the reset detection voltage threshold. The
OUT
SA56613-XX is available with fixed detection threshold voltages of
4.2, 4.5, and 4.7 V. The RESET output remains low for 1 ms (typical)
when a 10 nF capacitor is connected to C pin. The reset time delay
D
can be adjusted by replacing capacitance values from C pin to
D
Ground.
The device is available in the small SO8 package (SOP005).
FEATURES
APPLICATIONS
• Very low dropout voltage: 250 mV typ. (I = 30 mA)
• TV and monitors
out
• High precision output voltage: ±2%
• Output current capacity: 150 mA
• Electronic notebooks, PDAs and Palmtop computers
• Cameras, VCRs and camcorders
• PCMCIA cards and CD-ROM drives
• Modems
• Low Noise: 200 µV
typ. @ 20 Hz to 80 kHz and for
rms
I
= 30 mA
OUT
• Extremely good line regulation: 10 mV typical
• Very good load regulation: 40 mV typical
• Battery-powered or hand-held instruments
• Low temperature drift co-efficient to V
: ±100 ppm/°C
OUT
• Internal current limit and thermal shut-down circuits
• Adjustment-free reset detection voltages: 4.2 V typ., 4.5 V typ.
and 4.7 V typ.
• Delay time can be adjusted by external capacitor.
• Wide operating temperature range: –40 °C to +85 °C
SIMPLIFIED SYSTEM DIAGRAM
V
V
+5 V
IN
OUT
A
4
3
5
2
C
OUT
0.1 µF
(Ceramic)
SA56613-XX
4.7 µF
(AL-Electrolytic)
C
RESET
D
1
0.1 µF
GND
SL01648
Figure 1. Simplified system diagram.
2
2003 Oct 30
Philips Semiconductors
Product data
5 V, 150 mA LDO and independent delayed RESET
SA56613-XX
ORDERING INFORMATION
PACKAGE
TEMPERATURE
RANGE
TYPE NUMBER
NAME
DESCRIPTION
VERSION
SOP005
SA56613-XXD
SO8
plastic small outline package; 8 leads; body width 3.9 mm
–40 to +85 °C
NOTE:
The device has 3 voltage options, indicated by the XX on the
‘Type number’.
XX
OUTPUT VOLTAGE
(Typical)
RESET THRESHOLD
(Typical)
42
45
47
5.0 V
5.0 V
5.0 V
4.2 V
4.5 V
4.7 V
PIN CONFIGURATION
PIN DESCRIPTION
PIN
1
SYMBOL
GND
DESCRIPTION
TOP VIEW
GND
1
2
3
4
8
7
6
5
n.c.
Ground
Active-LOW reset signal output pin.
The output remains LOW while V
RESET
GND
GND
2
RESET
SO8
is
OUT
C
V
D
below V , the reset threshold, and for an
SH
V
external set time delay C pin after V
IN
OUT
D
OUT
rises above reset threshold.
SL01649
3
C
Reset delay time capacitor pin.
D
Figure 2. Pin configuration.
RESET pin output delay time can be set by
the capacitance connected to the C pin.
D
5
t
= 10 × C
PLH
where:
t
= transmission delay time (s)
PLH
C = capacitor value (F)
Supply voltage input pin
Regulated output voltage pin
Ground pin and heat sink
Ground pin and heat sink
not connected
4
5
6
7
8
V
V
IN
OUT
GND
GND
n.c.
MAXIMUM RATINGS
SYMBOL
PARAMETER
MIN.
–0.3
–
MAX.
+18
UNIT
V
V
IN
Input supply voltage
Output current
I
200
mA
°C
OUT
T
opr
Operating ambient temperature
Storage temperature
–40
–40
–
+85
T
stg
+150
+125
650
°C
T
j(max)
Maximum junction temperature
Power dissipation (Note 1)
°C
P
D
Derate 6.5 mW/°C above T
25 °C
–
mW
amb
NOTE:
1. When mounted on a 55 × 20 mm paper phenol board.
3
2003 Oct 30
Philips Semiconductors
Product data
5 V, 150 mA LDO and independent delayed RESET
SA56613-XX
ELECTRICAL CHARACTERISTICS
T
amb
= 25 °C, Figure 13 “Test circuit”, unless otherwise specified.
SYMBOL
PARAMETER
No-load input current 1
No-load input current 2
CONDITIONS
MIN.
TYP.
400
2.5
MAX.
800
–
UNIT
µA
I
I
V
V
= 6 V; I
= 4 V; I
= 0 mA
= 0 mA
–
–
CCq1
CCq2
IN
OUT
OUT
µA
IN
Regulator
V
Output voltage
V
V
V
V
= 6 V; I
= 30 mA
4.90
5.00
0.25
10
5.10
0.5
30
80
–
V
V
OUT
IN
IN
IN
IN
OUT
V
i/o(dif)
Input/output differential voltage
Line regulation
= 4.8 V; I
= 150 mA
OUT
–
–
–
–
∆V
∆V
∆V
= 6 V → 10 V; I
= 30 mA
OUT
mV
1
Load regulation
= 6 V; I
= 0 mA → 150 mA
OUT
40
mV
2
/∆T
V
OUT
temperature coefficient (Note 1) T = –20 °C → +85 °C;
100
ppm/°C
OUT
j
V
IN
= 6 V; I
= 30 mA
OUT
RR
Ripple rejection (Note 1)
V
V
= 6 V; f = 120 Hz;
50
–
60
–
dB
IN
= 1 V ; I
= 30 mA
RIPPLE
p-p OUT
V
n(o)
Noise output voltage (Note 1)
V
IN
= 6 V; f = 20 80 kHz;
200
400
µV
rms
I
= 30 mA
OUT
Reset
V
IN
= H → L
V
S
Detection voltage
SA56613–42
SA56613–45
SA56613–47
4.03
4.31
4.51
4.20
4.50
4.70
4.37
4.69
4.89
V
V
V
∆V /∆T
V
temperature coefficient (Note 1)
T = –20 °C → +85 °C
–
25
–
100
50
–
ppm/°C
mV
mV
ms
S
S
j
∆V
Hysteresis voltage
V
IN
V
IN
V
IN
V
IN
V
OL
= H → L → H
100
200
15
S
OL
V
LOW-level output voltage
Reset delay time
= 3.9 V; R = 4.7 kΩ
100
10
L
t
= 4 V → 5 V; C = 0.1 µF
5
PLH1
PHL
D
t
‘L’ transmission delay time (Note 1)
Threshold operating voltage
= 5 V → 4 V; C = 0.1 µF
–
30
90
µs
D
V
OPL
= 0.4 V
–
0.65
0.85
V
NOTE:
1. This parameter is guaranteed by design.
4
2003 Oct 30
Philips Semiconductors
Product data
5 V, 150 mA LDO and independent delayed RESET
SA56613-XX
TYPICAL PERFORMANCE CURVES (SA56613-42D)
6
3.0
2.5
5
V
OUT
4
3
2
2.0
1.5
1.0
RESET
1
0
0.5
0
0
1
2
3
4
5
6
7
0
0
0
2
4
6
8
10
12
14
16
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
SL01658
SL01657
Figure 3. Detection voltage (I
= 0 mA).
Figure 4. Quiescent current (I
= 0 mA).
OUT
OUT
30
20
60
40
10
0
20
0
–10
–20
–20
–30
–40
–60
4
6
50
8
10
INPUT VOLTAGE (V)
12
14
16
100
150
OUTPUT CURRENT (mA)
SL01652
SL01653
Figure 5. Line regulation.
Figure 6. Load regulation.
100
90
80
70
60
50
40
30
20
10
0
6
5
4
3
2
1
0
10
100
1000
10000
100000
50
100
150
200
250
300
FREQUENCY (Hz)
OUTPUT CURRENT (mA)
SL01638
SL01654
Figure 7. Ripple rejection.
Figure 8. Current limit.
5
2003 Oct 30
Philips Semiconductors
Product data
5 V, 150 mA LDO and independent delayed RESET
SA56613-XX
800
700
600
500
400
300
200
100
0
100
ON BOARD 55 × 22 mm
6.5 mW/°C
10
1
0.01
0.1
1
–25
0
25
50
75
100
125
C
CAPACITOR (µF)
TEMPERATURE (°C)
D
SL01656
SL01655
Figure 9. Reset delay time.
Figure 10. Power dissipation.
6
2003 Oct 30
Philips Semiconductors
Product data
5 V, 150 mA LDO and independent delayed RESET
SA56613-XX
TIMING DIAGRAM
The Timing Diagram in Figure 11 depicts the operation of the device.
Letters A-I on the Time axis indicates specific events.
E-F: Between “E” and “F”, V
rising.
continues to fall and then starts
OUT
A: At “A”, V
abruptly begins to increase. Also the RESET
F: At “F”, V
rises to the V level. Once again, the device
OUT SH
OUT
voltage initially increases but abruptly decreases when V
reaches the threshold operating level (typically 0.65 V) that activates
the internal bias circuitry and RESET is asserted.
initiates the delay timer.
F-G: rises above V and returns to normal 5 V output. At
“G”, the delay (t
OUT
V
OUT
SH
) times out and once again, then it releases the
PLH
B: At “B”,V
reaches the threshold level of V . At this point the
hold on the RESET and it goes HIGH.
OUT
SH
delay time, t
is initiated while V
rises above V to its normal
OUT SH
PLH
G-H: At “G”, V is above the upper threshold and begins to fall,
OUT
operating level of 5 V. The RESET voltage remains LOW.
causing RESET to follow it. As long as V
remains above the
OUT
C: At “C”, V is above V and the delay time, t elapses. At
V , no reset signal will be generated.
SL
OUT
SL
PLH
this instant, the device releases the hold on the RESET. The reset
output then goes HIGH. In a microprocessor based system these
events release the reset from the microprocessor, allowing the
microprocessor to function normally.
H: At event “H”, V
threshold is reached. At this level, a RESET signal is generated and
RESET goes LOW.
falls until the V undervoltage detection
SL
OUT
I: At event “I”, V
is unable to maintain a RESET. As a result, V may rise to less
has decreased until normal internal circuit bias
OUT
D-E: At “D”, V falls below 5 V, causing V
to follow. V
OUT
IN
OUT
CC
continues to fall until the V undervoltage detection threshold is
SL
than 0.65 V. As V decreases further, the V
reset also
CC
OUT
reached at “E”. This causes a reset signal to be generated (RESET
goes LOW).
decreases to zero.
10 V
V
IN
5 V
0 V
5 V
V
SH
V
SL
V
OUT
∆V
S
0 V
5 V
RESET
t
t
PLH
PLH
0 V
A
B
C
D E
F
G
H
I
SL01651
Figure 11. Timing diagram.
7
2003 Oct 30
Philips Semiconductors
Product data
5 V, 150 mA LDO and independent delayed RESET
SA56613-XX
APPLICATION INFORMATION
PCB layout
The component placement around the LDO should be done carefully
to achieve good dynamic line and load response. The input and
noise capacitors should be kept close to the LDO.
Input capacitor
An input capacitor of ≥1 µF is required to eliminate the AC coupling
noise. This capacitor must be located as close as possible to V or
GND pin (not more than 1 cm) and returned to a clean analog ground.
Any good quality ceramic, tantalum or film capacitor will work.
IN
The rise in junction temperature depends on how efficiently the heat
is carried away from the junction to ambient. The junction to lead
thermal impedance is a characteristic of the package and fixed. The
thermal impedance between lead to ambient can be reduced by
increasing the copper area on the PCB. Increase the input, output
and ground trace area to reduce the junction-to-ambient impedance.
Output capacitor
Phase compensation is made for securing stable operation even if
the load current varies. For this reason, an output capacitor with
good frequency characteristics is needed. Set it as close to the
circuit as possible and make the wiring as short as possible.
Power dissipation
The SA56613-XX maximum power dissipation depends on the
thermal resistance from the die junction to the ambient air. The
maximum power dissipation shown in Figure 10 is 650 mW at
ambient temperature of 25 °C. It is derated at 6.5 mW/°C above
25 °C.
The value of the output capacitance has to be at least 47 µF
connected from V
to GND. When operating from sources other
OUT
than batteries, supply-noise rejection and transient response can be
improved by increasing the value of the input and output capacitors
and employing passive filtering techniques.
Power dissipation of the device is P = I
maximum power dissipation is:
(V – V
). The
OUT
D
OUT
IN
RESET output
The SA56613-XX has an Active-LOW RESET output. When V
of
OUT
(Tj * Tamb
)
the regulator rises above V , the upper detection threshold
SH
Pmax
where
+
Eqn. (3)
voltage, the reset delay time is initiated. After the programmed delay
time elapses, RESET is released and goes HIGH. The time delay
can be set typically from 1 ms to 100 ms by connecting a time delay
(qJA)
θ
= θ + θ , the junction-to-ambient thermal resistance, θ
JB BA JA
JA
capacitor from C (pin 3) to ground (see Figure 9: RESET Delay
D
calculated from Figure 10 is 154 °C/W;
time versus C , Delay Capacitor).
D
θ
is the thermal resistance from the die junction to PCB
JB
The RESET delay time (t
equation:
) can be approximated by the following
PLH
material and copper traces;
θ
is the thermal resistance from the PCB material and copper
BA
tPLH + 105 C
Eqn. (1)
traces to the surrounding air.
(Time is expressed in seconds, Capacitance in Farads.)
The GND pin provides an electrical connection to ground and a path
for heat transfer from the device to the PCB and to the surrounding
air. To maximize heat transfer, connect the GND pin to a large
ground pad or ground plane.
For example, for a delay capacitor, C of 0.1 µF (100 nF), t
approximately 10 ms.
is
PLH
D
When the regulator output Voltage falls to or below V , the lower
SL
detection threshold voltage, the RESET output is asserted and it
goes to an Active-LOW state. This “LOW” transmission delay time is
The following example determines the maximum I
at
OUT
T
amb
= 25 °C for V = 1 V.
IN
typically 30 µs with C at 100 nF.
D
PD
650 mW
(12 * 5)
IOUT
+
+
+ 92.8mA
Eqn. (4)
Reset hysteresis voltage
(VIN * VOUT
)
The reset hysteresis voltage, ∆V is defined in the following
S
The maximum output current of the SA56613-XX is reduced as the
equation:
input voltage, V and the ambient temperature, T
increase.
IN
amb
Eqn. (2)
DVS + VSH * VSL
Hysteresis voltage is typically 50 mV. This small level of hysteresis
ensures that the reset will not dither when the regulator V
is noisy.
OUT
V
V
OUT
IN
4
5
2
V
V
CC
IN
C
4.7 µF
OUT
0.1 µF
CERAMIC
LOGIC SYSTEM
SA56613-XX
C
RESET
D
3
RESET
GND
1
0.1 µF
GND
SL01729
Figure 12. Typical application circuit.
8
2003 Oct 30
Philips Semiconductors
Product data
5 V, 150 mA LDO and independent delayed RESET
SA56613-XX
V
V
OUT
IN
A
4
3
5
2
A
0.1 µF
SA56613-XX
4.7 µF
C
RESET
D
V
1
0.1 µF
GND
SL01650
Figure 13. Test circuit.
PACKING METHOD
The SA56613-XX is packed in reels, as shown in Figure 14.
GUARD
BAND
TAPE
TAPE DETAIL
REEL
ASSEMBLY
COVER TAPE
CARRIER TAPE
BARCODE
LABEL
BOX
SL01305
Figure 14. Tape and reel packing method.
9
2003 Oct 30
Philips Semiconductors
Product data
5 V, 150 mA LDO and independent delayed RESET
SA56613-XX
SO8: plastic small outline package; 8 leads; body width 3.9 mm
SOP005
10
2003 Oct 30
Philips Semiconductors
Product data
5 V, 150 mA LDO and independent delayed RESET
SA56613-XX
REVISION HISTORY
Rev
Date
Description
_1
20031030
Product data (9397 750 12214). ECN 853-2331 30323 of 09 September 2003.
Supersedes data of 2002 Mar 25 (9397 750 10039).
Modifications:
• Change package outline version to SOP005 in Ordering information table and Package outline sections.
_1
20020325
Product data (9397 750 10039). ECN 853-2331 27919 of 25 March 2002.
Data sheet status
Product
status
Definitions
[1]
Level
Data sheet status
[2] [3]
I
Objective data
Development
This data sheet contains data from the objective specification for product development.
Philips Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
Production
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL
http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limitingvaluesdefinition— Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given
in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no
representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be
expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree
to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described
or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated
viaaCustomerProduct/ProcessChangeNotification(CPCN).PhilipsSemiconductorsassumesnoresponsibilityorliabilityfortheuseofanyoftheseproducts,conveys
nolicenseortitleunderanypatent, copyright, ormaskworkrighttotheseproducts, andmakesnorepresentationsorwarrantiesthattheseproductsarefreefrompatent,
copyright, or mask work right infringement, unless otherwise specified.
Koninklijke Philips Electronics N.V. 2003
Contact information
All rights reserved. Printed in U.S.A.
For additional information please visit
http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
Date of release: 10-03
9397 750 12214
For sales offices addresses send e-mail to:
sales.addresses@www.semiconductors.philips.com.
Document order number:
Philips
Semiconductors
相关型号：
SA56613-47D-T
IC VREG 5 V FIXED POSITIVE LDO REGULATOR, 0.5 V DROPOUT, PDSO8, 3.90 MM, PLASTIC, MS-012, SOP-8, Fixed Positive Single Output LDO Regulator
NXP
SA56614-185GW
IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, 1.60 MM, PLASTIC, MO-178, SOT23-5, SOT-25, SOP-5, Power Management Circuit
NXP
SA56614-20GW-G
IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, 1.50 MM, PLASTIC, SOT-23, SOT-25, SO-5, Power Management Circuit
NXP
SA56614-27GW-G
IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, 1.50 MM, PLASTIC, SOT-23, SOT-25, SO-5, Power Management Circuit
NXP
©2020 ICPDF网 联系我们和版权申明