SA572F [NXP]
Programmable analog compandor; 可编程模拟扩
| 型号： | SA572F |
| 厂家： | 
NXP |
| 描述： | Programmable analog compandor |
| 文件： | 总8页 (文件大小：127K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Philips Semiconductors RF Communications Products
Product specification
Programmable analog compandor
NE/SA572
DESCRIPTION
FEATURES
PIN CONFIGURATION
The NE572 is a dual-channel,
1
D , N, F Packages
• Independent control of attack and recovery
high-performance gain control circuit in which
either channel may be used for dynamic
range compression or expansion. Each
channel has a full-wave rectifier to detect the
average value of input signal, a linearized,
temperature-compensated variable gain cell
(∆G) and a dynamic time constant buffer. The
buffer permits independent control of
dynamic attack and recovery time with
minimum external components and improved
low frequency gain control ripple distortion
over previous compandors.
time
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
TRACK TRIM A
CC
• Improved low frequency gain control ripple
TRACK TRIM B
RECOV. CAP A
RECT. IN A
• Complementary gain compression and
RECOV. CAP B
RECT. IN B
expansion with external op amp
ATTACK CAP A
• Wide dynamic range—greater than 110dB
• Temperature-compensated gain control
• Low distortion gain cell
∆G OUT A
ATTACK CAP B
∆G OUT B
THD TRIM A
∆G IN A
THD TRIM B
∆G IN B
GND
• Low noise—6µV typical
• Wide supply voltage range—6V-22V
The NE572 is intended for noise reduction in
high-performance audio systems. It can also
be used in a wide range of communication
systems and video recording applications.
NOTE:
1. D package released in large SO (SOL) package
only.
• System level adjustable with external
components
APPLICATIONS
• Dynamic noise reduction system
• Voltage control amplifier
• Stereo expandor
• Automatic level control
• High-level limiter
• Low-level noise gate
• State variable filter
ORDERING INFORMATION
DESCRIPTION
TEMPERATURE RANGE
ORDER CODE
NE572D
DWG #
0005
0406
0005
0582
0406
16-Pin Plastic Small Outline (SO)
16-Pin Plastic Dual In-Line Package (DIP)
16-Pin Plastic Small Outline (SO)
16-Pin Ceramic Dual In-Line Package (Cerdip)
16-Pin Plastic Dual In-Line Package (DIP)
0 to +70°C
0 to +70°C
NE572N
–40 to +85°C
–40 to +85°C
–40 to +85°C
SA572D
SA572F
SA572N
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
Supply voltage
RATING
UNIT
V
22
V
DC
CC
T
A
Operating temperature range
NE572
0 to +70
–40 to +85
500
°C
SA572
P
D
Power dissipation
mW
2
October 7, 1987
853-0813 90829
Philips Semiconductors RF Communications Products
Product specification
Programmable analog compandor
NE/SA572
BLOCK DIAGRAM
R1
(5,11)
(7,9)
6.8k
∆G
(6,10)
500
Ω
GAIN CELL
(1,15)
–
+
–
+
(3,13)
10k
BUFFER
10k
270
RECTIFIER
Ω
(16)
P.S.
(8)
(4,12)
(2,14)
DC ELECTRICAL CHARACTERISTICS
Standard test conditions (unless otherwise noted) V =15V, T =25°C; Expandor mode (see Test Circuit). Input signals at unity gain level (0dB)
CC
A
= 100mV
at 1kHz; V = V ; R = 3.3kΩ; R = 17.3kΩ.
1 2 2 3
RMS
SYMBOL
PARAMETER
TEST CONDITIONS
NE572
Typ
SA572
Typ
UNIT
Min
Max
22
Min
Max
22
V
CC
Supply voltage
6
6
V
DC
I
Supply current
No signal
6
6.3
2.7
mA
CC
V
Internal voltage reference
2.3
2.5
0.2
2.7
2.3
2.5
0.2
V
DC
R
Total harmonic distortion
(untrimmed)
THD
THD
THD
1kHz C =1.0µF
1.0
1.0
%
A
Total harmonic distortion
(trimmed)
1kHz C =10µF
0.05
0.25
6
0.05
0.25
6
%
%
R
Total harmonic distortion
(trimmed)
100Hz
Input to V and V grounded
1
2
No signal output noise
25
25
µV
mV
(20–20kHz)
Input change from no signal to
DC level shift (untrimmed)
±20
±50
±20
±50
100mV
RMS
Unity gain level
–1
0
+1
–1.5
0
+1.5
3
dB
%
Large–signal distortion
Tracking error (measured
relative to value at unity
gain)=
V =V =400mV
0.7
3.0
0.7
1
2
Rectifier input
V =+6dB V =0dB
±0.2
±0.5
±0.2
±0.5
2
1
[V –V (unity gain)]dB
V =–30dB V =0dB
–1.5
+0.8
–2.5
+1.6
dB
O
O
2
1
–V dB
2
200mV
into channel A, measured
output on channel B
RMS
Channel crosstalk
60
60
dB
dB
Power supply rejection ra-
tio
PSRR
120Hz
70
70
3
October 7, 1987
Philips Semiconductors RF Communications Products
Product specification
Programmable analog compandor
NE/SA572
TEST CIRCUIT
100Ω
1µF
–15V
22µF
+
1%
2.2µF
R
3
6.8k
(7,9)
(5,11)
∆G
V
1
17.3k
82k
–
+
5Ω
270pF
(2,14)
(4,12)
NE5234
V
0
2.2k
= 10µF
(6,10)
BUFFER
1k
+
2.2µF
(8)
(1,15)
2.2µF
3.3k (3,13)
+15V
V
RECTIFIER
2
(16)
+
R
2
1%
22µF
.1µF
attack capacitor C with an internal 10k
inherent low distortion, low noise and the
capability to linearize large signals, a wide
dynamic range can be obtained. The buffer
amplifiers are provided to permit control of
attack time and recovery time independent of
each other. Partitioned as shown in the block
diagram, the IC allows flexibility in the design
of system levels that optimize DC shift, ripple
distortion, tracking accuracy and noise floor
for a wide range of application requirements.
AUDIO SIGNAL PROCESSING IC
COMBINES VCA AND FAST AT-
TACK/SLOW RECOVERY LEVEL
A
resistor R defines the attack time t . The
A
A
recovery time t of a tone burst is defined by
R
a recovery capacitor C and an internal 10k
R
SENSOR
resistor R . Typical attack time of 4ms for
R
In high-performance audio gain control
applications, it is desirable to independently
control the attack and recovery time of the
gain control signal. This is true, for example,
in compandor applications for noise
reduction. In high end systems the input
signal is usually split into two or more
frequency bands to optimize the dynamic
behavior for each band. This reduces low
frequency distortion due to control signal
ripple, phase distortion, high frequency
channel overload and noise modulation.
Because of the expense in hardware, multiple
band signal processing up to now was limited
to professional audio applications.
the high-frequency spectrum and 40ms for
the low frequency band can be obtained with
0.1µF and 1.0µF attack capacitors,
respectively. Recovery time of 200ms can be
obtained with a 4.7µF recovery capacitor for
a 100Hz signal, the third harmonic distortion
is improved by more than 10dB over the
simple RC ripple filter with a single 1.0µF
attack and recovery capacitor, while the
attack time remains the same.
Gain Cell
Figure 1 shows the circuit configuration of the
gain cell. Bases of the differential pairs Q -Q
1
2
and Q -Q are both tied to the output and
3
4
The NE572 is assembled in a standard
16-pin dual in-line plastic package and in
oversized SOL package. It operates over a
wide supply range from 6V to 22V. Supply
current is less than 6mA. The NE572 is
designed for consumer application over a
inputs of OPA A . The negative feedback
1
through Q holds the V of Q -Q and the
1
BE
1
2
V
BE
of Q -Q equal. The following
3 4
relationship can be derived from the
transistor model equation in the forward
active region.
With the introduction of the Signetics NE572
this high-performance noise reduction
concept becomes feasible for consumer hi fi
applications. The NE572 is a dual channel
gain control IC. Each channel has a
linearized, temperature-compensated gain
cell and an improved level sensor. In
conjunction with an external low noise op
amp for current-to-voltage conversion, the
VCA features low distortion, low noise and
wide dynamic range.
temperature range 0-70 The SA572 is
intended for applications from –40°C to
+85°C.
DVBE
+ DBE
Q3Q4
Q1Q2
(V = V I IC/IS)
BE
T IN
NE572 BASIC APPLICATIONS
Description
The NE572 consists of two linearized,
temperature-compensated gain cells (∆G),
each with a full-wave rectifier and a buffer
amplifier as shown in the block diagram. The
two channels share a 2.5V common bias
reference derived from the power supply but
otherwise operate independently. Because of
The novel level sensor which provides gain
control current for the VCA gives lower gain
control ripple and independent control of fast
attack, slow recovery dynamic response. An
4
October 7, 1987
Philips Semiconductors RF Communications Products
Product specification
Programmable analog compandor
NE/SA572
1
2
1
2
1
2
1
2
IG
IO
IG
IO
V+
VTIn
VTIn
IS
IS
VIN
R1
where IIN
+
R = 6.8kΩ
1
I = 140µA
1
I = 280µA
2
1
2
1
2
I
I
G
O
I
1
140µA
I1
IIN
I2
I1
IIN
VTIn
VTIn
(2)
IS
IS
A1
I
O
VIN
–
+
where IIN
+
R1
R = 6.8kΩ
I = 140µA
1
Q
1
Q
Q
1
2
Q
3
4
I = 280µA
2
R1
6.8k
I
O
is the differential output current of the gain
I
2
I
cell and I is the gain control current of the
gain cell.
G
G
280µA
V
REF
THD
TRIM
If all transistors Q through Q are of the
1
4
same size, equation (2) can be simplified to:
V
IN
2
I2
1
I2
Figure 1. Basic Gain Cell Schematic
IO
+
IIN IG
I2
2I1
IG
(3)
The internal bias scheme limits the maximum
The first term of Equation 3 shows the
Rectifier
output current I to be around 300µA. Within a
multiplier relationship of a linearized two
quadrant transconductance amplifier. The
second term is the gain control feedthrough
due to the mismatch of devices. In the
design, this has been minimized by large
matched devices and careful layout. Offset
voltage is caused by the device mismatch
and it leads to even harmonic distortion. The
offset voltage can be trimmed out by feeding
a current source within ±25µA into the THD
trim pin.
R
The rectifier is a full-wave design as shown in
Figure 2. The input voltage is converted to
±1dB error band the input range of the rectifier
is about 52dB.
current through the input resistor R and
turns on either Q or Q depending on the
signal polarity. Deadband of the voltage to
current converter is reduced by the loop gain
of the gain block A . If AC coupling is used,
the rectifier error comes only from input bias
current of gain block A . The input bias
current is typically about 70nA. Frequency
response of the gain block A also causes
2
5
6
2
2
2
The residual distortion is third harmonic
distortion and is caused by gain control
ripple. In a compandor system, available
control of fast attack and slow recovery
improve ripple distortion significantly. At the
unity gain level of 100mV, the gain cell gives
THD (total harmonic distortion) of 0.17% typ.
Output noise with no input signals is only 6µV
in the audio spectrum (10Hz-20kHz). The
second-order error at high frequency. The
collector current of Q is mirrored and
6
summed at the collector of Q to form the full
5
wave rectified output current I . The rectifier
R
transfer function is
VIN
VREF
(4)
IR
+
R2
If V is AC-coupled, then the equation will be
IN
output current I must feed the virtual ground
O
reduced to:
input of an operational amplifier with a
resistor from output to inverting input. The
non-inverting input of the operational
VIN(AVG)
IRAC
+
R2
amplifier has to be biased at V
if the
REF
output current I is DC coupled.
O
5
October 7, 1987
Philips Semiconductors RF Communications Products
Product specification
Programmable analog compandor
NE/SA572
Buffer Amplifier
V
V
IN
REF
V+
In audio systems, it is desirable to have fast
attack time and slow recovery time for a tone
burst input. The fast attack time reduces
transient channel overload but also causes
low-frequency ripple distortion. The
I
+
R
R
2
low-frequency ripple distortion can be
improved with the slow recovery time. If
different attack times are implemented in
corresponding frequency spectrums in a split
band audio system, high quality performance
can be achieved. The buffer amplifier is
designed to make this feature available with
minimum external components. Referring to
Figure 3, the rectifier output current is
mirrored into the input and output of the
+
–
V
REF
A2
Q5
D7
unipolar buffer amplifier A through Q , Q
9
3
8
Q6
and Q . Diodes D and D improve
R2
10
11
12
tracking accuracy and provide
V
IN
common-mode bias for A . For a
3
positive-going input signal, the buffer
amplifier acts like a voltage-follower.
Therefore, the output impedance of A makes
3
the contribution of capacitor CR to attack time
insignificant. Neglecting diode impedance,
the gain Ga(t) for ∆G can be expressed as
follows:
Figure 2. Simplified Rectifier Schematic
t
Ga(t) + (GaINT
GaFNL
e
GaFNL
A
Ga =Initial Gain
INT
V+
Ga
=Final Gain
FNL
Q8
Q9
Q10
τ =R • CA=10k • CA
A
A
where τ is the attack time constant and R
A
A
I
= 2I
R2
is a 10k internal resistor. Diode D opens
Q
15
Q17
the feedback loop of A for a negative-going
3
signal if the value of capacitor CR is larger
than capacitor CA. The recovery time
I
R2
depends only on CR • R . If the diode
R
X2
Q16
impedance is assumed negligible, the
10k
V
IN
dynamic gain G (t) for ∆G is expressed as
R
I
+
R
R
follows.
–
+
t
D15
GR(t) + (GRINT
GRFNL
) e +G
e
GRFNL
R
D13
A3
G (t)=(G
–G
R FNL
R
R INT
R FNL
τR=R • CR=10k • CR
10k
I
R
R1
X2
Q18
Q14
where τR is the recovery time constant and
is a 10k internal resistor. The gain control
R
R
D11
current is mirrored to the gain cell through
. The low level gain errors due to input
D12
Q
14
bias current of A and A can be trimmed
2
3
through the tracking trim pin into A with a
3
current source of ±3µA.
CR
CA
TRACKING
TRIM
Basic Expandor
Figure 4 shows an application of the circuit as
a simple expandor. The gain expression of
the system is given by
Figure 3. Buffer Amplifier Schematic
6
October 7, 1987
Philips Semiconductors RF Communications Products
Product specification
Programmable analog compandor
NE/SA572
R3 VIN(AVG)
R2 R1
VOUT
VIN
desirable system voltage and current levels.
reference Pin 6 or 10. Resistor R is used to
4
bias up the output DC level of A for
2
2
I1
(5)
+
A small R results in higher gain control
2
current and smaller static and dynamic
tracking error. However, an impedance buffer
maximum swing. The output DC level of A is
2
(I =140µA)
1
given by
A may be necessary if the input is voltage
drive with large source impedance.
1
Both the resistors R and R are tied to
1
2
internal summing nodes. R is a 6.8k internal
1
R3
R4
R3
R4
resistor. The maximum input current into the
gain cell can be as large as 140µA. This
corresponds to a voltage level of 140µA •
6.8k=952mV peak. The input peak current
into the rectifier is limited to 300µA by the
internal bias system. Note that the value of
(6)
The gain cell output current feeds the
VODC + VREF
1
VB
summing node of the external OPA A . R
2
3
and A convert the gain cell output current to
2
the output voltage. In high-performance
V
B
can be tied to a regulated power supply
applications, A has to be low-noise,
2
for a dual supply system and be grounded for
a single supply system. CA sets the attack
time constant and CR sets the recovery time
constant. *5COL
high-speed and wide band so that the
high-performance output of the gain cell will
not be degraded. The non-inverting input of
R can be increased to accommodate higher
1
input level. R and R are external resistors.
2
3
It is easy to adjust the ratio of R /R for
3
2
A can be biased at the low noise internal
2
R4
R3
+VB
17.3k
–
+
C
IN2
R1
(5,11)
A1
∆
G
C
IN1
(7,9)
6.8k
V
V
IN
A2
OUT
(6,10) R6
2.2µF
V
REF
1k
(2,14)
C1
R5
100k
(4,12)
BUFFER
2.2µF
C
2.2µF
IN3
R2
3.3k
CA CR
1µF 10µF
(3,13)
(8)
(16)
+V
CC
Figure 4. Basic Expandor Schematic
7
October 7, 1987
Philips Semiconductors RF Communications Products
Product specification
Programmable analog compandor
NE/SA572
Basic Compressor
Figure 5 shows the hook-up of the circuit as a
compressor. The IC is put in the feedback
R4
RDC1
9.1k
RDC2
9.1k
CDC
loop of the OPA A . The system gain
10µF
1
expression is as follows:
C2
.1µF
1
2
VOUT
VIN
I1
2
R2 R1
(7)
+
D1
D2
C
IN1
R3 VIN(AVG)
V
–
+
IN
R3
17.3k
R
, R
, and CDC form a DC feedback
DC1
DC2
2.2µF
A1
V
OUT
for A . The output DC level of A is given by
1
1
C1
RDC1
RDC2
(8)
VODC + VREF
1
1k R5
(6,10)
R4
V
REF
RDC1
RDC2
VB
R1
(7,9)
R4
∆
G
6.8k
C
IN2
2.2µF
The zener diodes D and D are used for
1
2
(5,11)
channel overload protection.
(2,14)
(4,12)
C
BUFFER
Basic Compandor System
IN3
2.2µF
The above basic compressor and expandor
can be applied to systems such as tape/disc
noise reduction, digital audio, bucket brigade
delay lines. Additional system design
techniques such as bandlimiting, band
splitting, pre-emphasis, de-emphasis and
equalization are easy to incorporate. The IC
is a versatile functional block to achieve a
high performance audio system. Figure 6
shows the system level diagram for
reference.
3.3k
R2
CR
CA
1µF
(3,13)
10µF
(8)
(16)
V
CC
Figure 5. Basic Compressor Schematic
8
October 7, 1987
Philips Semiconductors RF Communications Products
Product specification
Programmable analog compandor
NE/SA572
1
2
2
REL LEVEL ABS LEVEL
dB dBM
V
RMS
COMPRESSION
IN
EXPANDOR
OUT
INPUT TO ∆G
AND RECT
3.0V
+29.54
+11.76
547.6MV
400MV
+14.77
+12.0
–3.00
–5.78
100MV
10MV
1MV
0.0
–17.78
–37.78
–20
–40
–60
–57.78
–77.78
100µV
10µV
–80
–97.78
Figure 6. NE572 System Level
9
October 7, 1987
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