SA702N [NXP]
Divide by: 64/65/72 triple modulus low power ECL prescaler; 除以： 64/65/72三模低功耗ECL预分频器
| 型号： | SA702N |
| 厂家： | 
NXP |
| 描述： | Divide by: 64/65/72 triple modulus low power ECL prescaler |
| 文件： | 总7页 (文件大小：83K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Philips Semiconductors RF Communications Products
Product specification
Divide by: 64/65/72 triple modulus low power
ECL prescaler
SA702
DESCRIPTION
FEATURES
PIN CONFIGURATION
The SA702 triple modulus (Divide By
64/65/72) low power ECL prescaler is used in
synthesizer systems to achieve low phase
lock time, broad operating range, high
reference frequency and small frequency
step sizes. The minimum supply voltage is
2.7V and is compatible with the CMOS
UMA1005 synthesizer from Philips and other
logic circuits. The low supply current allows
application in battery operated low-power
equipment. Maximum input signal frequency
is 1.1GHz for cellular and other land mobile
applications. There is no lower frequency
limit due to a fully static design. The circuit is
implemented in ECL technology on the
QUBiC process. The circuit will be available
in an 8-pin SO package with 150 mil package
width and in 8-pin dual in-line plastic
package.
• Low voltage operation
N, D Package
• Low current consumption
• Operation up to 1.1GHz
• ESD hardened
IN
1
2
3
4
8
7
6
5
IN
GND
V
C
C
MC1
OUT
MC2
OUT
APPLICATIONS
• Cellular phones
• Cordless phones
• RF LANs
• Test and measurement
• Military radio
• VHF/UHF mobile radio
• VHF/UHF hand-held radio
ORDERING INFORMATION
DESCRIPTION
TEMPERATURE RANGE
-40 to +85°C
ORDER CODE
SA702N
DWG #
8-Pin Plastic Dual In-Line Package (DIP)
0404B
0174C
8-Pin Plastic Small Outline (SO) package (Surface-mount)
-40 to +85°C
SA702D
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
RATING
UNITS
V
CC
Supply voltage
-0.3 to +7.0
V
V
Voltage applied to any other pin
Output current
-0.3 to (V + 0.3)
V
IN
CC
I
O
10
mA
°C
°C
T
STG
Storage temperature range
Operating ambient temperature range
-65 to +125
-55 to +125
T
A
Thermal impedance
D package
N package
158
108
θ
°C/W
JA
2
June 17, 1993
853-1709 10044
Philips Semiconductors RF Communications Products
Product specification
Divide by: 64/65/72 triple modulus low power
ECL prescaler
SA702
BLOCK DIAGRAM
Q
D
Q
D
Q
D
Q
D
Q
Q
D
Q
Q
D
Q
D
Q
D
Q
3
June 17, 1993
Philips Semiconductors RF Communications Products
Product specification
Divide by: 64/65/72 triple modulus low power
ECL prescaler
SA702
DC ELECTRICAL CHARACTERISTICS
The following DC specifications are valid for T = 25°C and V = 3.0V; unless otherwise stated. Test circuit Figure 1.
A
CC
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
UNITS
MIN
TYP
MAX
V
Power supply voltage range
Supply current
f
IN
= 1GHz, input level = 0dBm
No load
2.7
6.0
V
mA
V
CC
I
4.5
CC
V
OH
Output high level
I
= 1.2mA
V
-1.4
OUT
CC
V
OL
Output low level
V
CC
-2.6
V
V
MC1 input high threshold
MC1 input low threshold
MC2 input high threshold
MC2 input low threshold
MC1 input high current
MC1 input low current
MC2 input high current
MC2 input low current
2.0
V
V
IH
CC
V
–0.3
2.0
0.8
V
IL
V
IH
V
CC
V
V
–0.3
0.8
V
IL
I
IH
V
= V = 6V
0.1
50
50
µA
µA
µA
µA
MC1
CC
I
IL
V
V
= 0V, V = 6V
–100
–100
–30
0.1
MC1
CC
I
IH
V
= V = 6V
MC2 CC
I
IL
= 0V, V = 6V
–30
MC2
CC
AC ELECTRICAL CHARACTERISTICS
These AC specifications are valid for f = 1GHz, input level = 0dBm, V = 3.0V and T = 25°C; unless otherwise stated. Test circuit Fig. 1.
IN
CC
A
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
TYP
UNITS
MIN
0.05
0
MAX
2.0
1
V
IN
Input signal amplitude
1000pF input coupling
V
P-P
2
f
IN
Input signal frequency
Direct coupled input
1.1
GHz
GHz
kΩ
1000pF input coupling
DC measurement
1.1
R
Differential input resistance
Output voltage
5
ID
V
O
V
CC
V
CC
= 5.0V
= 3.0V
1.6
1.2
V
P-P
V
P-P
1
t
Modulus set-up time
5
0
ns
ns
ns
S
1
t
H
Modulus hold time
t
Propagation time
10
PD
NOTES:
1. Maximum limit is not tested, however, it is guaranteed by design and characterization.
2. For f < 50MHz, minimum input slew rate of 32V/µs is required.
IN
reduced input current. CMOS and low
voltage interface capability are allowed.
DESCRIPTION OF OPERATION
The SA702 comprises a frequency divider
circuit implemented using a divide by 4 or 5
synchronous prescaler followed by a 5 stage
synchronous counter, see BLOCK
DIAGRAM. The normal operating mode is for
MC1 (Modulus Control) to be set high and
MC2 input to be set low in which case the
circuit comprises a divide by 64. For divide
by 65 the MC1 singal is forced low, causing
the prescaler circuit to switch into divide by 5
operation for the last cycle of the
Table 1.
Modulus
MC1
MC2
The prescaler input is differential and ECL
compatible. The output is differential ECL
compatible.
64
65
72
72
1
0
0
1
0
0
1
1
For minimization of propagation delay effects,
the second divider circuit is synchronous to
the divide by 4/5 stage output.
The prescaler input is positive edge sensitive,
and the output at the final count is a falling
edge with propagation delay t relative to
the input. The rising edge of the output
occurs at the count 32 with delay t
synchronous counter. For divide by 72, MC2
is set high configuring the prescaler to divide
by 4 and the counter to divide by 18. A truth
table for the modulus values is given below:
PD
.
PD
The MC1 and MC2 inputs are TTL
compatible threshold inputs operating at a
4
June 17, 1993
Philips Semiconductors RF Communications Products
Product specification
Divide by: 64/65/72 triple modulus low power
ECL prescaler
SA702
AC TIMING CHARACTERISTICS
COUNT 64
IN
65
1
32
63
64
1
MC (2:1)
OUT
(00)
(XX)
(01)
OUT
t
t
H
S
t
P
SWITCH FROM /65 TO /64
D
COUNT 64
IN
65
1
32
62
63
64
71
72
1
(00)
(XX)
(10)
MC
OUT
t
t
H
S
t
P
SWITCH FROM /65 TO /72
D
5
June 17, 1993
Philips Semiconductors RF Communications Products
Product specification
Divide by: 64/65/72 triple modulus low power
ECL prescaler
SA702
IN
IN
50Ω
50Ω
R1
50Ω
R2
50Ω
C1
1000pF
C2
1000pF
IN
IN
V
GND
MC1
OUT
V
CC
CC
C3
0.1µF
MC2
MC1
MC2
OUT
OUT
R4
2.2kΩ
C5
5pF
OUT
R3
2.2kΩ
C4
5pF
Figure 1. SA702 Test Circuit
FREQUENCY (MHz)
600
0
–5
200
400
800
1000
1200
–10
–15
–20
–25
–30
–35
–40
–40°C
V
= 3.0V
25°C
85°C
CC
Figure 2. Minimum Input Power vs Frequency and Temperature
6
June 17, 1993
Philips Semiconductors RF Communications Products
Product specification
Divide by: 64/65/72 triple modulus low power
ECL prescaler
SA702
FREQUENCY (MHz)
600
0
200
400
800
1000
1200
–5
–10
–15
–20
–25
–30
–35
–40
2.7V
3.0V
6.0V
T
= 25°C
A
Figure 3. Minimum Input Power vs Frequency and V
CC
6
5.5
5
85°C
25°C
4.5
4
–40°C
3.5
3
2.7
3
6
7
V
(V)
CC
Figure 4. Supply Current vs Supply Voltage and Temperature With No Load
7
June 17, 1993
Philips Semiconductors RF Communications Products
Product specification
Divide by: 64/65/72 triple modulus low power
ECL prescaler
SA702
j1
j0.5
j2
V
T
= 3V
CC
= 25°C
j0.2
j5
A
L4
R3
INPUT
5
6nH
4Ω
0.2
0.5
1
2
0
50
R1
C2
0.4pF
C1
0.9pF
3000Ω
300
–j5
–j0.2
600
EQUIVALENT INPUT IMPEDANCE
900
–j0.5
–j2
1200
–j1
Figure 5. Typical N Package Input Impedance
j1
j2
j0.5
V
= 3V
j0.2
j5
CC
= 25°C
T
A
L4
R3
INPUT
3nH
5
2Ω
0.2
0.5
1
2
0
50
R1
3000Ω
C2
0.2pF
C1
0.9pF
300
–j5
–j0.2
600
EQUIVALENT INPUT IMPEDANCE
900
–j2
–j0.5
1200
–j1
Figure 6. Typical D Package Input Impedance
8
June 17, 1993
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