SAA7167AH [NXP]
IC SPECIALTY CONSUMER CIRCUIT, PQFP48, 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-313-2, LQFP-48, Consumer IC:Other;
| 型号： | SAA7167AH |
| 厂家： | 
NXP |
| 描述： | IC SPECIALTY CONSUMER CIRCUIT, PQFP48, 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-313-2, LQFP-48, Consumer IC:Other |
| 文件： | 总21页 (文件大小：121K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
SAA7167AH
YUV-to-RGB digital-to-analog
converter
Product specification
2004 Jun 29
Supersedes data of 1996 Aug 14
Philips Semiconductors
Product specification
YUV-to-RGB digital-to-analog
converter
SAA7167AH
FEATURES
• On-chip mixing of digital video data and analog
RGB signals
• Supports video input format of YUV 4 : 2 : 2, 4 : 1 : 1,
2 : 1 : 1 and RGB 5 : 6 : 5
a voltage output amplifier, capable of converting digital
video data to analog RGB video, and then mixing video
and external analog RGB inputs.
• Video input rate up to 66 MHz
• Allows for both binary and twos complement video
input data
The video data path contains a data re-formatter,
YUV-to-RGB colour space matrix as well as triple DACs for
video data processing. An analog mixer performs
multiplexing between DAC outputs of the video path and
external analog RGB inputs.
• Triple 8-bit DACs for video output
• Built-in voltage output amplifier
• Provides keying control with external key and internal
8-bit, 2 × 8-bit and 3 × 8-bit pixel colour key
• Programmable via the I2C-bus
The final analog outputs are buffered with built-in voltage
output amplifiers to provide the direct driving capability for
a 150 Ω load.
• 5 V CMOS device; LQFP48 package.
GENERAL DESCRIPTION
The operation of SAA7167AH is controlled via the I2C-bus.
The SAA7167AH is a mixed-mode designed IC containing
a video data path, keying control block, analog mixer, and
QUICK REFERENCE DATA
SYMBOL
VDDD
PARAMETER
MIN.
4.75
MAX.
5.25
UNIT
digital supply voltage
analog supply voltage
ambient temperature
V
VDDA
Tamb
4.75
0
5.25
70
V
°C
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
SAA7167AH
LQFP48
plastic low profile quad flat package; 48 leads; body 7 × 7 × 1.4 mm
SOT313-2
2004 Jun 29
2
Philips Semiconductors
Product specification
YUV-to-RGB digital-to-analog
converter
SAA7167AH
BLOCK DIAGRAM
B_IN R_IN
G_IN
V
V
V
V
V V
SSA1 DDA1
DDD
7
SSD
SSA2 DDA2
C_REF(H)
36
8
26
27
34
35
29 31 33
32
MIXER
MIXER
MIXER
OPAMP
R_OUT
G_OUT
B_OUT
38 to 45
[
]
]
YUV 7:0
8
8
46 to 48,
1 to 5
YUV-
TO-
RGB
30
28
8-BIT
DAC
(3×)
OPAMP
OPAMP
RE-
FORMATTER
[
UV 7:0
MUX
MATRIX
9
HREF
22
23
24
SDA
SCL
2
I C-BUS
CLOCK
GENERATOR
SAA7167AH
KEYING CONTROL
8
CONTROL
RES_N
11
12
25, 37
6
10
21
13 to 20
001aaa392
[ ]
P 7:0
AP
SP n.c.
VCLK
PCLK
EXTKEY
Fig.1 Block diagram.
2004 Jun 29
3
Philips Semiconductors
Product specification
YUV-to-RGB digital-to-analog
converter
SAA7167AH
PINNING
SYMBOL
PIN
TYPE(1)
DESCRIPTION
UV[4]
1
I
digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R
input data
UV[3]
UV[2]
UV[1]
UV[0]
2
3
4
5
I
I
I
I
digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R
input data
digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R
input data
digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R
input data
digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R
input data
VCLK
VDDD
VSSD
HREF
PCLK
AP
6
I
S
S
I
video clock input
7
digital supply voltage
8
digital ground
9
horizontal reference input signal
pixel clock input
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
I
I
test pin, normally connected to ground
test pin, normally connected to ground
pixel bus input 7 (for keying control)
pixel bus input 6 (for keying control)
pixel bus input 5 (for keying control)
pixel bus input 4 (for keying control)
pixel bus input 3 (for keying control)
pixel bus input 2 (for keying control)
pixel bus input 1 (for keying control)
pixel bus input 0 (for keying control)
external key signal input
SP
I
P[7]
I
P[6]
I
P[5]
I
P[4]
I
P[3]
I
P[2]
I
P[1]
I
P[0]
I
EXTKEY
SDA
I
I/O
I
I2C-bus data line
I2C-bus clock line
resetting the I2C-bus (active LOW)
SCL
RES_N
n.c.
I
−
S
S
O
I
not connected
VSSA2
VDDA2
B_OUT
B_IN
G_OUT
G_IN
R_OUT
R_IN
VSSA1
VDDA1
C_REF(H)
analog ground 2
analog supply voltage 2
analog blue signal output
analog blue signal input
O
I
analog green signal output
analog green signal input
analog red signal output
O
I
analog red signal input
S
S
S
analog ground 1
analog supply voltage 1
de-coupling capacitor for internal reference voltage (2.25 V)
2004 Jun 29
4
Philips Semiconductors
Product specification
YUV-to-RGB digital-to-analog
converter
SAA7167AH
SYMBOL
PIN
TYPE(1)
DESCRIPTION
n.c.
37
38
39
40
41
42
43
44
45
46
−
I
not connected
YUV[7]
YUV[6]
YUV[5]
YUV[4]
YUV[3]
YUV[2]
YUV[1]
YUV[0]
UV[7]
digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data
digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data
digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data
digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data
digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data
digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data
digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data
digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data
I
I
I
I
I
I
I
I
digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R
input data
UV[6]
UV[5]
47
48
I
I
digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R
input data
digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R
input data
Note
1. I = input; I/O = input or output; O = output; S = supply.
[ ]
UV 4
1
2
3
4
5
6
7
8
9
36 C_REF(H)
[ ]
UV 3
35
34
V
V
DDA1
SSA1
[ ]
UV 2
[ ]
UV 1
33 R_IN
[ ]
UV 0
32 R_OUT
31 G_IN
VCLK
SAA7167AH
V
30 G_OUT
29 B_IN
DDD
V
SSD
HREF
28 B_OUT
PCLK 10
AP 11
27
26
V
DDA2
SSA2
V
SP 12
25 n.c.
001aaa395
Fig.2 Pin configuration.
5
2004 Jun 29
Philips Semiconductors
Product specification
YUV-to-RGB digital-to-analog
converter
SAA7167AH
FUNCTIONAL DESCRIPTION
Table 2 Pixel byte sequence of 4 : 1 : 1
The SAA7167AH contains a video data path, 3 analog
mixers and voltage output amplifiers for the RGB channels
respectively, a keying control block as well as an I2C-bus
control block.
INPUT
PIXEL BYTE SEQUENCE OF 4 : 1 : 1
YUV0
YUV1
YUV2
YUV3
YUV4
YUV5
YUV6
YUV7
UV0
Y0 Y0 Y0 Y0 Y0 Y0 Y0 Y0
Y1 Y1 Y1 Y1 Y1 Y1 Y1 Y1
Y2 Y2 Y2 Y2 Y2 Y2 Y2 Y2
Y3 Y3 Y3 Y3 Y3 Y3 Y3 Y3
Y4 Y4 Y4 Y4 Y4 Y4 Y4 Y4
Y5 Y5 Y5 Y5 Y5 Y5 Y5 Y5
Y6 Y6 Y6 Y6 Y6 Y6 Y6 Y6
Y7 Y7 Y7 Y7 Y7 Y7 Y7 Y7
Video data path
The video data path includes a video data re-formatter, a
YUV-to-RGB colour space conversion matrix, and triple
8-bit DACs.
RE-FORMATTER
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
The re-formatter de-multiplexes the different video formats
YUV 4 : 1 : 1, 4 : 2 : 2 or 2 : 1 : 1 to internal YUV 4 : 4 : 4,
which can then be processed by the RGB matrix. The pixel
byte sequences of those video input formats are shown in
Tables 1 to 4.
UV1
UV2
UV3
UV4
V6 V4 V2 V0 V6 V4 V2 V0
V7 V5 V3 V1 V7 V5 V3 V1
U6 U4 U2 U0 U6 U4 U2 U0
U7 U5 U3 U1 U7 U5 U3 U1
UV5
Table 1 Pixel byte sequence of 4 : 2 : 2
UV6
PIXEL BYTE SEQUENCE OF
INPUT
UV7
4 : 2 : 2
Y data
UV data
0
0
1
0
2
0
3
0
4
4
5
4
6
4
7
4
YUV0 (LSB)
YUV1
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
U0
U1
U2
U3
U4
U5
U6
U7
0
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
V0
V1
V2
V3
V4
V5
V6
V7
1
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
U0
U1
U2
U3
U4
U5
U6
U7
2
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
V0
V1
V2
V3
V4
V5
V6
V7
3
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
U0
U1
U2
U3
U4
U5
U6
U7
4
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
V0
V1
V2
V3
V4
V5
V6
V7
5
YUV2
Table 3 Pixel byte sequence of 2 : 1 : 1
YUV3
INPUT
YUV0
YUV1
YUV2
YUV3
YUV4
YUV5
YUV6
YUV7
Y data
UV data
PIXEL BYTE SEQUENCE OF 2 : 1 : 1
YUV4
U0 Y0 V0 Y0 U0 Y0 V0 Y0
U1 Y1 V1 Y1 U1 Y1 V1 Y1
U2 Y2 V2 Y2 U2 Y2 V2 Y2
U3 Y3 V3 Y3 U3 Y3 V3 Y3
U4 Y4 V4 Y4 U4 Y4 V4 Y4
U5 Y5 V5 Y5 U5 Y5 V5 Y5
U6 Y6 V6 Y6 U6 Y6 V6 Y6
U7 Y7 V7 Y7 U7 Y7 V7 Y7
YUV5
YUV6
YUV7 (MSB)
UV0 (LSB)
UV1
UV2
UV3
UV4
X
0
0
X
0
2
X
4
4
X
4
6
UV5
X
X
X
X
UV6
UV7 (MSB)
Y data
UV data
0
0
2
2
4
4
2004 Jun 29
6
Philips Semiconductors
Product specification
YUV-to-RGB digital-to-analog
converter
SAA7167AH
Table 4 Pixel byte sequence of 5 : 6 : 5
Analog mixers and keying control
The analog mixers are controlled to switch between the
outputs from the video DACs and analog RGB inputs by a
keying signal. The analog RGB inputs need to interface
with analog mixers in the way of DC-coupling, also these
RGB inputs are limited to RGB signals without a sync level
pedestal. The keying control can be enabled by setting
I2C-bus bit KEN = 1. Two kinds of keying are possible to
generate: one is external key (from EXTKEY pin when
KMOD[2:0] are all logic 0), and the other is the internal
pixel colour key (when KMOD[2:0] are not all logic 0)
generated by comparing the input pixel data with the
internal I2C-bus register value KD[7:0]. Controlled by
KMOD[2:0] bits, there are 4 ways to compare the pixel
data (see Table 5).
PIXEL BYTE SEQUENCE OF RGB
INPUT
5 : 6 : 5
UV7
G0
R4
R3
R2
R1
R0
G5
G4
G3
G2
G1
B4
B3
B2
B1
B0
0
G0
R4
R3
R2
R1
R0
G5
G4
G3
G2
G1
B4
B3
B2
B1
B0
1
G0
R4
R3
R2
R1
R0
G5
G4
G3
G2
G1
B4
B3
B2
B1
B0
2
G0
R4
R3
R2
R1
R0
G5
G4
G3
G2
G1
B4
B3
B2
B1
B0
3
UV6
UV5
UV4
UV3
UV2
UV1
UV0
YUV7
YUV6
YUV5
YUV4
YUV3
YUV2
YUV1
YUV0
RGB data
Table 5 KMOD[2:0]
KMOD[2:0] PIXEL TYPE
REMARK
100
101
8-bit pixel
pseudo colour mode
2 × 8-bit pixel high colour mode 1 with
pixels given at both rising
and falling edges of PCLK
110
111
2 × 8-bit pixel high colour mode 2 with
pixels given only at rising
edges of PCLK
For RGB 5 : 6 : 5 video inputs, the video data are just
directly bypassed to triple DACs.
3 × 8-bit pixel true colour mode
The input video data can be selected to either twos
complement (I2C-bus bit DRP = 0) or binary offset
(I2C-bus bit DRP = 1). The video input format is selected
by I2C-bus bits FMTC[1:0].
Since only one control register KD[7:0] provides the data
value for pixel data comparison, when at 2 × 8-bit or
3 × 8-bit pixel input modes, it is presumed that all input
bytes (lower, middle or higher) of each pixel must be the
same as KD[7:0] in order to make graphics colour key
active.
The rising edge of HREF input defines the start of active
video data. When HREF is inactive, the video output will be
blanked.
The polarity of EXTKEY can be selected with KINV. With
KINV = 0, EXTKEY = HIGH switches analog mixers to
select DAC outputs. Before the internal keying signal
switches the analog multiplexers, it can be further delayed
up to 7 PCLK cycles with the control bits KDLY[2:0].
YUV-TO-RGB MATRIX
The matrix converts YUV data, in accordance with
ITU-R BT.601, to RGB data with approximately 1.5 LSB
deviation to the theoretical values for 8-bit resolution.
TRIPLE 8-BIT DACS
Three identical DACs for R, G and B video outputs are
designed with voltage-drive architecture to provide
high-speed operation of up to 66 MHz conversion data
rate. Pin C_REF(H) is provided to allow for one external
de-coupling capacitor to be connected between the
internal reference voltage source and ground.
2004 Jun 29
7
Philips Semiconductors
Product specification
YUV-to-RGB digital-to-analog
converter
SAA7167AH
Voltage output amplifiers
The output voltage level of DAC ranges from the lowest
level 0.2 V (zero code) to the highest level 1.82 V (all one
code).
Before the analog input enters the analog mixers, it passes
through voltage output amplifiers. Level shifters are used
internally to provide an offset of 0.2 V and an amplifier gain
of 2 for analog inputs to match with the output levels from
DACs. After buffering with voltage output amplifiers, the
final RGB outputs can drive a 150 Ω load directly (25 Ω
internal resistor, 47 Ω external serial resistor, and 75 Ω
load resistor) at the monitor side (see Fig.9).
With the digital input YUV video data in accordance with
ITU-R BT.601, the RGB output of 8-bit DAC actually
ranges from the 16th step (black) to the 235th step (white).
Therefore, after the voltage divider with external serial
resistor and monitor load resistor, the output voltage range
to a monitor is approximately 0.7 V (p-p).
I2C-bus control
Only one control byte is needed for the SAA7167AH. The I2C-bus format is shown in Table 6.
Table 6 I2C-bus format
S(1)
SLAVE ADDRESS(2)
A(3)
SUBADDRESS(4)
A(3)
DATA(5)
A(3)
P(6)
Notes
1. S = START condition.
2. SLAVE ADDRESS = 1011111X; X = R/W control bit. X = 0: order to write. X = 1: order to read (not used for
SAA7167AH).
3. A = acknowledge; generated by the slave.
4. SUBADDRESS = subaddress byte.
5. DATA = data byte.
6. P = STOP condition.
Table 7 Control data byte
SUBADDRESS
D7
D6
D5
D4
D3
D2
D1
D0
00
01
02
KMOD2
0
KMOD1
0
KMOD0
0
DRP
0
KEN
0
KINV
KDLY2
KD2
FMTC1
KDLY1
KD1
FMTC0
KDLY0
KD0
KD7
KD6
KD5
KD4
KD3
2004 Jun 29
8
Philips Semiconductors
Product specification
YUV-to-RGB digital-to-analog
converter
SAA7167AH
Table 8 Bit functions in data byte; notes 1 and 2
BIT
DESCRIPTION
FMTC[1:0]
video format control:
00: YUV 4 : 2 : 2
01: YUV 4 : 1 : 1
10: YUV 2 : 1 : 1/ITU-R BT.656
11: RGB 5 : 6 : 5
KINV
key polarity:
KINV = 0: pin EXTKEY = HIGH for analog mixer to select DAC outputs
KINV = 1: pin EXTKEY = HIGH for analog mixer to select analog RGB inputs
KEN
key enable:
0 = disable
1 = enable
DRP
UV input data code:
0 = twos complement
1 = binary offset
KMOD[2:0]
keying mode:
000: external key
100: 8-bit pixel colour key
101: 2 × 8-bit pixel colour key (with two-edge clock latching for pixel input)
110: 2 × 8-bit pixel colour key (with one-edge clock latching for pixel input)
111: 3 × 8-bit pixel colour key (with one-edge clock latching for pixel input)
all other combinations are reserved
added keying delay cycles (from 0 to 7 PCLK cycles)
the data value compared for 8, 16 or 24-bit pixel colour key
KDLY[2:0]
KD[7:0]
Notes
1. All I2C-bus control bits are initialized to logic 0 after RES_N is activated.
2. PCLK should be active in any event to allow for correct operation of I2C-bus programming.
2004 Jun 29
9
Philips Semiconductors
Product specification
YUV-to-RGB digital-to-analog
converter
SAA7167AH
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); all ground pins and all supply pins connected
together.
SYMBOL
PARAMETER
digital supply voltage
CONDITIONS
MIN.
−0.5
MAX.
+7.0
UNIT
VDDD
VDDA
VI(D)
VI(A)
Vdiff
V
analog supply voltage
−0.5
−0.5
−0.5
−
+7.0
+7.0
+7.0
100
V
digital input voltage
V
analog input voltage
V
voltage difference between VSS pins
storage temperature
mV
°C
°C
V
Tstg
−65
0
+150
70
Tamb
Vesd
ambient temperature
electrostatic discharge voltage
human body model; note 1
machine model; note 2
−
±2000
±200
−
V
Notes
1. Class 2 according to EIA/JESD22-114-B.
2. Class B according to EIA/JESD22-115-A.
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
TYP.
67(1)
UNIT
Rth(j-a)
thermal resistance from junction to
ambient
in free air
K/W
Note
1. The overall Rth(j-a) value can vary depending on the board layout. To minimize the effective Rth(j-a) all power and
ground pins must be connected to the power and ground layers directly. An ample copper area direct under the
SAA7167AH with a number of through-hole plating, which connect to the ground layer (four-layer board: second
layer), can also reduce the effective Rth(j-a). Please do not use any solder-stop varnish under the chip. In addition the
usage of soldering glue with thermal conductance after curing is recommended.
DC CHARACTERISTICS
Tamb = 0 °C to 70 °C.
SYMBOL
PARAMETER
digital supply voltage
CONDITIONS
MIN.
4.75
TYP.
MAX.
5.25
UNIT
VDDD
VDDA
IDDtot
VIH(SDA)
VIL(SDA)
VIH
5.0
5.0
V
analog supply voltage
4.75
5.25
V
total supply current
fclk = 66 MHz
−
105
−
−
mA
V
HIGH-level input voltage on pin SDA
LOW-level input voltage on pin SDA
HIGH-level digital input voltage
LOW-level digital input voltage
full-scale analog RGB at input pins
3
VDDD + 0.5
−0.5
2
−
+1.5
−
V
−
V
VIL
−
−
0.8
−
V
Vi
−
0.7
V
2004 Jun 29
10
Philips Semiconductors
Product specification
YUV-to-RGB digital-to-analog
converter
SAA7167AH
SYMBOL
Vo
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
full-scale analog RGB at output pins with 150 Ω
−
−
−
1.4
−
−
1
1
V
external load
DNL
INL
differential non-linearity error of video
output
LSB
LSB
integral non-linearity error of video
output
−
AC CHARACTERISTICS
Tamb = 0 °C to 70 °C.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VCLK
fclk
video clock rate
−
−
66
60
MHz
δ
duty factor of VCLK
40
50
%
PCLK
fclk
pixel clock rate:
8-bit pixel colour key
see Fig.4
−
−
77.5
50
MHz
MHz
MHz
MHz
%
2 × 8-bit pixel colour key; mode 1 see Fig.5
2 × 8-bit pixel colour key; mode 2 see Fig.6
−
−
−
−
80
3 × 8-bit pixel colour key
see Fig.7
−
−
77.5
60
δ
duty factor of PCLK
40
3
50
−
tsu1
digital input set-up time to VCLK
rising edge
−
ns
th1
digital input hold time to VCLK
rising edge
2
0
−
−
−
−
−
−
−
ns
ns
ns
ns
ns
ns
tsu2
th2
tsu3
th3
digital input set-up time to PCLK
rising edge
−
digital input hold time to PCLK
rising edge
4.2
−1
6
−
digital input set-up time to PCLK
falling edge
−
digital input hold time to PCLK
falling edge
−
tsw
switching time between video DAC note 1
outputs and analog inputs
−
15
Tgroup
overall group delay from digital
video inputs to analog outputs:
see Fig.8
YUV video input mode
RGB video input mode
−
−
−
−
20TVCLK + tPD
12TVCLK + tPD
3.5
−
−
−
−
ns
ns
ns
ns
tr
tf
DAC analog output rise time
DAC analog output fall time
see Fig.8; note 2
see Fig.8; note 2
3.5
2004 Jun 29
11
Philips Semiconductors
Product specification
YUV-to-RGB digital-to-analog
converter
SAA7167AH
SYMBOL
PARAMETER
CONDITIONS
see Fig.8; note 3
see Fig.8; note 4
MIN.
TYP.
MAX.
UNIT
ns
ts
DAC analog output settling time
−
−
16.5
20
−
−
tPD
DAC analog output propagation
delay
ns
Analog outputs from analog inputs
Gv
B
voltage gain
bandwidth
slew rate
−
2.0
−
−
−
−
at −3 dB
160
100
MHz
SR
110
V/µs
Notes
1. Switching time measured from the 50 % point of the EXTKEY transition edge to the 50 % point of the selected analog
output transition.
2. DAC output rise and fall times measured between the 10 % and 90 % points of full-scale transition.
3. DAC settling time measured from the 50 % point of full-scale transition to the output remaining within ±1 LSB.
4. DAC analog output propagation delay measured from the 50 % point of the rising edge of VCLK to the 50 % point of
full-scale transition.
VCLK
t
su1
HREF
t
h1
YUV
t
su1
UV
MGB745
Fig.3 Video data input timing.
2004 Jun 29
12
Philips Semiconductors
Product specification
YUV-to-RGB digital-to-analog
converter
SAA7167AH
PCLK
t
su2
t
h2
[
]
P 7:0
pixel 1
pixel 2
pixel 3
pixel 4
pixel 5
pixel 6
pixel 7
001aaa394
Fig.4 Pixel data input timing; 8-bit pixel colour key.
PCLK
t
t
su3
su2
t
t
h3
h2
[
]
P 7:0
pixel 1
pixel 2
pixel 3
001aaa396
Fig.5 Pixel data input timing; 2 × 8-bit pixel colour key; mode 1.
2004 Jun 29
13
Philips Semiconductors
Product specification
YUV-to-RGB digital-to-analog
converter
SAA7167AH
PCLK
t
su2
t
h2
[
]
P 7:0
pixel 1
pixel 2
pixel 3
001aaa397
Fig.6 Pixel data input timing; 2 × 8-bit pixel colour key; mode 2.
PCLK
t
su2
t
h2
[
]
P 7:0
pixel 1
pixel 2
001aaa398
Fig.7 Pixel data input timing; 3 × 8-bit pixel colour key.
2004 Jun 29
14
Philips Semiconductors
Product specification
YUV-to-RGB digital-to-analog
converter
SAA7167AH
VCLK
T
group
YUV and UV
(full-scale transition)
t
s
t
PD
R_OUT, G_OUT, B_OUT
t , t
r
001aaa399
f
Fig.8 DAC output timing.
APPLICATION INFORMATION
digital YUV video data inputs
8
C_REF(H)
38 to 45
36
[
]
YUV 7:0
0.1 µF
8
46 to 48,
1 to 5
[
]
UV 7:0
to PC monitor
analog inputs from VGA
47 Ω
R_IN
R_OUT
33
32
75 Ω
75 Ω
75 Ω
SAA7167AH
47 Ω
47 Ω
G_IN
B_IN
G_OUT
B_OUT
31
29
30
28
75 Ω
75 Ω
75 Ω
001aaa393
cable
monitor side
Fig.9 Typical application diagram for analog circuits.
15
2004 Jun 29
Philips Semiconductors
Product specification
YUV-to-RGB digital-to-analog
converter
SAA7167AH
PACKAGE OUTLINE
LQFP48: plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm
SOT313-2
c
y
X
36
25
A
E
37
24
Z
E
e
H
E
A
2
A
(A )
3
A
1
w
p
M
θ
pin 1 index
b
L
p
L
13
48
detail X
1
12
Z
v
M
M
D
A
e
w
M
b
p
D
B
H
v
B
D
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
D
H
L
L
v
w
y
Z
Z
E
θ
1
2
3
p
E
p
D
max.
7o
0o
0.20 1.45
0.05 1.35
0.27 0.18 7.1
0.17 0.12 6.9
7.1
6.9
9.15 9.15
8.85 8.85
0.75
0.45
0.95 0.95
0.55 0.55
1.6
mm
0.25
0.5
1
0.2 0.12 0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
00-01-19
03-02-25
SOT313-2
136E05
MS-026
2004 Jun 29
16
Philips Semiconductors
Product specification
YUV-to-RGB digital-to-analog
converter
SAA7167AH
SOLDERING
To overcome these problems the double-wave soldering
method was specifically developed.
Introduction to soldering surface mount packages
If wave soldering is used the following conditions must be
observed for optimal results:
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is
recommended.
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Driven by legislation and environmental forces the
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
worldwide use of lead-free solder pastes is increasing.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical reflow peak temperatures range from
215 to 270 °C depending on solder paste material. The
top-surface temperature of the packages should
preferably be kept:
Typical dwell time of the leads in the wave ranges from
3 to 4 seconds at 250 °C or 265 °C, depending on solder
material applied, SnPb or Pb-free respectively.
• below 225 °C (SnPb process) or below 245 °C (Pb-free
process)
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
– for all BGA, HTSSON-T and SSOP-T packages
Manual soldering
– for packages with a thickness ≥ 2.5 mm
– for packages with a thickness < 2.5 mm and a
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
volume ≥ 350 mm3 so called thick/large packages.
• below 240 °C (SnPb process) or below 260 °C (Pb-free
process) for packages with a thickness < 2.5 mm and a
volume < 350 mm3 so called small/thin packages.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
Moisture sensitivity precautions, as indicated on packing,
must be respected at all times.
Wave soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
2004 Jun 29
17
Philips Semiconductors
Product specification
YUV-to-RGB digital-to-analog
converter
SAA7167AH
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE(1)
WAVE
not suitable
REFLOW(2)
BGA, HTSSON..T(3), LBGA, LFBGA, SQFP, SSOP..T(3), TFBGA,
USON, VFBGA
suitable
DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP, HSQFP, HSSON,
HTQFP, HTSSOP, HVQFN, HVSON, SMS
PLCC(5), SO, SOJ
not suitable(4)
suitable
suitable
suitable
LQFP, QFP, TQFP
not recommended(5)(6) suitable
SSOP, TSSOP, VSO, VSSOP
CWQCCN..L(8), PMFP(9), WQCCN..L(8)
not recommended(7)
suitable
not suitable
not suitable
Notes
1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy
from your Philips Semiconductors sales office.
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
3. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account
be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature
exceeding 217 °C ± 10 °C measured in the atmosphere of the reflow oven. The package body peak temperature
must be kept as low as possible.
4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
5. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
6. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
7. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than
0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
8. Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered pre-mounted
on flex foil. However, the image sensor package can be mounted by the client on a flex foil by using a hot bar
soldering process. The appropriate soldering profile can be provided on request.
9. Hot bar or manual soldering is suitable for PMFP packages.
2004 Jun 29
18
Philips Semiconductors
Product specification
YUV-to-RGB digital-to-analog
converter
SAA7167AH
DATA SHEET STATUS
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
LEVEL
DEFINITION
I
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
Application information
Applications that are
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2004 Jun 29
19
Philips Semiconductors
Product specification
YUV-to-RGB digital-to-analog
converter
SAA7167AH
PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
2004 Jun 29
20
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2004
SCA76
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
R21/02/pp21
Date of release: 2004 Jun 29
Document order number: 9397 750 12771
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