SE555N [NXP]
Timer; 定时器
| 型号： | SE555N |
| 厂家： | 
NXP |
| 描述： | Timer |
| 文件： | 总7页 (文件大小：124K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Philips Semiconductors Linear Products
Product specification
Timer
NE/SA/SE555/SE555C
DESCRIPTION
PIN CONFIGURATIONS
The 555 monolithic timing circuit is a highly stable controller capable
of producing accurate time delays, or oscillation. In the time delay
mode of operation, the time is precisely controlled by one external
resistor and capacitor. For a stable operation as an oscillator, the
free running frequency and the duty cycle are both accurately
controlled with two external resistors and one capacitor. The circuit
may be triggered and reset on falling waveforms, and the output
structure can source or sink up to 200mA.
D, N, FE Packages
1
2
3
4
8
7
6
5
GND
TRIGGER
OUTPUT
RESET
V
CC
DISCHARGE
THRESHOLD
CONTROL VOLTAGE
F Package
FEATURES
• Turn-off time less than 2µs
1
14
13
12
11
10
9
GND
NC
V
CC
• Max. operating frequency greater than 500kHz
• Timing from microseconds to hours
• Operates in both astable and monostable modes
• High output current
2
3
4
5
6
7
NC
TRIGGER
OUTPUT
NC
DISCHARGE
NC
THRESHOLD
NC
RESET
NC
• Adjustable duty cycle
8
CONTROL VOLTAGE
• TTL compatible
TOP VIEW
• Temperature stability of 0.005% per °C
APPLICATIONS
• Precision timing
• Pulse generation
• Sequential timing
• Time delay generation
• Pulse width modulation
ORDERING INFORMATION
DESCRIPTION
TEMPERATURE RANGE
0 to +70°C
ORDER CODE
DWG #
0174C
0404B
0404B
0174C
8-Pin Plastic Small Outline (SO) Package
8-Pin Plastic Dual In-Line Package (DIP)
8-Pin Plastic Dual In-Line Package (DIP)
8-Pin Plastic Small Outline (SO) Package
8-Pin Hermetic Ceramic Dual In-Line Package (CERDIP)
8-Pin Plastic Dual In-Line Package (DIP)
14-Pin Plastic Dual In-Line Package (DIP)
8-Pin Hermetic Cerdip
NE555D
NE555N
SA555N
SA555D
SE555CFE
SE555CN
SE555N
SE555FE
NE555F
0 to +70°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
-55°C to +125°C
-55°C to +125°C
-55°C to +125°C
0 to +70°C
0404B
0405B
14-Pin Ceramic Dual In-Line Package (CERDIP)
14-Pin Ceramic Dual In-Line Package (CERDIP)
14-Pin Ceramic Dual In-Line Package (CERDIP)
0581B
0581B
0581B
-55°C to +125°C
-55°C to +125°C
SE555F
SE555CF
346
August 31, 1994
853-0036 13721
Philips Semiconductors Linear Products
Product specification
Timer
NE/SA/SE555/SE555C
BLOCK DIAGRAM
V
CC
8
R
CONTROL
VOLTAGE
THRESH-
OLD
5
6
COMPARATOR
R
TRIGGER
2
COMPARATOR
R
DIS-
CHARGE
RESET
4
7
FLIP FLOP
OUTPUT
STAGE
3
1
OUTPUT
GND
EQUIVALENT SCHEMATIC
FM
CONTROL VOLTAGE
V
R1
4.7K
R2
330
R3
4.7
K
R
4
1
R
7
5
R12
6.8K
CC
K
K
Q21
Q6 Q7
Q9
Q5
Q22
Q8
Q19
R13
3.9K
R1
0
82.
K
Q1
Q4
THRESHOLD
Q2 Q3
OUTPUT
Q23
C
B
CB
Q18
E
R11
4.7K
R5
10
K
Q20
R8
5K
Q11 Q12
Q17
R14
220
Q10
Q13
TRIGGER
Q16
Q24
Q25
Q15
RESET
R15
4.7K
R9
5K
R6
100K
DISCHARGE
Q14
R16
100
GND
NOTE: Pin numbers are for 8-Pin package
347
August 31, 1994
Philips Semiconductors Linear Products
Product specification
Timer
NE/SA/SE555/SE555C
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
RATING
UNIT
Supply voltage
V
P
SE555
+18
+16
600
V
V
CC
NE555, SE555C, SA555
1
Maximum allowable power dissipation
Operating ambient temperature range
NE555
mW
D
T
A
0 to +70
-40 to +85
-55 to +125
-65 to +150
+300
°C
°C
°C
°C
°C
SA555
SE555, SE555C
T
STG
Storage temperature range
Lead soldering temperature (10sec max)
T
SOLD
NOTES:
1. The junction temperature must be kept below 125°C for the D package and below 150°C for the FE, N and F packages. At ambient tempera-
tures above 25°C, where this limit would be derated by the following factors:
D package 160°C/W
FE package 150°C/W
N package 100°C/W
F package 105°C/W
348
August 31, 1994
Philips Semiconductors Linear Products
Product specification
Timer
NE/SA/SE555/SE555C
DC AND AC ELECTRICAL CHARACTERISTICS
T = 25°C, V = +5V to +15 unless otherwise specified.
A
CC
SE555
Typ
NE555/SE555C
UNIT
SYMBOL
PARAMETER
Supply voltage
TEST CONDITIONS
Min
Max
18
5
Min
Typ
Max
16
6
V
4.5
4.5
V
CC
I
Supply current (low
V
CC
=5V, R =∞
3
3
mA
mA
CC
L
1
state)
V
CC
=15V, R =∞
10
12
10
15
L
Timing error (monostable)
R =2kΩ to 100kΩ
A
2
t
Initial accuracy
C=0.1µF
0.5
30
2.0
100
0.2
1.0
50
3.0
150
0.5
%
M
∆t /∆T
Drift with temperature
Drift with supply voltage
Timing error (astable)
ppm/°C
%/V
M
∆t /∆V
0.05
0.1
M
S
R , R =1kΩ to 100kΩ
A
B
2
t
Initial accuracy
C=0.1µF
4
6
5
13
500
1
%
ppm/°C
%/V
V
A
∆t /∆T
Drift with temperature
Drift with supply voltage
Control voltage level
V
CC
=15V
500
0.6
A
∆t /∆V
0.15
10.0
3.33
10.0
0.3
A
S
V
V
V
=15V
9.6
2.9
9.4
10.4
3.8
9.0
2.6
8.8
10.0
3.33
10.0
11.0
4.0
11.2
C
CC
V
=5V
V
CC
=15V
10.6
V
CC
V
TH
Threshold voltage
V
=5V
2.7
3.33
0.1
4.0
0.25
5.2
1.9
0.9
1.0
0.4
1.0
2.4
3.33
0.1
4.2
0.25
5.6
2.2
2.0
1.0
0.4
1.5
V
µA
V
CC
3
I
TH
Threshold current
V
TRIG
Trigger voltage
V
CC
=15V
4.8
5.0
4.5
1.1
5.0
V
CC
=5V
1.45
1.67
0.5
1.67
0.5
V
I
Trigger current
V
TRIG
=0V
µA
V
TRIG
4
V
Reset voltage
V
CC
=15V, V =10.5V
0.3
0.3
RESET
TH
I
Reset current
Reset current
V
=0.4V
0.1
0.4
0.1
0.4
mA
mA
RESET
RESET
V
=0V
RESET
V
CC
=15V
I
I
=10mA
=50mA
0.1
0.4
2.0
2.5
0.15
0.5
0.1
0.4
2.0
2.5
0.25
0.75
2.5
V
V
V
V
SINK
SINK
V
OL
Output voltage (low)
I
I
=100mA
=200mA
2.2
SINK
SINK
V
CC
=5V
I
I
=8mA
=5mA
=15V
0.1
0.25
0.2
0.3
0.4
V
V
SINK
SINK
0.05
0.25
0.35
V
CC
I
I
=200mA
=100mA
=5V
12.5
13.3
12.5
13.3
V
V
SOURCE
SOURCE
V
Output voltage (high)
13.0
3.0
12.75
2.75
OH
V
CC
I
=100mA
3.3
0.5
100
100
20
3.3
0.5
100
100
20
V
SOURCE
5
t
t
t
Turn-off time
V
=V
CC
2.0
200
200
100
2.0
300
300
100
µs
ns
ns
nA
OFF
RESET
Rise time of output
R
Fall time of output
F
Discharge leakage current
NOTES:
1. Supply current when output high typically 1mA less.
2. Tested at V =5V and V =15V.
CC
CC
3. This will determine the max value of R +R , for 15V operation, the max total R=10MΩ, and for 5V operation, the max. total R=3.4MΩ.
A
B
4. Specified with trigger input high.
5. Time measured from a positive going input pulse from 0 to 0.8×V into the threshold to the drop from high to low of the output. Trigger is
CC
tied to threshold.
349
August 31, 1994
Philips Semiconductors Linear Products
Product specification
Timer
NE/SA/SE555/SE555C
TYPICAL PERFORMANCE CHARACTERISTICS
Minimum Pulse Width
Required for Triggering
Supply Current
vs Supply Voltage
Delay Time
vs Temperature
10.0
1.015
1.010
1.005
150
o
+125 C
125
100
8.0
6.0
4.0
o
-55 C
o
+25 C
o
0 C
75
50
o
-55 C
1.000
0.995
o
+25 C
o
+70 C
2.0
0
o
25
0
+125 C
0.990
0.985
5.0
10.0
15.0
-50 -25
0
+25 +50 +75 +100+125
o
0
0.1
0.2
0.3
0.4 (XV
)
CC
SUPPLY VOLTAGE – VOLTS
LOWEST VOLTAGE LEVEL OF TRIGGER PULSE
TEMPERATURE –
C
Low Output Voltage
vs Output Sink Current
Low Output Voltage
vs Output Sink Current
Low Output Voltage
vs Output Sink Current
10
10
10
V
= 5V
CC
V
= 15V
V
= 10V
CC
CC
o
-55 C
1.0
1.0
o
-55 C
o
-55 C
o
1.0
0.1
+25 C
o
+25 C
o
+25 C
o
+25 C
o
+25 C
o
+25 C
0.1
0.1
o
+25 C
o
+25 C
o
o
55 C
-55 C
0.001
0.01
0.01
1.0
2.0
5.0
I
10
20
50 100
1.0 2.0
5.0
10 20
I – mA
SINK
50
100
1.0 2.0
5.0
I
10 20
– mA
50
100
– mA
SINK
SINK
High Output Voltage Drop
vs Output Source Current
Delay Time
vs Supply Voltage
Propagation Delay vs Voltage
Level of Trigger Pulse
300
1.015
2.0
1.8
o
–55 C
250
200
150
100
50
1.010
1.005
1.6
1.4
1.2
1.0
o
o
+25 C
-55 C
o
0 C
o
+125 C
1.000
0.995
0.8
0.6
0.4
o
+25 C
o
+70 C
0.990
0.985
o
+25 C
5V ≤ V
≤ 15V
0.2
0
CC
0
0
0.1
0.2
0.3
0.4
0
5
10
15
20
1.0 2.0
5.0 10
20
50 100
SUPPLY VOLTAGE – V
LOWEST VOLTAGE LEVEL
OF TRIGGER PULSE – XV
I
– mA
SOURCE
CC
350
August 31, 1994
Philips Semiconductors Linear Products
Product specification
Timer
NE/SA/SE555/SE555C
TYPICAL APPLICATIONS
V
CC
RA
555 OR 1/2 556
8
7
DISCHARGE
R
RB
5
6
CONTROL
VOLTAGE
COMP
THRESHOLD
.01µF
3
FLIP
FLOP
R
OUTPUT
OUTPUT
COMP
2
TRIGGER
R
1.49
f +
C
(R ) 2R )C
4
A
B
RESET
Astable Operation
V
CC
RA
555 OR 1/2 556
8
7
DISCHARGE
R
5
6
CONTROL
VOLTAGE
| ∆t |
COMP
THRESHOLD
.01µF
C
3
FLIP
FLOP
R
OUTPUT
OUTPUT
COMP
2
TRIGGER
R
1
3
*
V
CC
4
∆T = 1.1RC
RESET
Monostable Operation
351
August 31, 1994
Philips Semiconductors Linear Products
Product specification
Timer
NE/SA/SE555/SE555C
TYPICAL APPLICATIONS
V
CC
V
V
CC
CC
10k
1/3 V
O
CC
.001µF
2
555
VOLTS
1
DURATION OF
TRIGGER PULSE AS
SEEN BY THE TIMER
SWITCH GROUNDED
AT THIS POINT
NOTE: All resistor values are in Ω
Figure 1. AC Coupling of the Trigger Pulse
Trigger Pulse Width Requirements and Time
Delays
Another consideration is the “turn-off time”. This is the measurement
Due to the nature of the trigger circuitry, the timer will trigger on the
negative going edge of the input pulse. For the device to time out
properly, it is necessary that the trigger voltage level be returned to
some voltage greater than one third of the supply before the time out
period. This can be achieved by making either the trigger pulse
sufficiently short or by AC coupling into the trigger. By AC coupling
the trigger, see Figure 1, a short negative going pulse is achieved
when the trigger signal goes to ground. AC coupling is most
frequently used in conjunction with a switch or a signal that goes to
ground which initiates the timing cycle. Should the trigger be held
low, without AC coupling, for a longer duration than the timing cycle
the output will remain in a high state for the duration of the low
trigger signal, without regard to the threshold comparator state. This
is due to the predominance of Q on the base of Q , controlling
of the amount of time required after the threshold reaches 2/3 V
CC
to turn the output low. To explain further, Q at the threshold input
1
turns on after reaching 2/3 V , which then turns on Q , which turns
CC
5
on Q . Current from Q turns on Q which turns Q off. This
6
6
16
17
allows current from Q to turn on Q and Q to given an output
19
20
24
low. These steps cause the 2µs max. delay as stated in the data
sheet.
Also, a delay comparable to the turn-off time is the trigger release
time. When the trigger is low, Q is on and turns on Q which turns
10
11
on Q . Q turns off Q and allows Q to turn on. This turns off
15
15
16
17
current to Q and Q , which results in output high. When the
20
24
trigger is released, Q and Q shut off, Q turns off, Q turns on
10
11
15
16
and the circuit then follows the same path and time delay explained
as “turn off time”. This trigger release time is very important in
designing the trigger pulse width so as not to interfere with the
output signal as explained previously.
15
16
the state of the bi-stable flip-flop. When the trigger signal then
returns to a high level, the output will fall immediately. Thus, the
output signal will follow the trigger signal in this case.
352
August 31, 1994
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