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SL3S1213FUDBG [NXP]

UCODE G2iL and G2iL;
SL3S1213FUDBG
型号： SL3S1213FUDBG
厂家： NXP    NXP
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UCODE G2iL and G2iL
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SL3S1203_1213  
UCODE G2iL and G2iL+  
Rev. 4.5 — 12 February 2019  
178845  
Product data sheet  
COMPANY PUBLIC  
1 General description  
NXP’s UCODE G2iL series transponder ICs offer leading-edge read range and support  
industry-first features such as a Tag Tamper Alarm, Data Transfer, Digital Switch, and  
advanced privacy-protection modes.  
Very high chip sensitivity (-18 dBm) enables longer read ranges with simple, single-port  
antenna designs. When connected to a power supply, the READ as well as the WRITE  
range can be boosted to a sensitivity of -27 dBm. In fashion and retail the UCODE G2iL  
series improve read rates and provide for theft deterrence. For consumer electronics  
the UCODE G2iL series is suited for device configuration, activation, production control,  
and PCB tagging. In authentication applications the transponders can be used to protect  
brands and guard against counterfeiting. They can also be used to tag containers,  
electronic vehicles, airline baggage, and more.  
In addition to the EPC specifications the G2iL offers an integrated Product Status Flag  
(PSF) feature and read protection of the memory content.  
On top of the G2iL features the G2iL+ offers an integrated tag tamper alarm, RF field  
detection, digital switch, external supply mode, read range reduction and data transfer  
mode.  
 
NXP Semiconductors  
SL3S1203_1213  
UCODE G2iL and G2iL+  
2 Features and benefits  
2.1 Key features  
• UHF RFID Gen2 tag chip according EPCglobal v1.2.0 with 128 bit EPC memory  
• Memory read protection  
• Integrated Product Status Flag (PSF)  
• Tag tamper alarm  
• RF field detection  
• Digital switch  
• Data transfer mode  
• Real Read Range Reduction (Privacy Mode)  
• External supply mode where both the READ & WRITE range are boosted to -27dBm  
2.1.1 Memory  
• 128-bit of EPC memory  
• 64-bit Tag IDentifier (TID) including 32-bit factory locked unique serial number  
• 32-bit kill password to permanently disable the tag  
• 32-bit access password to allow a transition into the secured state  
• Data retention: 20 years  
• Broad international operating frequency: from 840 MHz to 960 MHz  
• Long read/write ranges due to extremely low power design  
• Reliable operation of multiple tags due to advanced anti-collision  
• READ protection  
• WRITE Lock  
• Wide specified temperature range: -40 °C up to +85 °C  
2.2 Key benefits  
2.2.1 End user benefit  
• Prevention of unauthorized memory access through read protection  
• Indication of tag tampering attempt by use of the tag tamper alarm feature  
• Electronic device configuration and / or activation by the use of the digital switch / data  
transfer mode  
• Theft deterrence supported by the PSF feature (PSF alarm or EPC code)  
• Small label sizes, long read ranges due to high chip sensitivity  
• Product identification through unalterable extended TID range, including a 32-bit serial  
number  
• Reliable operation in dense reader and noisy environments through high interference  
suppression  
2.2.2 Antenna design benefits  
• High sensitivity enables small and cost efficient antenna designs  
• Low Q-Value eases broad band antenna design for global usage  
SL3S1203_1213  
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Product data sheet  
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NXP Semiconductors  
SL3S1203_1213  
UCODE G2iL and G2iL+  
2.2.3 Label manufacturer benefit  
• Consistent performance on different materials due to low Q-factor  
• Ease of assembly and high assembly yields through large chip input capacitance  
• Fast first WRITE of the EPC memory for fast label initialization  
2.3 Custom commands  
• PSF Alarm  
Built-in PSF (Product Status Flag), enables the UHF RFID tag to be used as EAS tag  
(Electronic Article Surveillance) tag without the need for a back-end data base.  
• Read Protect  
Protects all memory content including CRC16 from unauthorized reading.  
• ChangeConfig  
Configures the additional features of the chip like external supply mode, tamper alarm,  
digital switch, read range reduction or data transfer.  
The UCODE G2iL is equipped with a number of additional features and custom  
commands. Nevertheless, the chip is designed in a way standard EPCglobal READ/  
WRITE/ACCESS commands can be used to operate the features. No custom commands  
are needed to take advantage of all the features in case of unlocked EPC memory.  
SL3S1203_1213  
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© NXP B.V. 2019. All rights reserved.  
Product data sheet  
COMPANY PUBLIC  
Rev. 4.5 — 12 February 2019  
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NXP Semiconductors  
SL3S1203_1213  
UCODE G2iL and G2iL+  
3 Applications  
3.1 Markets  
• Fashion (Apparel and footwear)  
• Retail  
• Electronics  
• Fast Moving Consumer Goods  
• Asset management  
• Electronic Vehicle Identification  
3.2 Applications  
• Supply chain management  
– Item level tagging  
– Pallet and case tracking  
• Container identification  
• Product authentication  
• PCB tagging  
• Cost efficient, low level seals  
• Wireless firmware download  
• Wireless product activation  
Outside above mentioned applications, please contact NXP Semiconductors for support.  
SL3S1203_1213  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2019. All rights reserved.  
Product data sheet  
COMPANY PUBLIC  
Rev. 4.5 — 12 February 2019  
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NXP Semiconductors  
SL3S1203_1213  
UCODE G2iL and G2iL+  
4 Ordering information  
Table 1.ꢀOrdering information  
Type number  
Package  
Name  
Wafer  
IC type  
G2iL  
Description  
Version  
SL3S1203FUF  
SL3S1213FUF  
SL3S1203FUD/BG  
bumped die on sawn 8" 75 μm wafer  
bumped die on sawn 8" 75 μm wafer  
not applicable  
not applicable  
not applicable  
Wafer  
G2iL+  
G2iL  
Wafer  
bumped die on sawn 8" 120 μm wafer,  
7 μm Polyimide spacer  
SL3S1213FUD/BG  
SL3S1203FTB0  
Wafer  
G2iL+  
G2iL  
bumped die on sawn 8" 120 μm wafer,  
7 μm Polyimide spacer  
not applicable  
SOT886F1  
XSON6  
plastic extremely thin small outline package;  
no leads; 6 terminals; body 1 × 1.45 × 0.5 mm  
SL3S1203_1213  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2019. All rights reserved.  
Product data sheet  
COMPANY PUBLIC  
Rev. 4.5 — 12 February 2019  
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SL3S1203_1213  
UCODE G2iL and G2iL+  
5 Marking  
Table 2.ꢀMarking codes  
Type number  
Marking code  
Comment  
UCODE G2iL  
Version  
SL3S1203FTB0  
UN  
SOT886  
SL3S1203_1213  
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© NXP B.V. 2019. All rights reserved.  
Product data sheet  
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SL3S1203_1213  
UCODE G2iL and G2iL+  
6 Block diagram  
The SL3S12x3 IC consists of three major blocks:  
- Analog Interface  
- Digital Control  
- EEPROM  
The analog part provides stable supply voltage and demodulates data received from the  
reader for being processed by the digital part. Further, the modulation transistor of the  
analog part transmits data back to the reader.  
The digital section includes the state machines, processes the protocol and handles  
communication with the EEPROM, which contains the EPC and the user data.  
ANALOG  
RF INTERFACE  
DIGITAL CONTROL  
EEPROM  
VREG  
PAD  
VDD  
ANTICOLLISION  
RECT  
DEMOD  
MOD  
READ/WRITE  
CONTROL  
data  
in  
ANTENNA  
ACCESS CONTROL  
MEMORY  
PAD  
data  
out  
R/W  
EEPROM INTERFACE  
CONTROL  
PAD  
PAD  
VDD  
OUT  
I/O  
CONTROL  
RF INTERFACE  
CONTROL  
I/O CONTROL  
SEQUENCER  
CHARGE PUMP  
001aam226  
Figure 1.ꢀBlock diagram of G2iL IC  
SL3S1203_1213  
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© NXP B.V. 2019. All rights reserved.  
Product data sheet  
COMPANY PUBLIC  
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SL3S1203_1213  
UCODE G2iL and G2iL+  
7 Pinning information  
SL3S12x3FTB0  
OUT  
RFN  
RFP  
n.c.  
1
2
3
6
5
4
VDD  
n.c.  
VDD NXP trademark  
RFP  
RFN  
OUT  
001aan103  
Transparent top view  
001aam529  
Figure 2.ꢀPinning bare die  
Figure 3.ꢀPin configuration for SOT886  
7.1 Pin description  
Table 3.ꢀPin description bare die  
Symbol  
OUT  
Description  
output pin  
RFN  
grounded antenna connector  
external supply  
VDD  
RFP  
ungrounded antenna connector  
Table 4.ꢀPin description SOT886  
Pin  
1
Symbol  
RFP  
n.c.  
Description  
ungrounded antenna connector  
not connected  
2
3
RFN  
OUT  
n.c.  
grounded antenna connector  
output pin  
4
5
not connected  
6
VDD  
external supply  
SL3S1203_1213  
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© NXP B.V. 2019. All rights reserved.  
Product data sheet  
COMPANY PUBLIC  
Rev. 4.5 — 12 February 2019  
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NXP Semiconductors  
SL3S1203_1213  
UCODE G2iL and G2iL+  
8 Wafer layout  
8.1 Wafer layout  
(1)  
OUT  
Y
RFN  
(5)  
(4)  
(6)  
X
(7)  
VDD  
RFP  
(8)  
(2)  
(3)  
not to scale!  
001aak871  
1. Die to Die distance (metal sealring - metal sealring) 21,4 μm, (X-scribe line width: 15 μm)  
2. Die to Die distance (metal sealring - metal sealring) 21,4 μm, (Y-scribe line width: 15 μm)  
3. Chip step, x-length: 485 μm  
4. Chip step, y-length: 435 μm  
5. Bump to bump distance X (OUT - RFN): 383 μm  
6. Bump to bump distance Y (RFN - RFP): 333 μm  
7. Distance bump to metal sealring X: 40,3 μm (outer edge - top metal)  
8. Distance bump to metal sealring Y: 40,3 μm  
Bump size X x Y: 60 μm x 60 μm  
Remark: OUT and VDD are used with G2iL+ only  
Figure 4.ꢀG2iL wafer layout  
SL3S1203_1213  
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© NXP B.V. 2019. All rights reserved.  
Product data sheet  
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SL3S1203_1213  
UCODE G2iL and G2iL+  
9 Mechanical specification  
The UCODE G2iL/G2iL+ wafers are available in 75 μm and 120 μm thickness. The  
75 μm thick wafer allows ultra thin label design but require a proper tuning of the glue  
dispenser during production. Because of the more robust structure of the 120 μm wafer,  
the wafer is ideal for harsh applications. The 120 μm thick wafer is also enhanced with  
7μm Polyimide spacer allowing additional protection of the active circuit.  
9.1 Wafer specification  
See [2].  
9.1.1 Wafer  
Table 5.ꢀSpecifications  
Wafer  
Designation  
each wafer is scribed with batch number and  
wafer number  
Diameter  
200 mm (8")  
Thickness  
SL3S12x3FUF  
75 μm ± 15 μm  
SL3S12x3FUD  
Number of pads  
Pad location  
120 μm ± 15 μm  
4
non diagonal/ placed in chip corners  
Distance pad to pad RFN-RFP  
Distance pad to pad OUT-RFN  
Process  
333.0 μm  
383.0 μm  
CMOS 0.14 μm  
25 wafers  
139.351  
Batch size  
Potential good dies per wafer  
Wafer backside  
Material  
Si  
Treatment  
ground and stress release  
Ra max. 0.5 μm, Rt max. 5 μm  
Roughness  
Chip dimensions  
Die size including scribe  
Scribe line width:  
0.485 mm × 0.435 mm = 0.211 mm2  
x-dimension = 15 μm  
y-dimension = 15 μm  
Passivation on front  
Type  
Sandwich structure  
Material  
PE-Nitride (on top)  
Thickness  
1.75 μm total thickness of passivation  
7 μm ± 1 μm (SL3S12x3FUD only)  
Polyimide spacer  
SL3S1203_1213  
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Product data sheet  
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SL3S1203_1213  
UCODE G2iL and G2iL+  
Au bump  
Bump material  
Bump hardness  
Bump shear strength  
Bump height  
> 99.9 % pure Au  
35 – 80 HV 0.005  
> 70 MPa  
SL3S12x3FUF  
SL3S12x3FUD  
Bump height uniformity  
within a die  
18 μm  
25 μm[1]  
± 2 μm  
± 3 μm  
± 4 μm  
± 1.5 μm  
– within a wafer  
– wafer to wafer  
Bump flatness  
Bump size  
– RFP, RFN  
60 × 60 μm  
60 × 60 μm  
± 5 μm  
– OUT, VDD  
Bump size variation  
[1] Because of the 7 μm spacer, the bump will measure 18 μm relative height protruding the spacer.  
9.1.2 Fail die identification  
No inkdots are applied to the wafer.  
Electronic wafer mapping (SECS II format) covers the electrical test results and  
additionally the results of mechanical/visual inspection.  
See [2]  
9.1.3 Map file distribution  
See [2]  
SL3S1203_1213  
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Product data sheet  
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SL3S1203_1213  
UCODE G2iL and G2iL+  
10 Functional description  
10.1 Air interface standards  
The UCODE G2iL fully supports all parts of the "Specification for RFID Air Interface  
EPCglobal, EPC Radio-Frequency Identity Protocols, Class-1 Generation-2 UHF RFID,  
Protocol for Communications at 860 MHz to 960 MHz, Version 1.2.0".  
10.2 Power transfer  
The interrogator provides an RF field that powers the tag, equipped with a UCODE G2iL.  
The antenna transforms the impedance of free space to the chip input impedance in  
order to get the maximum possible power for the G2iL on the tag. The G2iL+ can also be  
supplied externally.  
The RF field, which is oscillating on the operating frequency provided by the interrogator,  
is rectified to provide a smoothed DC voltage to the analog and digital modules of the IC.  
The antenna that is attached to the chip may use a DC connection between the two  
antenna pads. Therefore the G2iL also enables loop antenna design. Possible examples  
of supported antenna structures can be found in the reference antenna design guide.  
10.3 Data transfer  
10.3.1 Reader to tag Link  
An interrogator transmits information to the UCODE G2iL by modulating an UHF RF  
signal. The G2iL receives both information and operating energy from this RF signal.  
Tags are passive, meaning that they receive all of their operating energy from the  
interrogator's RF waveform. In order to further improve the read range the UCODE G2iL+  
can be externally supplied as well so the energy to operate the chip does not need to be  
transmitted by the reader.  
An interrogator is using a fixed modulation and data rate for the duration of at least one  
inventory round. It communicates to the G2iL by modulating an RF carrier using DSB-  
ASK with PIE encoding.  
For further details refer to Section 16, [1]. Interrogator-to-tag (R=>T) communications.  
10.3.2 Tag to reader Link  
An interrogator receives information from a G2iL by transmitting an unmodulated RF  
carrier and listening for a backscattered reply. The G2iL backscatters by switching the  
reflection coefficient of its antenna between two states in accordance with the data being  
sent. For further details refer to Section 16, [1], chapter 6.3.1.3.  
The UCODE G2iL communicates information by backscatter-modulating the amplitude  
and/or phase of the RF carrier. Interrogators shall be capable of demodulating either  
demodulation type.  
The encoding format, selected in response to interrogator commands, is either FM0  
baseband or Miller-modulated subcarrier.  
SL3S1203_1213  
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SL3S1203_1213  
UCODE G2iL and G2iL+  
10.4 G2iL and G2iL+ differences  
The UCODE G2iL is tailored for application where mainly EPC or TID number space is  
needed. The G2iL+ in addition provides functionality such as tag tamper alarm, external  
supply operation to further boost read/write range (external supply mode), a Privacy  
mode reducing the read range or I/O functionality (data transfer to externally connected  
devices) required.  
The following table provides an overview of G2iL, G2iL+ special features.  
Table 6.ꢀOverview of G2iL and G2iL+ features  
Features  
G2iL  
G2iL+  
yes  
yes  
yes  
yes  
yes  
yes  
yes  
yes  
yes  
Read protection (bankwise)  
PSF (Built-in Product Status Flag)  
Backscatter strength reduction  
Real read range reduction  
Digital switch / Digital input  
External supply mode  
RF field detection  
yes  
yes  
yes  
yes  
-
-
-
-
-
Data transfer  
Tag tamper alarm  
10.5 Supported commands  
The G2iL supports all mandatory EPCglobal V1.2.0 commands.  
In addition the G2iL supports the following optional commands:  
• ACCESS  
• Block Write (32 bit)  
The G2iL features the following custom commands described more in detail later:  
• ResetReadProtect (backward compatible to G2X)  
• ReadProtect (backward compatible to G2X)  
• ChangeEAS (backward compatible to G2X)  
• EAS_Alarm (backward compatible to G2X)  
• ChangeConfig (new with G2iL)  
10.6 G2iL, G2iL+ memory  
The G2iL, G2iL+ memory is implemented according EPCglobal Class1Gen2 and  
organized in three sections:  
Table 7.ꢀG2iL memory sections  
Name  
Size  
Bank  
00b  
Reserved memory (32 bit ACCESS and 32 bit KILL password)  
EPC (excluding 16 bit CRC-16 and 16 bit PC)  
G2iL Configuration Word  
64 bit  
128 bit  
16 bit  
01b  
01b  
SL3S1203_1213  
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SL3S1203_1213  
UCODE G2iL and G2iL+  
Name  
Size  
Bank  
TID (including permalocked unique 32 bit serial number)  
64 bit  
10b  
The logical address of all memory banks begin at zero (00h).  
In addition to the three memory banks one configuration word to handle the G2iL specific  
features is available at EPC bank 01 address 200h. The configuration word is described  
in detail in Section 10.7.1.  
Memory pages (16 bit words) pre-programmed to zero will not execute an erase cycle  
before writing data to it. This approach accelerates initialization of the chip and enables  
faster programming of the memory.  
10.6.1 G2iL, G2iL+ overall memory map  
Table 8.ꢀG2iL, G2iL+ overall memory map  
Bank  
address  
Memory  
address  
Type  
Content  
Initial  
Remark  
Bank 00  
00h to 1Fh  
20h to 3Fh  
00h to 0Fh  
reserved  
reserved  
EPC  
kill password  
all 00h  
all 00h  
unlocked memory  
unlocked memory  
access password  
CRC-16: refer to [1]  
Bank 01  
EPC  
memory mapped  
calculated CRC  
10h to 14h  
15h  
EPC  
EPC  
EPC  
EPC  
EPC  
EPC  
EPC  
backscatter length  
UMI  
00110b  
0b  
unlocked memory  
unlocked memory  
hardwired to 0  
unlocked memory  
unlocked memory  
indicator bit  
16h  
XPC indicator  
0b  
17h to 1Fh  
20h to 9Fh  
200h  
numbering system indicator 00h  
[1]  
EPC  
Bank 01  
tamper alarm flag  
0b[2]  
external supply flag or input 0b[2]  
signal  
indicator bit  
Config Word  
201h  
202h  
203h  
204h  
205h  
206h  
207h  
208h  
209h  
20Ah  
20Bh  
20Ch  
20Dh  
20Eh  
20Fh  
EPC  
EPC  
EPC  
EPC  
EPC  
EPC  
EPC  
EPC  
EPC  
EPC  
EPC  
EPC  
EPC  
EPC  
RFU  
0b[2]  
0b[2]  
0b[2]  
0b[2]  
0b[2]  
0b[2]  
0b[2]  
1b[2]  
0b[2]  
0b[2]  
0b[2]  
0b[2]  
0b[2]  
0b[2]  
locked memory  
locked memory  
temporary bit  
RFU  
invert digital output:  
transparent mode on/off  
transparent mode data/raw  
RFU  
temporary bit  
temporary bit  
locked memory  
locked memory  
unlocked memory  
unlocked memory  
unlocked memory  
locked memory  
unlocked memory  
unlocked memory  
unlocked memory  
RFU  
max. backscatter strength  
digital output  
read range reduction on/off  
RFU  
read protect EPC Bank  
read protect TID  
PSF alarm flag  
SL3S1203_1213  
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SL3S1203_1213  
UCODE G2iL and G2iL+  
Bank  
address  
Memory  
address  
Type  
Content  
Initial  
Remark  
Bank 10  
TID  
00h to 07h  
08h to 13h  
14h  
TID  
TID  
TID  
TID  
TID  
allocation class identifier  
1110 0010b  
locked memory  
tag mask designer identifier 0000 0000 0110b  
locked memory  
locked memory  
locked memory  
locked memory  
config word indicator  
tag model number  
serial number  
1b[3]  
TMNR[1]  
14h to 1Fh  
20h to 3Fh  
SNR  
[1] See Figure 5  
[2] See also Table 12 for further details.  
[3] Indicates the existence of a Configuration Word at the end of the EPC number  
SL3S1203_1213  
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SL3S1203_1213  
UCODE G2iL and G2iL+  
10.6.2 G2iL TID memory details  
Model Number  
Mask  
Designer  
ID  
First 32 bit of TID  
memory  
Class ID  
Config Word  
Indicator  
Sub  
Version Nr.  
Version  
(Silicon) Nr.  
Ucode G2iL  
E2006806  
E2006906  
E2006B06  
E2006807  
E2006907  
E2006B07  
E2h  
E2h  
E2h  
E2h  
E2h  
E2h  
006h  
006h  
006h  
006h  
006h  
006h  
1
1
1
1
1
1
0000b  
0010b  
0110b  
0000b  
0010b  
0110b  
0000110b  
0000110b  
0000110b  
0000111b  
0000111b  
0000111b  
Ucode G2iL+  
Addresses 00h  
3Fh  
TID  
MS Byte  
MS Bit LS Bit  
LS Byte  
MS Bit  
LS Bit  
Addresses 00h  
07h 08h  
13h 14h  
1Fh 20h  
3Fh  
0
Class Identifier  
Mask-Designer Identifier  
11  
Model Number  
Serial Number  
Bits  
7
0
0
11  
0
31  
E2h  
(EAN.UCC)  
006h  
(NXP)  
806h or 906h or B06h  
(UCODE G2iL)  
00000001h to FFFFFFFFh  
Addresses 14h  
18h 19h  
1Fh  
Sub Version Number  
0 6  
000b or 001b or 0110b  
Version Number  
Bits  
0
3
0
0000110b  
aaa-010217  
(UCODE G2iL)  
Figure 5.ꢀG2iL TID memory structure  
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UCODE G2iL and G2iL+  
10.7 Custom commands  
The UCODE G2iL, G2iL+ is equipped with a number of additional features and custom  
commands.  
Nevertheless, the chip is designed in a way standard EPCglobal READ/WRITE/ACCESS  
commands can be used to operate the features.  
The memory map stated in the previous section describes the Configuration Word used  
to control the additional features located at address 200h of the EPC memory. For this  
reason the standard READ/WRITE commands of an UHF EPCglobal compliant reader  
can be used to select the flags or activate/deactivate features.  
The features can only be activated/deactivated (written) using standard EPC WRITE  
command as long the EPC is not locked. In case the EPC is locked either the bank  
needs to be unlocked to apply changes or the ChangeConfig custom command is used  
to change the settings.  
The UCODE G2iL is also equipped with the complete UCODE G2X command set for  
backward compatibility reasons. Nevertheless, the one ChangeConfig command of the  
G2iL can be used instead of the entire G2X command set.  
Bit 14h of the TID indicates the existence of a Configuration Word. This flag will enable  
selecting Config-Word enhanced transponders in mixed tag populations.  
10.7.1 ChangeConfig  
Although G2iL is tailored for supply chain management, item level tagging and product  
authentication the G2iL+ version enables active interaction with products. Among the  
password protected features are the capability of download firmware to electronics,  
activate/deactivate electronics which can also be used as theft deterrence, a dedicated  
privacy mode by reducing the read range, integrated PSF (Product Status Flag) or Tag  
Tamper Alarm.  
The G2iL ChangeConfig custom command allows handling the special NXP  
Semiconductors features described in the following paragraph. Please also see the  
memory map in Section 10.6 and "Section 10.7.2. If the EPC memory is not write locked  
the standard EPC READ/WRITE command can be used to change the settings.  
1
G2iL, G2iL+ special features  
UCODE G2iL and G2iL+ common special features are:  
• Bank wise read protection (separate for EPC and TID)  
EPC bank and the serial number part of the TID can be read protected independently.  
When protected reading of the particular memory will return '0'. The flags of the  
configuration word can be selected using the standard SELECT2 command. Only  
read protected parts will then participate an inventory round. The G2X ReadProtect  
command will set both EPC and TID read protect flags.  
• Integrated PSF (Product Status Flag)  
1 The features can only be manipulated (enabled/disabled) with unlocked EPC bank, otherwise the  
ChangeConfig command can be used.  
2
SELECT has to be applied onto the Configuration Word with pointer address 200h. Selecting bits within  
the Configuration Word using a pointer address not equal to 200h is not possible.  
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The PSF is a general purpose flag that can be used as an EAS (Electronic Article  
Surveillance) flag, quality checked flag or similar.  
The G2iL offers two ways of detecting an activated PSF. In cases extremely fast  
detection is needed the EAS_Alarm command can be used. The UCODE G2iL will  
reply a 64-bit alarm code like described in section EAS_Alarm upon sending the  
command. As a second option the EPC SELECT2 command selecting the PSF flag of  
the configuration word can be used. In the following inventory round only PSF enabled  
chips will reply their EPC number.  
• Backscatter strength reduction  
The UCODE G2iL features two levels of backscatter strengths. Per default maximum  
backscatter is enabled in order to enable maximum read rates. When clearing the flag  
the strength can be reduced if needed.  
• Real Read Range Reduction 4R  
Some applications require the reduction of the read range to close proximity for privacy  
reasons. Setting the 4R flag will significantly reduce the chip sensitivity to +12 dBm.  
The +12 dBm have to be available at chip start up (slow increase of field strength is  
not applicable). For additional privacy, the read protection can be activated in the same  
configuration step. The related flag of the configuration word can be selected using the  
standard SELECT2 command so only chips with reduced read range will be part of an  
inventory.  
Remark: The attenuation will result in only a few centimeter of read range at 36 dBm  
EIRP!  
UCODE G2iL+ specific special features are:1  
• Tag Tamper Alarm (G2iL+ only)  
The UCODE G2iL+ Tamper Alarm will flag the status of the VDD to OUT pad  
connection which can be designed as an predetermined breaking point (see Figure 6).  
GND  
RFP  
OUT  
VDD  
001aam228  
Figure 6.ꢀSchematic of connecting VDD and OUT pad with a predetermined breaking point  
to turn a standard RFID label into a wireless safety seal  
The status of the pad connection (open/closed) can be read in the configuration register  
and/or selected using the EPC SELECT2 This feature will enable designing a wireless  
RFID safety seal. When breaking the connection by peeling off the label or manipulating  
a lock an alarm can be triggered.  
• RF field detection (G2iL+ only)  
The UCODE G2iL+ VDD pin can be also used as a RF field detector. Upon bringing the  
tag within an RF field, a pulse signal will be immediately sent from the VDD test pad.  
(for details see [3]).  
• Digital Switch (G2iL+ only)  
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UCODE G2iL and G2iL+  
The UCODE G2iL+ OUT pin can be used as digital switch. The state of the output pad  
can be switched to VDD or GND depending on the Digital OUT bit of the Configuration  
Word register. The state of the output is persistent in the memory even after KILL  
or switching off the supply. This feature will allow activating/deactivating externally  
connected peripherals or can be used as theft deterrence of electronics.  
The state of the OUT pin can also be changed temporary by toggling the 'Invert Digital  
Output' bit.  
• Data transfer Mode (G2iL+ only)  
In applications where not switching the output like described in "Digital Switch" but  
external device communication is needed the G2iL+ Data Transfer Mode can be used  
by setting the according bit of the Configuration Word register. When activated the air  
interface communication will be directly transferred to the OUT pad of the chip.  
Two modes of data transfer are available and can be switched using the Transparent  
Mode DATA/RAW bit.  
The default Transparent Mode DATA will remove the Frame Sync of the  
communication and toggle the output with every raising edge in the RF field. This will  
allow implementing a Manchester type of data transmission.  
The Transparent Mode RAW will switch the demodulated air interface communication  
to the OUT pad.  
• External Supply Indicator - Digital Input (G2iL+ only)  
The VDD pad of the UCODE G2iL+ can be used as a single bit digital input pin.  
The state of the pad is directly associated with the External Supply Indicator bit of  
the configuration register. Simple one bit return signaling (chip to reader) can be  
implemented by polling this Configuration Word register flag. RF reset is necessary for  
proper polling.  
• External Supply Mode (G2iL+ only)  
The UCODE G2iL+ can be supplied externally by connecting 1.85 V (Iout = 0µA)  
supply. When externally supplied less energy from the RF field is needed to operate  
the chip. This will not just enable further improved sensitivity and read ranges (up to -27  
dBm) but also enable a write range that is equal to the read range.  
The figure schematically shows the supply connected to the UCODE G2iL+.  
Remark: When permanently externally supplied there will not be a power-on-reset. This  
will result in the following limitations:  
• When externally supplied session flag S0 will keep it’s state during RF-OFF phase.  
• When externally supplied session flag S2, S3, SL will have infinite persistence time and  
will behave similar to S0.  
• Session flag S1 will behave regular like in pure passive operation.  
GND  
RFP  
OUT  
VDD  
Vsupply  
001aam229  
Figure 7.ꢀSchematic of external power supply  
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Table 9.ꢀChangeConfig custom command  
Command  
RFU  
Data  
RN  
CRC-16  
No. of bits  
Description  
16  
8
16  
16  
16  
-
11100000  
00000111  
00000000  
Toggle bits  
XOR RN 16  
handle  
The bits to be toggled in the configuration register need to be set to '1'.  
E.g. sending 0000 0000 0001 0001 XOR RN16 will activate the 4R and PSF. Sending the  
very same command a second time will disable the features again.  
The reply of the ChangeConfig will return the current register setting.  
Table 10.ꢀChangeConfig custom command reply  
Header  
Status bits  
16  
RN  
CRC-16  
No. of bits  
1
0
16  
16  
-
Description  
Config-Word  
Handle  
Table 11.ꢀChangeConfig command-response table  
Starting state  
Condition  
Response  
Next state  
ready  
all  
all  
-
-
ready  
arbitrate, reply,  
acknowledged  
arbitrate  
open  
valid handle Status word  
needs to change  
Backscatter unchanged  
Config-WordConfig-Word  
immediately  
open  
open  
valid handle Status word does Backscatter Config-Word  
not need to change  
immediately  
secured  
killed  
valid handle Status word  
needs to change  
Backscatter modified Config- secured  
Word, when done  
valid handle Status word does Backscatter Config-Word  
not need to change  
secured  
immediately  
all  
-
killed  
The features can only be activated/deactivated using standard EPC WRITE if the EPC  
bank is unlocked. The permanent and temporary bits of the Configuration Word can be  
toggled without the need for an ACCESS password in case the ACCESS password is set  
to zero. In case the EPC bank is locked the lock needs to be removed before applying  
changes or the ChangeConfig command has to be used.  
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UCODE G2iL and G2iL+  
10.7.2 G2iL, G2iL+ special features control mechanism  
Special features of the G2iL are managed using a configuration word (Config-Word)  
located at address 200h in the EPC memory bank.  
The entire Config-Word is selectable (using the standard EPC SELECT3 command)  
and can be read using standard EPC READ command and modified using the standard  
EPC WRITE or ChangeConfig custom command in case the EPC memory is locked for  
writing.  
ChangeConfig can be executed from the OPEN and SECURED state.  
The chip will take all "Toggle Bits" for ’0’ if the chip is in the OPEN state or the ACCESS  
password is zero; therefore it will not alter any status bits, but report the current status  
only. The command will be ignored with an invalid CRC-16 or an invalid handle. The chip  
will then remain in the current state. The CRC-16 is calculated from the first command-  
code bit to the last handle bit.  
A ChangeConfig command without frame-sync and proceeding Req_RN will be ignored.  
The command will also be ignored if any of the RFU bits are toggled.  
In order to change the configuration, to activate/deactivate a feature a ’1’ has to be  
written to the corresponding register flag to toggle the status. E.g. sending 0x0002 to  
the register will activate the read protection of the TID. Sending the same command a  
second time will again clear the read protection of the TID. Invalid toggling on indicator or  
RFU bits are ignored.  
Executing the command with zero as payload or in the OPEN state will return the current  
register settings. The chip will reply to a successful ChangeConfig with an extended  
preamble regardless of the TRext value of the Query command.  
After sending a ChangeConfig an interrogator shall transmit CW for less than TReply or 20  
ms, where TReply is the time between the interrogator's ChangeConfig command and the  
chip’s backscattered reply. An interrogator may observe three possible responses after  
sending a ChangeConfig, depending on the success or failure of the operation  
• ChangeConfigChangeConfig succeeded: The chip will backscatter the reply shown  
above comprising a header (a 0-bit), the current Status Word setting, the handle, and  
a CRC-16 calculated over the 0-bit, the status word and the handle. If the interrogator  
observes this reply within 20 ms then the ChangeConfig completed successfully.  
• The chip encounters an error: The chip will backscatter an error code during the  
CW period rather than the reply shown below (see EPCglobal Spec for error-code  
definitions and for the reply format).  
• ChangeConfig does not succeed: If the interrogator does not observe a reply within  
20 ms then the ChangeStatus did not complete successfully. The interrogator may  
issue a Req_RN command (containing the handle) to verify that the chip is still in the  
interrogator's field, and may reissue the ChangeConfig command.  
The G2iL configuration word is located at address 200h of the EPC memory and is  
structured as following:  
3
SELECT has to be applied onto the Configuration Word with pointer address 200h. Selecting bits within  
the Configuration Word using a pointer address not equal to 200h is not possible.  
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UCODE G2iL and G2iL+  
Table 12.ꢀAddress 200h to 207h  
Indicator bits  
Temporary bits  
Invert Output Transparent Data mode  
Tamper  
External supply  
indicator  
RFU  
RFU  
RFU  
indicator  
mode on/off  
data/raw  
0
1
2
3
4
5
6
7
Table 13.ꢀAddress 208h to 20Fh  
Permanent bits  
RFU  
max. backscatter Digital  
Privacy  
mode  
RFU  
Protect EPC Protect TID  
13 14  
PSF Alarm  
bit  
strength  
output  
8
9
10  
11  
12  
15  
The configuration word contains three different type of bits:  
• Indicator bits cannot be changed by command:  
Tag Tamper Alarm Indicator  
External Supply Indicator (digital input)  
• Temporary bits are reset at power up:  
Invert Output  
Transparent Mode on/off  
Data Mode data/raw  
• Permanent bits: permanently stored bits in the memory  
Max. Backscatter Strength  
Digital Output  
Read Range Reduction  
Read Protect EPC  
Read Protect TID  
PSF Alarm  
ReadProtect4  
The G2iL ReadProtect custom command enables reliable read protection of the entire  
G2iL memory. Executing ReadProtect from the Secured state will set the ProtectEPC  
and ProtectTID bits of the Configuration Word to '1'. With the ReadProtect-Bit set the  
G2iL will continue to work unaffected but veil its protected content.  
The read protection can be removed by executing Reset ReadProtect. The ReadProtect-  
Bits will than be cleared.  
Devices whose access password is zero will ignore the command. A frame-sync must be  
pre-pended the command.  
After sending the ReadProtect command an interrogator shall transmit CW for the lesser  
of TReply or 20 ms, where TReply is the time between the interrogator's ReadProtect  
command and the backscattered reply. An interrogator may observe three possible  
responses after sending a ReadProtect, depending on the success or failure of the  
operation:  
• ReadProtect succeeds: After completing the ReadProtect the G2iL shall backscatter  
the reply shown in Table 15 comprising a header (a 0-bit), the tag's handle, and a  
4 Note: The ChangeConfig command can be used instead of "ReadProtect", "ResetReadProtect",  
"ChangeEAS".  
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CRC-16 calculated over the 0-bit and handle. Immediately after this reply the G2iL will  
render itself to this ReadProtect mode. If the interrogator observes this reply within 20  
ms then the ReadProtect completed successfully.  
• The G2iL encounters an error: The G2iL will backscatter an error code during the CW  
period rather than the reply shown in the EPCglobal Spec (see Annex I for error-code  
definitions and for the reply format).  
• ReadProtect does not succeed: If the interrogator does not observe a reply within  
20 ms then the ReadProtect did not complete successfully. The interrogator may  
issue a Req_RN command (containing the handle) to verify that the G2iL is still in the  
interrogation zone, and may re-initiate the ReadProtect command.  
The G2iL reply to the ReadProtect command will use the extended preamble shown in  
EPCglobal Spec (Figure 6.11 or Figure 6.15), as appropriate (i.e. a Tag shall reply as if  
TRext=1) regardless of the TRext value in the Query that initiated the round.  
Table 14.ꢀReadProtect command  
Command  
RN  
CRC-16  
# of bits  
16  
16  
16  
-
description  
11100000 00000001  
handle  
Table 15.ꢀG2iL reply to a successful ReadProtect procedure  
Header  
RN  
CRC-16  
# of bits  
1
0
16  
16  
-
description  
handle  
Table 16.ꢀReadProtect command-response table  
Starting State  
Condition  
Response  
Next State  
ready  
ready  
all  
all  
–
–
arbitrate, reply,  
acknowledged  
arbitrate  
open  
all  
-
open  
secured  
valid handle & invalid  
access password  
–
arbitrate  
valid handle & valid  
non zero access  
password  
Backscatter handle,  
when done  
secured  
invalid handle  
all  
–
–
secured  
killed  
killed  
10.7.3 Reset ReadProtect3  
Reset ReadProtect allows an interrogator to clear the ProtectEPC and ProtectTID bits of  
the Configuration Word. This will re-enable reading of the related G2iL memory content.  
For details on the command response please refer to Table 17.  
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UCODE G2iL and G2iL+  
After sending a Reset ReadProtect an interrogator shall transmit CW for the lesser of  
TReply or 20 ms, where TReply is the time between the interrogator's Reset ReadProtect  
command and the G2iL backscattered reply. A Req_RN command prior to the Reset  
ReadProtect is necessary to successfully execute the command. A frame-sync must be  
pre-pended the command.  
An interrogator may observe three possible responses after sending a Reset  
ReadProtect, depending on the success or failure of the operation:  
• Reset ReadProtect succeeds: After completing the Reset ReadProtect a G2iL will  
backscatter the reply shown in Table 18 comprising a header (a 0-bit), the handle, and  
a CRC-16 calculated over the 0-bit and handle. If the interrogator observes this reply  
within 20 ms then the Reset ReadProtect completed successfully.  
• The G2iL encounters an error: The G2iL will backscatter an error code during the CW  
period rather than the reply shown in Table 18 (see EPCglobal Spec for error-code  
definitions and for the reply format).  
• Reset ReadProtect does not succeed: If the interrogator does not observe a reply  
within 20 ms then the Reset ReadProtect did not complete successfully. The  
interrogator may issue a Req_RN command (containing the handle) to verify that  
the G2iL is still in the interrogation zone, and may reissue the Reset ReadProtect  
command.  
The G2iL reply to the Reset ReadProtect command will use the extended preamble  
shown in EPCglobal Spec (Figure 6.11 or Figure 6.15), as appropriate (i.e. a G2iL will  
reply as if TRext=1 regardless of the TRext value in the Query that initiated the round.  
The Reset ReadProtect command is structured as following:  
• 16 bit command  
• Password: 32 bit Access-Password XOR with 2 times current RN16  
Remark: To generate the 32 bit password the 16 bit RN16 is duplicated and used two  
times to generate the 32 bit (e.g. a RN16 of 1234 will result in 1234 1234).  
• 16 bit handle  
• CRC-16 calculate over the first command-code bit to the last handle bit  
Table 17.ꢀReset ReadProtect command  
Command  
Password  
RN  
CRC-16  
# of bits  
16  
32  
16  
16  
-
description  
11100000  
00000010  
(access  
password) ⊗  
2*RN16  
handle  
Table 18.ꢀG2iL reply to a successful Reset ReadProtect command  
Header  
RN  
CRC-16  
# of bits  
1
0
16  
16  
-
description  
handle  
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UCODE G2iL and G2iL+  
Table 19.ꢀReset ReadProtect command-response table  
Starting State  
Condition  
Response  
Next State  
ready  
ready  
all  
all  
–
–
arbitrate, reply,  
acknowledged  
arbitrate  
open  
valid handle & valid access password  
Backscatter handle,  
when done  
open  
valid handle & invalid access password  
invalid handle  
–
–
arbitrate  
open  
secured  
valid handle & valid access password  
Backscatter handle,  
when done  
secured  
valid handle & invalid access password  
–
–
–
arbitrate  
secured  
killed  
invalid handle  
all  
killed  
10.7.4 ChangeEAS3  
UCODE G2iL equipped RFID tags will also feature a stand-alone operating EAS  
alarm mechanism for fast and offline electronic article surveillance. The PSF bit of the  
Configuration Word directly relates to the EAS Alarm feature. With an PSF bit set to  
'1' the tag will reply to an EAS_Alarm command by backscattering a 64 bit alarm code  
without the need of a Select or Query. The EAS is a built-in solution so no connection to  
a backend database is required. In case the EAS_Alarm command is not implemented in  
the reader a standard EPC SELCET to the Configuration Word and Query can be used.  
When using standard SELECT/QUERY the EPC will be returned during inventory.  
ChangeEAS can be executed from the Secured state only. The command will be ignored  
if the Access Password is zero, the command will also be ignored with an invalid CRC-16  
or an invalid handle, the G2iL will than remain in the current state. The CRC-16 is  
calculated from the first command-code bit to the last handle bit. A frame-sync must be  
pre-pended the command.  
The G2iL reply to a successful ChangeEAS will use the extended preamble, as  
appropriate (i.e. a Tag shall reply as if TRext=1) regardless of the TRext value in the  
Query that initiated the round.  
After sending a ChangeEAS an interrogator shall transmit CW for less than TReply or 20  
ms, where TReply is the time between the interrogator's ChangeEAS command and the  
G2iL backscattered reply. An interrogator may observe three possible responses after  
sending a ChangeEAS, depending on the success or failure of the operation  
• ChangeEAS succeeds: After completing the ChangeEAS a G2iL will backscatter the  
reply shown in Table 21 comprising a header (a 0-bit), the handle, and a CRC-16  
calculated over the 0-bit and handle. If the interrogator observes this reply within  
20 ms then the ChangeEAS completed successfully.  
• The G2iL encounters an error: The G2iL will backscatter an error code during the CW  
period rather than the reply shown in Table 21 (see EPCglobal Spec for error-code  
definitions and for the reply format).  
• ChangeEAS does not succeed: If the interrogator does not observe a reply within  
20 ms then the ChangeEAS did not complete successfully. The interrogator may  
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UCODE G2iL and G2iL+  
issue a Req_RN command (containing the handle) to verify that the G2iL is still in the  
interrogator's field, and may reissue the ChangeEAS command.  
Upon receiving a valid ChangeEAS command a G2iL will perform the commanded set/  
reset operation of the PSF bit of the Configuration Word.  
If PSF bit is set, the EAS_Alarm command will be available after the next power up and  
reply the 64 bit EAS code upon execution. Otherwise the EAS_Alarm command will be  
ignored.  
Table 20.ꢀChangeEAS command  
Command  
ChangeEAS  
RN  
CRC-16  
# of bits  
16  
1
16  
16  
description  
11100000  
00000011  
1 ... set PSF bit  
handle  
0 ... reset PSF bit  
Table 21.ꢀG2iL reply to a successful ChangeEAS command  
Header  
RN  
CRC-16  
# of bits  
1
0
16  
16  
-
description  
handle  
Table 22.ꢀChangeEAS command-response table  
Starting State  
Condition  
Response  
Next state  
ready  
ready  
all  
all  
–
–
arbitrate, reply,  
acknowledged  
arbitrate  
open  
all  
–
open  
secured  
valid handle  
backscatter handle,  
when done  
secured  
invalid handle  
all  
–
–
secured  
killed  
killed  
10.7.5 EAS_Alarm  
Upon receiving an EAS_Alarm custom command the UCODE G2iL will immediately  
backscatter an EAS-Alarmcode in case the PSF bit of the Configuration Word is set. The  
alarm code is returned without any delay caused by Select, Query and without the need  
for a backend database.  
The EAS feature of the G2iL is available after enabling it by sending a ChangeEAS  
command described in Section 10.7.4 or after setting the PSF bit of the Configuration  
Word to ’1’. With the EAS-Alarm enabled the G2iL will reply to an EAS_Alarm command  
by backscattering a fixed 64 bit alarm code. A G2iL will reply to an EAS_Alarm command  
from the ready state only. As an alternative to the fast EAS_Alarm command a standard  
SELECT 2 (upon the Configuration Word) and QUERY can be used.  
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If the PSF bit is reset to '0' by sending a ChangeEAS command in the password  
protected Secure state or clearing the PSF bit the G2iL will not reply to an EAS_Alarm  
command.  
The EAS_Alarm command is structured as following:  
• 16 bit command  
• 16 bit inverted command  
• DR (TRcal divide ratio) sets the T=>R link frequency as described in EPCglobal Spec.  
6.3.1.2.8 and Table 6.9.  
• M (cycles per symbol) sets the T=>R data rate and modulation format as shown in  
EPCglobal Spec. Table 6.10.  
• TRext chooses whether the T=>R preamble is pre-pended with a pilot tone as  
described in EPCglobal Spec. 6.3.1.3.  
A preamble must be pre-pended the EAS_Alarm command according EPCglobal Spec,  
6.3.1.2.8.  
Upon receiving an EAS_Alarm command the tag loads the CRC5 register with 01001b  
and backscatters the 64 bit alarm code accordingly. The reader is now able to calculate  
the CRC5 over the backscattered 64 bits received to verify the received code.  
Table 23.ꢀEAS_Alarm command  
Command Inv_Command DR  
M
TRext  
CRC-16  
# of bits  
16  
16  
1
2
1
16  
-
description 11100000 0 00011111  
0: DR = 8  
00: M = 1  
0: no pilot  
tone  
0000100  
11111011  
1: DR = 64/3 01: M = 2  
10: M = 4  
1: use pilot  
tone  
11: M = 8  
Table 24.ꢀG2iL reply to a successful EAS_Alarm command  
Header  
EAS Code  
# of bits  
1
0
64  
description  
CRC5 (MSB)  
Table 25.ꢀEAS_Alarm command-response table  
Starting State  
Condition  
Response  
Next state  
ready  
PSF bit is set  
backscatter alarm code ready  
--  
PSF bit is cleared  
arbitrate, reply,  
acknowledged  
all  
–
arbitrate  
open  
all  
all  
all  
–
–
–
open  
secured  
killed  
secured  
killed  
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11 Limiting values  
Table 26.ꢀLimiting values[1][2]  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Voltages are referenced to RFN  
Symbol  
Parameter  
Conditions  
Min  
Max  
Unit  
Bare die and SOT886 limitations  
Tstg  
storage temperature  
ambient temperature  
-55  
-40  
-
+125  
+85  
± 2  
°C  
°C  
kV  
Tamb  
VESD  
[3] [4]  
electrostatic discharge voltage Human body model  
Pad limitations  
Vi  
input voltage  
absolute limits, VDD-OUT  
pad  
-0.5  
-0.5  
-
+2.5  
+0.5  
100  
V
Io  
output current  
input power  
absolute limits input/output  
current, VDD-OUT pad  
mA  
mW  
Pi  
maximum power dissipation,  
RFP pad  
[1] Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional  
operation of the device at these or any conditions other than those described in the Operating Conditions and Electrical Characteristics section of this  
specification is not implied.  
[2] This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive static charge.  
Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maxima.  
[3] ANSI/ESDA/JEDEC JS-001  
[4] For ESD measurement, the die chip has been mounted into a CDIP20 package.  
CAUTION  
This device is sensitive to ElectroStatic Discharge (ESD). Observe  
precautions for handling electrostatic sensitive devices.  
Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5,  
JESD625-A or equivalent standards.  
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12 Characteristics  
12.1 UCODE G2iL, G2iL+ bare die characteristics  
Table 27.ꢀG2iL, G2iL+ RF interface characteristics (RFN, RFP)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
fi  
input frequency  
840  
-
960  
MHz  
Normal mode - no external supply, read range reduction OFF  
[1] [2] [3]  
Pi(min)  
Pi(min)  
minimum input power  
minimum input power  
READ sensitivity  
-
-
-18  
30  
-
-
dBm  
%
WRITE sensitivity, (write range/  
read range - ratio)  
[4]  
[4]  
[4]  
[4]  
[4]  
Ci  
Q
Z
input capacitance  
quality factor  
impedance  
parallel  
-
-
-
-
-
0.77  
9.7  
-
-
pF  
-
915 MHz  
866 MHz  
915 MHz  
953 MHz  
25 -j237 -  
23 -j224 -  
21 -j216 -  
Ω
Ω
Ω
External supply mode - VDD pad supplied, read range reduction OFF  
[1] [2]  
[2]  
Pi(min)  
minimum input power  
Ext. supplied READ  
-
-
-
-27  
-
-
-
dBm  
dBm  
Ω
Ext. supplied WRITE  
-27  
[4]  
Z
impedance  
externally supplied, 915 MHz  
7 -j230  
Read range reduction ON - no  
external supply  
[1] [2] [5]  
[2] [5]  
[4]  
Pi(min)  
minimum input power  
4R on READ  
-
-
-
+12  
-
-
-
dBm  
dBm  
Ω
4R on WRITE  
4R on, 915 MHz  
+12  
Z
impedance  
18 -j2  
Modulation resistance  
resistance  
[6]  
[7]  
R
modulation resistance, max.  
backscatter = off  
-
-
170  
55  
-
-
Ω
Ω
modulation resistance, max.  
backscatter = on  
[1] Power to process a Query command.  
[2] Measured with a 50 Ω source impedance.  
[3] Results in approx. -18.5 dBm tag sensitivity on a 2 dBi gain antenna.  
[4] At minimum operating power.  
[5] It has to be assured the reader (system) is capable of providing enough field strength to give +12 dBm at the chip otherwise communication with the chip  
will not be possible.  
[6] Enables tag designs to be within ETSI limits for return link data rates of e.g. 320 kHz/M4.  
[7] Will result in up to 10 dB higher tag backscatter power at high field strength.  
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Table 28.ꢀVDD pin characteristics  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
[1] [2]  
[3]  
Minimum supply voltage/current - without assisted EEPROM WRITE  
VDD  
IDD  
supply voltage  
supply current  
minimum voltage  
-
-
-
-
-
-
1.8  
7
V
minimum current, Iout-^- = 0 μA  
Iout = 100 μA  
μA  
μA  
110  
[4] [2]  
[3]  
Minimum supply voltage/current - assisted EEPROM READ and WRITE  
VDD  
supply voltage  
supply current  
minimum voltage, Iout = 0 μA  
Iout = 100 μA  
-
-
-
-
1.8  
1.85  
1.95  
125  
265  
V
-
-
-
V
IDD  
minimum current, Iout = 0 μA  
Iout = 100 μA  
μA  
μA  
[2] [5]  
Maximum supply voltage/current  
VDD  
supply voltage  
absolute maximum voltage  
absolute maximum current  
2.2  
-
-
-
-
V
Ii(max)  
maximum input current  
280  
μA  
[1] Activates Digital Output (OUT pin), increases read range (external supplied).  
[2] Operating the chip outside the specified voltage range may lead to undefined behaviour.  
[3] Either the voltage or the current needs to be above given values to guarantee specified functionality.  
[4] Activates Digital Output (OUT pin), increases read and write range (external supplied).  
[5] No proper operation is guaranteed if both, voltage and current, limits are exceeded.  
Table 29.ꢀG2iL, G2iL+ VDD and OUT pin characteristics  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
OUT pin characteristics  
VOL  
VOH  
Low-level output voltage  
HIGH-level output voltage  
Isink = 1 mA  
-
-
-
100  
-
mV  
V
VDD = 1.8 V; Isource  
= -100 µA  
1.5  
VDD/OUT pin characteristics  
[1]  
[2]  
CL  
Vo  
load capacitance  
output voltage  
VDD - OUT pin max.  
-
-
-
-
5
pF  
maximum RF peak  
voltage on VDD-OUT  
pins  
500  
mV  
[3]  
[4]  
[5]  
VDD/OUT pin tamper alarm characteristics  
RL(max)  
RL(min)  
maximum load resistance  
minimum load resistance  
resistance range high  
resistance range low  
-
-
-
<2  
-
MΩ  
MΩ  
>20  
[1] Is the sum of the allowed capacitance of the VDD and OUT pin referenced to RFN.  
[2] Is the maximum allowed RF input voltage coupling to the VDD/OUT pin to guarantee undisturbed chip functionality.  
[3] Resistance between VDD and OUT pin in checked during power up only.  
[4] Resistance range to achieve tamper alarm flag = 1.  
[5] Resistance range to achieve tamper alarm flag = 0:  
For further reading we recommend application note "FAQ UCODE G2iL+" ([3]) describing  
the output characteristics more in detail. An example schematic is available in application  
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note "UCODE G2iL+ Demo board Manual" ([4]). The documents are available at NXP  
Document Control or at the website www.nxp.com.  
Table 30.ꢀG2iL, G2iL+ memory characteristics  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max Unit  
EEPROM characteristics  
tret  
retention time  
Tamb ≤ 55 °C  
20  
-
-
-
year  
Nendu(W)  
write endurance  
1000 10000[1]  
cycle  
[1] Tamb ≤ 25 °C  
12.2 UCODE G2iL SOT886 characteristics  
Table 31.ꢀG2iL RF interface characteristics (RFN, RFP)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max Unit  
Normal mode - no external supply, read range reduction OFF  
[1][2]  
Pi(min)  
minimum input power  
READ  
sensitivity  
-
-
-17.6  
-
-
dB  
m
[3]  
Z
impedance  
915 MHz  
21 -j199  
Ω
Normal mode - externally supplied, read range reduction OFF  
[1][2]  
Pi(min)  
minimum input power  
READ  
sensitivity  
-
-27  
-
-
dB  
m
[3]  
Z
impedance  
915 MHz  
-
5.6 -j204  
Ω
[1] Power to process a Query command.  
[2] Measured with a 50 Ω source impedance.  
[3] At minimum operating power.  
Remark: For DC and memory characteristics refer to Table 28, Table 29 and Table 30.  
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13 Package outline  
XSON6: plastic, extremely thin small outline package; no leads;  
6 terminals; body 1.0 x 1.45 x 0.5 mm  
SOT886-1  
X
A
A
1
D
B
A
E
detail X  
terminal 1  
index area  
terminal 1  
index area  
e
C
1
v
w
C
C
A B  
y
1
y
b
C
L
2
1
3
L
1
e
L
6
4
0
2 mm  
scale  
Dimensions (mm are the original dimensions)  
Unit  
max 0.50 0.05 0.25 1.50 1.05  
A
A
b
D
E
e
e
L
L
L
v
w
y
y
1
1
1
1
2
0.35 0.40 0.10  
nom  
min  
mm  
0.20 1.45 1.00 0.6  
0.00 0.17 1.40 0.95  
1.0 0.30 0.35 0.05 0.10 0.05 0.05 0.05  
0.27 0.32 0.02  
Note  
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.  
sot886-1_po  
References  
Outline  
version  
European  
Issue date  
projection  
IEC  
JEDEC  
JEITA  
13-07-03  
13-07-10  
SOT886-1  
Figure 8.ꢀPackage outline SOT886  
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14 Packing information  
14.1 Wafer  
See [2]  
14.2 SOT886  
Part orientation T1. For details please refer to http://www.standardics.nxp.com/  
packaging/packing/pdf/sot886.t1.t4.pdf  
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15 Abbreviations  
Table 32.ꢀAbbreviations  
Acronym  
CRC  
Description  
Cyclic Redundancy Check  
Continuous Wave  
CW  
DSB-ASK  
DC  
Double Side Band-Amplitude Shift Keying  
Direct Current  
EAS  
Electronic Article Surveillance  
EEPROM  
EPC  
Electrically Erasable Programmable Read Only Memory  
Electronic Product Code (containing Header, Domain Manager, Object Class  
and Serial Number)  
FM0  
G2  
Bi phase space modulation  
Generation 2  
IC  
Integrated Circuit  
PIE  
Pulse Interval Encoding  
Real Read Range Reduction  
Product Status Flag  
RRRR  
PSF  
RF  
Radio Frequency  
UHF  
SECS  
TID  
Ultra High Frequency  
Semi Equipment Communication Standard  
Tag IDentifier  
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16 References  
[1] EPCglobal: EPC Radio-Frequency Identity Protocols Class-1 Generation-2  
UHF RFID Protocol for Communications at 860 MHz – 960 MHz, Version 1.1.0  
(December 17, 2005)  
[2] Data sheet - Delivery type description – General specification for 8" wafer on UV-  
tape with electronic fail die marking, BU-ID document number: 1093**5  
[3] Application note - AN10840 FAQ UCODE G2i  
[4] Application note - AN11237 UCODE G2iM+ demo board documentation  
5
** ... document version number  
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17 Revision history  
Table 33.ꢀRevision history  
Document ID  
Release date  
Data sheet status  
Change notice Supersedes  
SL3S1203_1213 v.4.5  
Modifications:  
20190212  
Product data sheet  
-
SL3S1203_1213 v.4.4  
• Section 16: updated  
20140317  
SL3S1203_1213 v.4.4  
Modifications:  
Product data sheet  
-
SL3S1203_1213 v.4.3  
• Table 8: Table notes updated  
• Figure 5: TIDs updated  
SL3S1203_1213 v.4.3  
Modifications:  
20131127  
Product data sheet  
-
-
SL3S1203_1213 v.4.2  
SL3S1203_1213 v.4.1  
• Figure 5: updated  
20130701  
SL3S1203_1213 v.4.2  
Modifications:  
Product data sheet  
• Update of delivery form  
• Update RF field detection  
SL3S1203_1213 v.4.1  
Modifications:  
20120917  
Product data sheet  
Product data sheet  
-
-
SL3S1203_1213 v.4.0  
SL3S1203_1213 v.3.9  
SL3S1203_1213 v.3.8  
• Update of delivery form  
20120227  
SL3S1203_1213 v.4.0  
Modifications:  
• Figure 4 "G2iL wafer layout": Figure notes (1) and (2) updated  
20120130 Product data sheet  
SL3S1203_1213 v.3.9  
Modifications:  
-
• Table 6 "Specifications": "Passivation on front" updated  
• Section 15.2.1 "General assembly recommendations": updated  
SL3S1203_1213 v.3.8  
Modifications:  
20120111  
• Section 8.1 "Wafer layout": Figure notes (1) and (2) updated  
20111124 Product data sheet  
• Table 11 "G2iL, G2iL+ overall memory map": updated  
• Table 34 "G2iL, G2iL+ RF interface characteristics (RFN, RFP)": updated  
Product data sheet  
-
SL3S1203_1213 v.3.7  
SL3S1203_1213 v.3.7  
Modifications:  
-
SL3S1203_1213 v.3.6  
SL3S1203_1213 v.3.6  
Modifications:  
20110803  
• Real Read Range Reduction feature added to G2iL  
20110531 Product data sheet  
• Superfluous text removed from Table 6  
Product data sheet  
-
-
-
SL3S1203_1213 v.3.5  
SL3S1203_1213 v.3.4  
SL3S1203_1213 v.3.3  
SL3S1203_1213 v.3.5  
Modifications:  
SL3S1203_1213 v.3.4  
Modifications:  
20110511  
Product data sheet  
• Security status changed into COMPANY PUBLIC  
• Delivery form of FCS2 strap added  
• Section 13 "Package information", Section 15 "Handling information" and Section 16 "Packing  
information" added  
SL3S1203_1213 v.3.3  
Modifications:  
20110131  
Product data sheet  
-
SL3S1203_1213 v.3.2  
• Section 4 "Ordering information": new types SL3S1203FUD and SL3S1213FUD added  
• Section 9 "Mechanical specification": updated according to the new types  
• Replaced wording of "ChangeStatus" with "ChangeConfig"  
SL3S1203_1213 v.3.2  
20101109  
Product data sheet  
-
SL3S1203_1213 v.3.1  
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Document ID  
Release date  
Data sheet status  
Change notice Supersedes  
Modifications:  
• Version SOT886F1ꢀadded  
• Section 5 "Marking", Section 13 "Package outline" and Section 14 "Packing information"  
added  
SL3S1203_1213 v.3.1  
Modifications:  
20100922  
Product data sheet  
Product data sheet  
Objective data sheet  
-
-
-
SL3S1203_1213 v.3.0  
• General Modifications  
20100621  
SL3S1203_1213 v.3.0  
Modifications:  
178810  
-
• General update  
20100304  
178810  
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18 Legal information  
18.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Definition  
Objective [short] data sheet  
Development  
This document contains data from the objective specification for product  
development.  
Preliminary [short] data sheet  
Product [short] data sheet  
Qualification  
Production  
This document contains data from the preliminary specification.  
This document contains the product specification.  
[1] Please consult the most recently issued document before initiating or completing a design.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple  
devices. The latest product status information is available on the Internet at URL http://www.nxp.com.  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
18.2 Definitions  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors and its suppliers accept no liability for  
inclusion and/or use of NXP Semiconductors products in such equipment or  
applications and therefore such inclusion and/or use is at the customer’s own  
risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences  
of use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is  
intended for quick reference only and should not be relied upon to contain  
detailed and full information. For detailed and full information see the  
relevant full data sheet, which is available on request via the local NXP  
Semiconductors sales office. In case of any inconsistency or conflict with the  
short data sheet, the full data sheet shall prevail.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes  
no representation or warranty that such applications will be suitable  
for the specified use without further testing or modification. Customers  
are responsible for the design and operation of their applications and  
products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications  
and products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with  
their applications and products. NXP Semiconductors does not accept any  
liability related to any default, damage, costs or problem which is based  
on any weakness or default in the customer’s applications or products, or  
the application or use by customer’s third party customer(s). Customer is  
responsible for doing all necessary testing for the customer’s applications  
and products using NXP Semiconductors products in order to avoid a  
default of the applications and the products or of the application or use by  
customer’s third party customer(s). NXP does not accept any liability in this  
respect.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product  
is deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
18.3 Disclaimers  
Limited warranty and liability — Information in this document is believed  
to be accurate and reliable. However, NXP Semiconductors does not  
give any representations or warranties, expressed or implied, as to the  
accuracy or completeness of such information and shall have no liability  
for the consequences of use of such information. NXP Semiconductors  
takes no responsibility for the content in this document if provided by an  
information source outside of NXP Semiconductors. In no event shall NXP  
Semiconductors be liable for any indirect, incidental, punitive, special or  
consequential damages (including - without limitation - lost profits, lost  
savings, business interruption, costs related to the removal or replacement  
of any products or rework charges) whether or not such damages are based  
on tort (including negligence), warranty, breach of contract or any other  
legal theory. Notwithstanding any damages that customer might incur for  
any reason whatsoever, NXP Semiconductors’ aggregate and cumulative  
liability towards customer for the products described herein shall be limited  
in accordance with the Terms and conditions of commercial sale of NXP  
Semiconductors.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
Right to make changes — NXP Semiconductors reserves the right to  
make changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
SL3S1203_1213  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2019. All rights reserved.  
Product data sheet  
COMPANY PUBLIC  
Rev. 4.5 — 12 February 2019  
178845  
38 / 42  
 
NXP Semiconductors  
SL3S1203_1213  
UCODE G2iL and G2iL+  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or  
the grant, conveyance or implication of any license under any copyrights,  
patents or other industrial or intellectual property rights.  
use the product without NXP Semiconductors’ warranty of the product for  
such automotive applications, use and specifications, and (b) whenever  
customer uses the product for automotive applications beyond NXP  
Semiconductors’ specifications such use shall be solely at customer’s own  
risk, and (c) customer fully indemnifies NXP Semiconductors for any liability,  
damages or failed product claims resulting from customer design and use  
of the product for automotive applications beyond NXP Semiconductors’  
standard warranty and NXP Semiconductors’ product specifications.  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific NXP Semiconductors product is automotive qualified,  
the product is not suitable for automotive use. It is neither qualified nor  
tested in accordance with automotive testing or application requirements.  
NXP Semiconductors accepts no liability for inclusion and/or use of non-  
automotive qualified products in automotive equipment or applications. In  
the event that customer uses the product for design-in and use in automotive  
applications to automotive specifications and standards, customer (a) shall  
18.4 Trademarks  
Notice: All referenced brands, product names, service names and  
trademarks are the property of their respective owners.  
UCODE — is a trademark of NXP B.V.  
SL3S1203_1213  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2019. All rights reserved.  
Product data sheet  
COMPANY PUBLIC  
Rev. 4.5 — 12 February 2019  
178845  
39 / 42  
NXP Semiconductors  
SL3S1203_1213  
UCODE G2iL and G2iL+  
Tables  
Tab. 1.  
Tab. 2.  
Tab. 3.  
Tab. 4.  
Tab. 5.  
Tab. 6.  
Tab. 7.  
Tab. 8.  
Tab. 9.  
Ordering information ..........................................5  
Tab. 19. Reset ReadProtect command-response  
table .................................................................25  
Tab. 20. ChangeEAS command ....................................26  
Tab. 21. G2iL reply to a successful ChangeEAS  
command .........................................................26  
Tab. 22. ChangeEAS command-response table ........... 26  
Tab. 23. EAS_Alarm command .....................................27  
Tab. 24. G2iL reply to a successful EAS_Alarm  
command .........................................................27  
Marking codes ...................................................6  
Pin description bare die .................................... 8  
Pin description SOT886 .................................... 8  
Specifications .................................................. 10  
Overview of G2iL and G2iL+ features ............. 13  
G2iL memory sections .................................... 13  
G2iL, G2iL+ overall memory map ................... 14  
ChangeConfig custom command .................... 20  
Tab. 10. ChangeConfig custom command reply ........... 20  
Tab. 11. ChangeConfig command-response table ........ 20  
Tab. 12. Address 200h to 207h .....................................22  
Tab. 13. Address 208h to 20Fh .................................... 22  
Tab. 14. ReadProtect command ....................................23  
Tab. 15. G2iL reply to a successful ReadProtect  
procedure ........................................................ 23  
Tab. 25. EAS_Alarm command-response table ............ 27  
Tab. 26. Limiting values ................................................ 28  
Tab. 27. G2iL, G2iL+ RF interface characteristics  
(RFN, RFP) ..................................................... 29  
Tab. 28. VDD pin characteristics ...................................30  
Tab. 29. G2iL, G2iL+ VDD and OUT pin  
characteristics ..................................................30  
Tab. 16. ReadProtect command-response table ...........23  
Tab. 17. Reset ReadProtect command ......................... 24  
Tab. 30. G2iL, G2iL+ memory characteristics ............... 31  
Tab. 31. G2iL RF interface characteristics (RFN,  
RFP) ................................................................ 31  
Tab. 18. G2iL reply to  
a
successful Reset  
ReadProtect command ....................................24  
Tab. 32. Abbreviations ...................................................34  
Tab. 33. Revision history ...............................................36  
SL3S1203_1213  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2019. All rights reserved.  
Product data sheet  
COMPANY PUBLIC  
Rev. 4.5 — 12 February 2019  
178845  
40 / 42  
NXP Semiconductors  
SL3S1203_1213  
UCODE G2iL and G2iL+  
Figures  
Fig. 1.  
Fig. 2.  
Fig. 3.  
Fig. 4.  
Fig. 5.  
Block diagram of G2iL IC ..................................7  
Fig. 6.  
Schematic of connecting VDD and OUT pad  
with a predetermined breaking point to turn  
a standard RFID label into a wireless safety  
seal ..................................................................18  
Schematic of external power supply ................19  
Package outline SOT886 ................................ 32  
Pinning bare die ................................................8  
Pin configuration for SOT886 ............................8  
G2iL wafer layout ..............................................9  
G2iL TID memory structure .............................16  
Fig. 7.  
Fig. 8.  
SL3S1203_1213  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2019. All rights reserved.  
Product data sheet  
COMPANY PUBLIC  
Rev. 4.5 — 12 February 2019  
178845  
41 / 42  
NXP Semiconductors  
SL3S1203_1213  
UCODE G2iL and G2iL+  
Contents  
1
General description ............................................ 1  
18  
Legal information ..............................................38  
2
2.1  
Features and benefits .........................................2  
Key features ...................................................... 2  
Memory ..............................................................2  
Key benefits .......................................................2  
End user benefit ................................................ 2  
Antenna design benefits ....................................2  
Label manufacturer benefit ................................3  
Custom commands ............................................3  
Applications .........................................................4  
Markets .............................................................. 4  
Applications ........................................................4  
Ordering information .......................................... 5  
Marking .................................................................6  
Block diagram ..................................................... 7  
Pinning information ............................................ 8  
Pin description ...................................................8  
Wafer layout ........................................................ 9  
Wafer layout ...................................................... 9  
Mechanical specification ..................................10  
Wafer specification .......................................... 10  
Wafer ............................................................... 10  
Fail die identification ........................................11  
Map file distribution ......................................... 11  
Functional description ......................................12  
Air interface standards .....................................12  
Power transfer ................................................. 12  
Data transfer ....................................................12  
Reader to tag Link ...........................................12  
Tag to reader Link ...........................................12  
G2iL and G2iL+ differences .............................13  
Supported commands ......................................13  
G2iL, G2iL+ memory ....................................... 13  
G2iL, G2iL+ overall memory map ....................14  
G2iL TID memory details .................................16  
Custom commands ..........................................17  
ChangeConfig ..................................................17  
G2iL, G2iL+ special features control  
2.1.1  
2.2  
2.2.1  
2.2.2  
2.2.3  
2.3  
3
3.1  
3.2  
4
5
6
7
7.1  
8
8.1  
9
9.1  
9.1.1  
9.1.2  
9.1.3  
10  
10.1  
10.2  
10.3  
10.3.1  
10.3.2  
10.4  
10.5  
10.6  
10.6.1  
10.6.2  
10.7  
10.7.1  
10.7.2  
mechanism .......................................................21  
Reset ReadProtect3 ........................................ 23  
ChangeEAS3 ................................................... 25  
EAS_Alarm ...................................................... 26  
Limiting values ..................................................28  
Characteristics .................................................. 29  
UCODE G2iL, G2iL+ bare die characteristics ...29  
UCODE G2iL SOT886 characteristics .............31  
Package outline .................................................32  
Packing information ..........................................33  
Wafer ............................................................... 33  
SOT886 ............................................................33  
Abbreviations .................................................... 34  
References .........................................................35  
Revision history ................................................ 36  
10.7.3  
10.7.4  
10.7.5  
11  
12  
12.1  
12.2  
13  
14  
14.1  
14.2  
15  
16  
17  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section 'Legal information'.  
© NXP B.V. 2019.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 12 February 2019  
Document identifier: SL3S1203_1213  
Document number: 178845  

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