TDA1388 [NXP]
Bitstream continuous calibration filter-DAC for CD-ROM audio applications; 比特流连续过滤器的校准-DAC用于CD-ROM音频应用
| 型号： | TDA1388 |
| 厂家： | 
NXP |
| 描述： | Bitstream continuous calibration filter-DAC for CD-ROM audio applications |
| 文件： | 总24页 (文件大小：137K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA1388
Bitstream continuous calibration
filter-DAC for CD-ROM audio
applications
1996 Jul 17
Objective specification
Supersedes data of 1995 Dec 08
File under Integrated Circuits, IC01
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
FEATURES
Multiple format input interface
• I2S-bus and LSB-justified input format compatible
• 1fs input format data rate.
Extensive channel manipulation features
• Separate soft mute on left and right channel
• Channel interchange function (left to right and right to
left)
GENERAL DESCRIPTION
• Monaural function (left to right or right to left)
• True mono function 1⁄2(left plus right).
The TDA1388 CMOS digital-to-analog bitstream converter
incorporates an up-sampling digital filter and noise shaper,
unique signal processing features and integrated line and
headphone drivers. The digital processing features are of
high sound quality due to the wide dynamic range of the
bitstream conversion technique.
Digital sound processing
• Separate digital volume control for left and right
channels
The TDA1388 supports the I2S-bus data input mode with
word lengths of up to 20 bits and the LSB justified serial
data input format with word lengths of 16, 18 and 20 bits.
Two cascaded half-band filters and a sample-and-hold
function increase the oversampling rate from 1fs to 64fs.
A 2nd-order noise shaper converts this oversampled data
to a bitstream for the 5-bit continuous calibration
Digital-to-Analog Converters (DACs).
• Digital tone control, bass boost and treble
• dB-linear volume and tone control (low microcontroller
load)
• Digital de-emphasis
• Soft mute.
Advanced audio output configuration
On board amplifiers convert the output current to a voltage
signal capable of driving a line output. The signal is also
used to feed the integrated headphone amplifiers.
The volume of the headphone is controlled by an external
potentiometer.
• Stereo line output (under microcontroller volume
control)
• Stereo headphone output (under 5-tap potentiometer
volume control)
• Line output independent of headphone output volume
• Power on/off click prevention circuitry
The TDA1388 has special sound processing features for
use in CD-ROM audio applications, which can be
controlled by static pins or microcontroller interface.
These functions are de-emphasis, volume, bass boost,
treble, soft mute and the channel manipulation functions
needed for ATAPI-compliant functionality in CD-ROM
audio processing.
• High linearity, dynamic range, low distortion.
General
• Integrated digital filter plus DAC plus headphone driver
• No analog post filter required
• Easy application
• Functions controllable by static pins or by
microcontroller interface
• 5 V power supply
• Low power consumption
• Small package size (SO28 and SSOP28).
1996 Jul 17
2
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
ORDERING INFORMATION
PACKAGE
TYPE
NUMBER
NAME
DESCRIPTION
VERSION
TDA1388T
TDA1388M
SO28
plastic small outline package; 28 leads; body width 7.5 mm.
SOT136-1
SSOP28
plastic shrink small outline package; 28 leads; body width 5.3 mm.
SOT341-1
QUICK REFERENCE DATA
SYMBOL
Supply
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDD
supply voltage
supply current
note 1
note 2
4.5
5.0
5.5
−
V
IDD
−
22
mA
V
VFS(rms)
full-scale output voltage
(RMS value)
VDD = 5 V
0.9
1.0
1.1
(THD+N)/S
total harmonic distortion plus
noise as a function of signal for RL = 5 kΩ
the line output
0 dB signal;
−
−
−
−
−
−
−
−
−
−
90
−85
0.006
−35
1.8
−80
0.013
−30
3.2
−
dB
%
−60 dB signal;
RL = 5 kΩ
dBA
%
total harmonic distortion plus
noise as a function of signal for RL = 16 Ω
the headphone output
0 dB signal;
−65
0.056
−70
0.032
−35
1.8
dB
%
−
0 dB signal;
RL = 32 Ω
−
dB
%
−
−60 dB signal;
RL = 16 Ω or RL = 32 Ω
−30
3.2
−
dBA
%
S/N
BR
signal-to-noise ratio
A-weighted;
at code 00000H
fsys = 256fs
95
dBA
input bit rate at data input
−
64fs
48fs
−
−
−
bits
bits
fsys = 384fs
−
fsys
system clock frequency
8.192
−20
18.432 MHz
+70 °C
Tamb
operating ambient temperature
−
Notes
1. All VDD and VSS pins must be connected to the same supply or ground respectively.
2. Measured at input code 00000H and VDD = 5 V.
1996 Jul 17
3
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
BLOCK DIAGRAM
IF1 IF2
DATA
11
WS
10
BCK
9
ACP
19
7
8
SERIAL DATA INPUT
CHANNEL INTERCHANGE
DE-EMPHASIS
14
15
SYSCLK
SYSSEL
TIMING
18
APPL2
VOLUME CONTROL
BASS BOOST AND TREBLE
SOFT MUTE
20
12
13
FEATURE
CONTROL
UNIT
17
TC
APPL1
V
DDD
FILTER STAGE 1 + 2
16
APPL0
4f
s
SAMPLE-AND-HOLD
16 × OVERSAMPLING
V
SSD
64f
s
22
2nd-ORDER
NOISE
2nd-ORDER
NOISE
V
DDA
SHAPER
SHAPER
TDA1388
DATA
ENCODER
DATA
ENCODER
23
V
SSA
16 (4-BIT)
16 (4-BIT)
CALIBRATED
CURRENT
SOURCES
CALIBRATED
CURRENT
SOURCES
24
5
4
FILTCL
FILTCR
R
R
CONV1
CONV2
−
+
−
+
LEFT OUTPUT
SWITCHES
RIGHT OUTPUT
SWITCHES
25
V
V
OL
OR
REFERENCE
SOURCE
V
DDA
16 (4-BIT)
CALIBRATED
CURRENT
SINKS
16 (4-BIT)
CALIBRATED
CURRENT
SINKS
28
V
DDO
6
3
1
V
V
ref
SSO1
21
V
SSO2
+
−
+
REFERENCE
SOURCE
26
−
HPINR
HPINL
30 kΩ
30 kΩ
30 kΩ
30 kΩ
2
27
MGD015
HPOUTR
HPOUTL
Fig.1 Block diagram.
4
1996 Jul 17
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
PINNING
SYMBOL PIN
DESCRIPTION
VSSO1
HPOUTL
HPINL
VOL
1
2
3
4
5
operational amplifier ground 1
left headphone output voltage
left headphone input voltage
left channel audio voltage output
FILTCL
capacitor for left channel 1st-order
filter function, should be connected
between this pin and VOL (pin 4)
handbook, halfpage
Vref
6
internal reference voltage
input format selection 1
input format selection 2
bit clock input
V
1
2
3
4
5
6
7
8
9
28
27
26
25
24
23
22
21
V
DDO
SSO1
IF1
7
HPOUTL
HPINL
HPOUTR
HPINR
IF2
8
BCK
9
V
V
OL
OR
WS
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
word selection input
data input
FILTCL
FILTCR
DATA
VDDD
VSSD
V
V
digital supply voltage
digital ground
ref
SSA
IF1
IF2
V
DDA
TDA1388
SYSCLK
SYSSEL
APPL0
APPL1
APPL2
ACP
system clock 256fs or 384fs
system clock selection
application mode 0 input
application mode 1 input
application mode 2 input
application control input
test control
V
SSO2
BCK
20 TC
WS 10
19 ACP
DATA 11
18 APPL2
17 APPL1
16 APPL0
15 SYSSEL
V
12
13
DDD
V
TC
SSD
VSSO2
VDDA
VSSA
operational amplifier ground 2
analog supply voltage
analog ground
SYSCLK 14
MGD014
FILTCR
capacitor for right channel 1st-order
filter function, should be connected
between this pin and VOR (pin 25)
VOR
25
26
27
28
right channel audio voltage output
right headphone input voltage
right headphone output voltage
operational amplifier supply voltage
HPINR
HPOUTR
VDDO
Fig.2 Pin configuration.
1996 Jul 17
5
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
FUNCTIONAL DESCRIPTION
Table 2 Data input formats
The TDA1388 CMOS DAC incorporates an up-sampling
digital filter, a sample-and-hold register, a noise shaper,
continuously calibrated current sources, line amplifiers
and headphone amplifiers. The 1fs input data is increased
to an oversampled rate of 64fs. This high-rate
oversampling, together with the 5-bit DAC, enables the
filtering required for waveform smoothing and out-of-band
noise reduction to be achieved by simple 1st-order analog
post-filtering.
IF1
IF2
FORMAT
0
0
1
1
0
1
0
1
I2S-bus
LSB-justified, 16 bits
LSB-justified, 18 bits
LSB-justified, 20 bits
The input formats are illustrated in Fig.3. Left and right
data-channel words are time multiplexed.
System clock
Input mode
The TDA1388 accommodates slave mode only, this
means that in all applications the system devices must
provide the system clock. The system frequency is
selectable. The options are 256fs and 384fs. The system
clock must be locked in frequency to the I2S-bus input
signals.
The TDA1388 has two input modes, a static-pin mode and
a microcontroller mode. In the static-pin mode, the digital
sound processing features such as mute left, mute right
and de-emphasis are controlled by external pins.
The other digital sound processing features have a default
value. In the microcontroller mode, all the digital sound
processing features can be controlled by the
Table 1 System clock selection
microcontroller. The controllable features are:
SYSSEL
DESCRIPTION
•
•
•
•
•
•
•
De-emphasis
0
1
256fs
384fs
Volume left channel
Volume right channel
Flat/min/max switch
Bass boost
Multiple format input interface
The TDA1388 supports the following data input formats;
Treble
•
•
I2S-bus with data word length of up to 20 bits.
Channel manipulation modes.
LSB justified serial format with data word length of
16, 18 or 20 bits.
The selection of one of the two modes is controlled by the
ACP pin. When this pin is at logic 0 then the static pin
mode will be selected. When the pin is at logic 1 then the
microcontroller mode will be selected.
Table 3 Selectable values of the digital sound processing features
FEATURES STATIC-PIN MODE
De-emphasis 0 Hz or 44.1 kHz
MICROCONTROLLER MODE
0 Hz or 44.1 kHz
Volume left channel
Volume right channel
Flat/min/max switch
Bass boost
0 dB (fixed)
0 dB to −∞ dB
0 dB (fixed)
0 dB to −∞ dB
flat (fixed)
flat/min/max
flat set (fixed)
flat set (fixed)
external pin
flat, min or max set
flat, min or max set
selectable (see Table 4)
selectable (see Table 4)
selectable (see Table 10)
Treble
Mute left channel
Mute right channel
Channel manipulation modes
external pin
L_CHANNEL = L (fixed)
R_CHANNEL = R (fixed)
1996 Jul 17
6
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
STATIC-PIN MODE
Table 5 Selection of data transfer
BIT 1 BIT 0 TRANSFER
In the static-pin mode most of the features have a default
value (see Table 3). The features that are controlled by the
external pins are, mute left channel, mute right channel
and de-emphasis.
0
0
data (volume left, volume right, bass
boost and treble)
0
1
1
0
not used
status (de-emphasis, mode and
channel-manipulation)
Table 4 External pin feature control in the static-pin
mode
1
1
not used
PIN
FEATURE
APPL0
APPL1
APPL2
mute left channel
mute right channel
de-emphasis
Data bits 7 to 2 represent a 6-bit device address, with bit 7
being the MSB and bit 2 the LSB. The address of the
TDA1388 is 000101 (bit 7 to bit 2). In the event that the
TDA1388 receives a different address, it will deselect its
microcontroller interface logic.
MICROCONTROLLER MODE
The exchange of data and control information between the
microcontroller and the TDA1388 is accomplished through
a serial hardware interface comprising the following pins:
Data transfer mode
The selection preformed in the address mode remains
active during subsequent data transfers, until the
TDA1388 receives a new address command.
The fundamental timing of data transfers is essentially the
same as in the address mode, shown in Fig.4.
The maximum input clock and data rate is 64fs. All
transfers are bitwise, i.e. they are based on groups of
8 bits. Data will be stored in the TDA1388 after the eighth
bit of a byte has been received. A multibyte transfer is
illustrated in Fig.6.
APPL0: microcontroller interface data line.
APPL1: microcontroller interface mode line.
APPL2: microcontroller interface clock line.
Information transfer through the microcontroller bus is
organized in accordance with the so-called ‘L3’ format, in
which two different modes of operation can be
distinguished; address mode and data transfer mode
(see Figs 4 and 5).
The address mode is required to select a device
communicating via the L3-bus and to define the
destination registers for the data transfer mode.
Data transfer for the TDA1388 can only be in one direction,
input to the TDA1388 to program its sound processing and
other functional features.
Programming the sound processing and other features
The sound processing and other feature values are stored
in independent registers. The first selection of the registers
is achieved by the choice of data type that is transferred.
This is performed in the address mode, BIT 1 and BIT 0
(see Table 5). The second selection is performed by the
2 MSBs of the data byte (BIT 7 and BIT 6). The other bits
in the data byte (BIT 5 to BIT 0) is the value that is placed
in the selected registers.
Address mode
The address mode is used to select a device for
subsequent data transfer and to define the destination
registers. The address mode is characterized by APPL1
being LOW and a burst of 8 pulses on APPL2,
accompanied by 8 data bits. The fundamental timing is
shown in Fig.4. Data bits 0 to 1 indicate the type of the
subsequent data transfer as shown in Table 5.
When the data transfer of type ‘data’ is selected, the
features VOLUME_R, VOLUME_L, BASS BOOST and
TREBLE can be controlled. When the data transfer of type
‘status’ is selected, the features MODE, DE-EMPHASIS,
CHANNEL_MANIP_R and CHANNEL_MANIP_L can be
controlled.
Table 6 Data transfer of type ‘status’
BIT 7 BIT6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
M1 M0 DE OR1 OR0 OL1
REGISTER SELECTED
0
OL0 MODE (1 : 0), DEEMPHASIS, CHANNEL_MA-
NIP_R (1 : 0), CHANNEL_MANIP_L (1 : 0)
1996 Jul 17
7
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
Table 7 Data transfer of type ‘data’
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
REGISTER SELECTED
0
0
1
1
0
1
0
1
VR5
VL5
X(1)
X(1)
VR4
VL4
BB4
TR4
VR3
VL3
BB3
TR3
VR2
VL2
BB2
TR2
VR1
VL1
BB1
TR1
VR0 VOLUME_R (5 : 0)
VL0 VOLUME_L (5 : 0)
BB0 BASS BOOST (4 : 0)
TR0 TREBLE (4 : 0)
Note
1. X = don’t care.
MODE: a 2-bit value to program the mode of the sound
processing filters of Bass Boost and Treble. There are
three modes: flat, min and max.
DE-EMPHASIS: a 1-bit value to enable the digital
de-emphasis filter.
Table 9 De-emphasis
Table 8 The flat/min/max switch
DEEM
FUNCTION
no de-emphasis
de-emphasis, 44.1 kHz
MODE 1
MODE 0
FUNCTION
flat
0
1
0
0
1
1
0
1
0
1
min
min
max
CHANNEL_MANIP_R and CHANNEL_MANIP_L: both are a 2 bit value to program the right or left channel manipulation.
Table 10 Channel manipulation modes
CHANNEL_MANIP_L<1 : 0>
CHANNEL_MANIP_R<1 : 0>
L_CHANNEL R_CHANNEL
00
00
00
00
01
01
01
01
10
10
10
10
11
11
11
11
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
MUTE
MUTE
MUTE
R
MUTE
L
MUTE
1⁄2(L + R)
R
MUTE
R
R
R
L
1⁄2(L + R)
MUTE
R
R
L
L
L
L
L
1⁄2(L + R)
MUTE
R
1⁄2(L + R)
1⁄2(L + R)
1⁄2(L + R)
1⁄2(L + R)
L
1⁄2(L + R)
1996 Jul 17
8
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
VOLUME_R: a 6-bit value to program the right channel volume attenuation (VR5 to VR0). The range is 0 dB to −∞ dB in
steps of 1 dB.
Table 11 Volume right settings
VR5
VR4
VR3
VR2
VR1
VR0
VOLUME (dB)
0
0
0
0
...
1
1
1
1
1
1
1
1
0
0
0
0
...
1
1
1
1
1
1
1
1
0
0
0
0
...
1
1
1
1
1
1
1
1
0
0
0
0
...
0
0
0
0
1
1
1
1
0
0
1
1
...
0
0
1
1
0
0
1
1
0
1
0
1
...
0
1
0
1
0
1
0
1
0
0
−1
−2
...
−55
−∞
−∞
−∞
−∞
−∞
−∞
−∞
VOLUME_L: a 6-bit value to program the left channel volume attenuation (VL5 to VL0). The range is 0 dB to −∞ dB in
steps of 1 dB.
Table 12 Volume left settings
VR5
0
VR4
0
VR3
0
VR2
0
VR1
0
VR0
0
VOLUME (dB)
0
0
0
0
0
0
0
1
0
0
0
0
1
0
−1
−2
...
0
0
0
0
1
1
...
1
...
1
...
1
...
0
...
0
...
0
−55
−∞
−∞
−∞
−∞
−∞
−∞
−∞
1
1
1
0
0
1
1
1
1
0
1
0
1
1
1
0
1
1
1
1
1
1
0
0
1
1
1
1
0
1
1
1
1
1
1
0
1
1
1
1
1
1
1996 Jul 17
9
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
BASS BOOST: a 5-bit value to program the bass boost setting. The used set depends on the MODE bits.
Table 13 Bass boost settings
BASS BOOST
BB4
BB3
BB2
BB1
BB0
FLAT SET (dB)
MIN SET (dB)
MAX SET (dB)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
:
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
:
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
:
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
:
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
0
0
1
0
1
0
1
1
0
1
0
1
0
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
0
0
0
0
2
2
4
4
6
6
8
8
10
12
14
16
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
:
10
12
14
16
18
20
22
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
:
1
1
1
1
0
0
18
24
1996 Jul 17
10
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
TREBLE: a 5-bit value to program the treble setting. The used set depends on the MODE bits.
Table 14 Treble settings
TREBLE
TR4
TR3
TR2
TR1
TR0
FLAT SET (dB)
MIN SET (dB)
MAX SET (dB)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
:
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
:
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
:
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
0
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
0
0
2
2
4
4
6
6
6
6
6
6
6
6
6
6
:
0
0
2
2
4
4
6
6
6
6
6
6
6
6
6
6
:
1
1
1
1
0
0
6
6
The different modes are as follows:
• Normal stereo output
Flat/min/max setting selection
In the TDA1388 has three setting for the digital sound
features bass boost and treble. The possible settings are
called ‘flat’, ‘min’ and ‘max’. The flat setting has no
influence on the audio signal, the minimum setting has a
small influence on the audio signal and the maximum
setting has a large influence on the audio signal. In the
static-pin mode, the flat setting is used for the bass boost
and treble filters. In the microcontroller mode, all three
settings can by controlled by a register.
• Left/right reverse output
• Mono left/right output: 1⁄2(L + R)
• Output muting with soft mute.
De-emphasis
De-emphasis is controlled by an external pin in the
static-pin mode and by a register in the microcontroller
mode.The digital de-emphasis filter is dimensioned to
produce the de-emphasis frequency characteristics for the
sample rate 44.1 kHz. With its 18-bit dynamic range, the
digital de-emphasis filter of the TDA1388 is a convenient
and component saving alternative to analog de-emphasis.
De-emphasis is synchronized to the sample clock, so that
operation always takes place on complete samples.
Channel manipulation modes
In the TDA1388 there is a channel manipulation function
implemented. This function has a fixed value in the
static-pin mode, the left signal on the left channel and the
right signal on the right channel. In the microcontroller
mode several option are possible.
1996 Jul 17
11
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
When the mute is active for a channel, the value of the
sample is decreased smoothly to zero following a raised
cosine curve. 32 coefficients are used to step down the
value of the data, each one being used 32 times before
stepping on to the next. This amounts to a mute transition
of 23 ms at fs = 44.1 kHz. When the mute is released, the
samples are returned to the full level again following a
raised cosine curve with the same coefficients being used
in the reverse order. The mute, on the left or right channel,
is synchronized to the sample clock, so that operation
always takes place on complete samples.
Volume control
The volume of the left and right channels are controlled by
a fixed value (0 dB) in the static-pin mode and by separate
registers in the microcontroller mode. In the
microcontroller mode the values of both channels can
vary, independent of each other, from 0 dB to −∞ dB.
Since there is no headroom included into the sound control
section, the volume control precedes the sound control.
Full volume and neutral setting (flat) of the sound control
results in full-scale output. Any tone boost will directly
cause clipping, which can be avoided by reduction of the
volume setting.
Oversampling and noise shaper
The digital filter is four times oversampling filter. It consists
of two sections which each increase the sample rate by 2.
The 2nd-order noise shaper operates at 64fs. It shifts
in-band quantization noise to frequencies well above the
audio band. This noise shaping technique used in
combination with a sign-magnitude coding enables high
signal-to-noise ratios to be achieved. The noise shaper
outputs a 5-bit PDM bitstream signal to the DAC.
Bass boost
A strong bass boost effect, which is useful in
compensating for poor response of portable headphone
sets, is implemented digitally in the TDA1388 and can be
controlled in the microcontroller mode. In the static-pin
mode, the flat setting is fixed. In the microcontroller mode,
valid settings range from flat (no influence on audio) to
+18 dB with step sizes of 2 dB in minimum and to +24 dB
with step sizes of 2 dB in maximum. The programmable
bass boost filter is a 2nd-order shelving type with a fixed
corner frequency of 130 Hz for the minimum setting and a
fixed corner frequency of 230 Hz for the maximum setting
and has a Butterworth characteristic. Because of the
exceptional amount of programmable gain, bass boost
should be used with adequate prior attenuation, using the
volume control.
Continuous calibration DAC
The dual 5-bit DAC uses the continuous calibration
technique. This method, based on charge storage,
involves exact duplication of a single reference current
source. In the TDA1388, 32 such current sources plus
1 spare source are continuously calibrated. The spare
source is included to allow continuous convertor operation.
The DAC receives a 5-bit data bitstream from the noise
shaper. This data is converted so that no current is
switched to the output during digital silence
Treble
(input 00000H). In this way very high signal-to-noise
performance is achieved.
A treble effect is implemented digitally in the TDA1388 and
can be controlled in the microcontroller mode. In the
static-pin mode, the flat setting is fixed. In the
microcontroller mode, valid settings range from flat (no
influence on audio) to +6 dB with step sizes of 2 dB in
minimum and to +6 dB with step sizes of 2 dB in
maximum. The programmable treble filter is a 1st-order
shelving type with a fixed corner frequency of 2.8 kHz for
the minimum setting and a fixed corner frequency of
5.0 kHz for the maximum setting. Because of the
exceptional amount of programmable gain, treble should
be used with adequate prior attenuation, using the volume
control.
Stereo line driver
High precision, low-noise amplifiers together with the
internal conversion resistor RCONV1 and RCONV2 convert
the converter output current to a voltage capable of driving
a headphone. The voltage is available at VOL and VOR
(pins 4 and 25).
Stereo headphone driver
High precision, low-noise amplifiers are capable of driving
a headphone load. The voltage is available at HPOUTL
and HPOUTR (pins 2 and 27).
Soft mute
Soft mute is controlled by external pins, for each channel
one, in the static-pin mode and by the channel
manipulation modes of left or right in the microcontroller
mode.
1996 Jul 17
12
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
GM0D19
a n d b o o k , f u l l p a g e w
1996 Jul 17
13
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
L3MODE
t
t
s;MA
h;MA
h;MA
t
LC
t
t
t
HC
s;MA
L3CLK
T
cy
t
t
h;DAT
s;DAT
BIT 0
BIT 7
L3DATA
MGD016
Fig.4 Timing address mode.
t
t
halt
halt
L3MODE
t
LC
t
t
T
t
h;MT
s;MT
cy
HC
L3CLK
t
t
t
t
t
3;DAT
EN;DAT
h;DAT
h;DAT
s;DAT
L3DATA
write
BIT 0
BIT 7
MGD017
Fig.5 Timing for data transfer mode.
14
1996 Jul 17
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
t
halt
L3MODE
L3CLK
L3DATA
MGD018
address
data byte #1
data byte #2
address
Fig.6 Multibyte transfer.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134). All voltages referenced to ground,
VDDD = VDDA = VDDO = 5 V; Tamb = 25 °C, unless otherwise specified.
SYMBOL
VDD
Txtal(max)
Tstg
PARAMETER
CONDITIONS
note 1
MIN.
MAX.
7.0
UNIT
supply voltage
−
−
V
maximum crystal temperature
storage temperature
150
°C
°C
°C
V
−65
+125
+70
Tamb
Ves
operating ambient temperature
electrostatic handling
−20
note 2
note 3
−3000
−300
+3000
+300
V
Notes
1. All VDD and VSS connections must be made to the same power supply.
2. Equivalent to discharging a 100 pF capacitor via a 1.5 kΩ series resistor.
3. Equivalent to discharging a 200 pF capacitor via a 2.5 µH series inductor.
1996 Jul 17
15
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
PARAMETER
VALUE
UNIT
thermal resistance from junction to ambient in free air
SOP28
60
80
K/W
K/W
SSOP28
DC CHARACTERISTICS
VDDD = VDDA = VDDO = 5 V; Tamb = 25 °C; RL = 5 kΩ; all voltages referenced to ground (pins 1, 13, 21 and 23);
unless otherwise specified.
SYMBOL
VDDD
PARAMETER
digital supply voltage
analog supply voltage
CONDITIONS
note 1
MIN.
TYP.
MAX.
5.5
UNIT
4.5
4.5
4.5
5.0
5.0
5.0
V
V
V
VDDA
VDDO
note 1
note 1
5.5
5.5
operational amplifier supply
voltage
IDDD
IDDA
IDDO
digital supply current
analog supply current
at digital silence
at digital silence
at digital silence
−
−
−
7.0
5.0
10
−
−
−
mA
mA
mA
operational amplifier supply
current
Ptot
total power dissipation
note 2
−
110
−
mW
Digital input pins
VIH
VIL
|ILI|
Cin
HIGH level input voltage
0.7VDDD
−
−
−
−
VDDD + 0.5 V
LOW level input voltage
input leakage current
input capacitance
−
−
−
0.3VDDD
10
V
µA
pF
10
Analog audio pins
Vref
reference voltage
with respect to VSSA 0.45VDDA 0.5VDDA
0.55VDDA
V
Rout(ref)
RCONV
output reference resistance
−
−
3
−
−
kΩ
kΩ
current-to-voltage
conversion resistor
2.7
Io(max)
maximum output current
(THD+N)/S < 0.1%
RL = 32 Ω
−
−
−
88
44
−
−
mA
mA
pF
(THD+N)/S < 0.1%
RL = 16 Ω
−
CL
output load capacitance
note 3
50
Notes
1. All power supply pins (VDD and VSS) must be connected to the same external power supply unit.
2. No operational amplifier load resistor.
3. Load capacitance larger than 50 pF, a 22 µH inductor in parallel with a 270 Ω resistor must be inserted between the
load and the operational amplifier output (line output only).
1996 Jul 17
16
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
AC CHARACTERISTICS (ANALOG)
VDDD = VDDA = VDDO = 5 V; fi = 1 kHz; Tamb = 25 °C; RL = 5 kΩ all voltages referenced to ground
(pins 1, 13, 21 and 23); unless otherwise specified.
SYMBOL PARAMETER
RES resolution
VFS(rms)
CONDITIONS
MIN.
TYP.
MAX.
18
UNIT
bits
−
−
output voltage swing
(RMS value)
note 1
0.9
1.0
1.1
V
VDC(os)
output voltage DC offset with
respect to reference voltage
level Vref
−
20
−
mV
SVRR
supply voltage ripple rejection
fripple = 1 kHz;
−
40
−
dB
VDDA and VDDO
Vripple(p-p) = 100 mV;
Cpin = 10 µF
∆Vo
unbalance between the 2 DAC maximum volume
voltage outputs
−
−
0.1
90
−
−
dB
dB
αct
crosstalk between the 2 DAC
voltage outputs for line outputs
RL = 5 kΩ, note 2
crosstalk between the 2 DAC
voltage outputs for headphone
outputs
RL = 16 Ω, note 2
RL = 32 Ω, note 2
−
−
60
65
−
−
dB
dB
(THD+N)/S
total harmonic distortion plus
noise as a function of signal for RL = 5 kΩ
the line output
0 dB signal;
−
−
−
−
−
−
−
−
−
−
90
−85
0.006
−35
1.8
−80
0.013
−30
3.2
−
dB
%
−60 dB signal;
RL = 5 kΩ
dBA
%
total harmonic distortion plus
noise as a function of signal for RL = 16 Ω
the headphone output
0 dB signal;
−65
0.056
−70
0.032
−35
1.8
dB
%
−
0 dB signal;
RL = 32 Ω
−
dB
%
−
−60 dB signal;
−30
3.2
−
dBA
%
RL = 16 Ω or RL = 32 Ω
A weighting;
at code 00000H
S/N
signal-to-noise ratio at bipolar
zero
95
dBA
Notes
1. Proportional to VDDA
.
2. One output digital silence, the other maximum volume.
1996 Jul 17
17
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
AC CHARACTERISTICS (DIGITAL)
VDDD = VDDA = VDDO = 4.5 to 5.5 V; Tamb = −20 to +70 °C; RL = 5 kΩ; all voltages referenced to ground
(pins 1, 13, 21 and 23); unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
fsys = 256fs
fsys = 384fs
MIN.
81.3
TYP.
88.6
MAX
122
UNIT
ns
Tcy
clock cycle
54.2
22
59.1
−
81.3
−
ns
ns
ns
tCWL
tCWH
fsys LOW level pulse width
fsys HIGH level pulse width
22
−
−
Serial input data timing (see Fig.7)
BR
clock input = data input rate
f
sys = 256fs
−
64fs
48fs
−
−
−
fsys = 384fs
−
fsys
system clock frequency
word selection input frequency
rise time
8.192
−
18.432 MHz
fWS
44.1
−
48
20
20
−
kHz
ns
ns
ns
ns
ns
ns
ns
ns
tr
−
tf
fall time
−
−
tBCK(H)
tBCK(L)
ts;DAT
th;DAT
ts;WS
th;WS
bit clock HIGH time
bit clock LOW time
data set-up time
55
55
10
20
20
10
−
−
−
−
−
data hold time
−
−
word selection set-up time
word selection hold time
−
−
−
−
LEFT
WS
RIGHT
t
t
BCK(H)
s;WS
t
t
t
r
r
h;WS
BCK
t
t
s;DAT
BCK(L)
t
T
h;DAT
cy
LSB
MSB
DATA
MGD567
Fig.7 Timing and input signals.
18
1996 Jul 17
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
TEST AND APPLICATION INFORMATION
+5 V
100 µF
4.7 Ω
4.7 Ω
100 µF
100 nF
100 nF
100 nF
(1)
(2)
L3
(1)
330 µF
100 nF
V
V
V
V
V
V
SSD DDD SSA
DDA SSO1 DDO
SYSTEM
CLOCK
INPUT
V
ref
13
12
23
22
1
28
SYSCLK
14
6
10 µF
100 nF
BCK
WS
9
2
I S-BUS OR
LSB-JUSTIFIED
SERIAL INPUT DATA
10
11
FILTCL
DATA
5
4
1
nF
47 µF
100 Ω
V
OL
L
IF1
IF2
7
4.7 µF
R1
10 kΩ
HPINL
8
3
2
TDA1388
ACP
19
18
17
16
15
HPOUTL
APPL2/CL
APPL1/MO
APPL0/DA
SYSSEL
from
MICROCONTROLLER
330 µF
HPOUTR
FILTCR
27
24
330 µF
1
nF
47 µF
100 Ω
V
OR
25
26
R
V
SSO2
21
20
4.7 µF
R1
10 kΩ
HPINR
TC
MGD152
(1) Optional.
(2) Chip inductor BLM32A07.
Fig.8 Application diagram.
19
1996 Jul 17
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
PACKAGE OUTLINES
SO28: plastic small outline package; 28 leads; body width 7.5 mm
SOT136-1
D
E
A
X
c
y
H
v
M
A
E
Z
28
15
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
14
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.30
0.10
2.45
2.25
0.49
0.36
0.32
0.23
18.1
17.7
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
mm
2.65
1.27
0.050
1.4
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.71
0.014 0.009 0.69
0.30
0.29
0.42
0.39
0.043 0.043
0.016 0.039
0.035
0.016
inches 0.10
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
91-08-13
95-01-24
SOT136-1
075E06
MS-013AE
1996 Jul 17
20
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm
SOT341-1
D
E
A
X
c
H
v
M
A
y
E
Z
28
15
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
14
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
10.4
10.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
1.1
0.7
mm
2.0
0.65
1.25
0.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
93-09-08
95-02-04
SOT341-1
MO-150AH
1996 Jul 17
21
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
SOLDERING
Introduction
SSOP
Wave soldering is not recommended for SSOP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
If wave soldering cannot be avoided, the following
conditions must be observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
• The longitudinal axis of the package footprint must
be parallel to the solder flow and must incorporate
solder thieves at the downstream end.
Reflow soldering
Even with these conditions, only consider wave
soldering SSOP packages that have a body width of
4.4 mm, that is SSOP16 (SOT369-1) or
SSOP20 (SOT266-1).
Reflow soldering techniques are suitable for all SO and
SSOP packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
METHOD (SO AND SSOP)
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Wave soldering
SO
Repairing soldered joints
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
• The package footprint must incorporate solder thieves at
the downstream end.
1996 Jul 17
22
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1996 Jul 17
23
Philips Semiconductors – a worldwide company
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Tel. +31 40 27 83749, Fax. +31 40 27 88399
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Brazil: see South America
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04552-903 São Paulo, SÃO PAULO - SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 829 1849
France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex,
Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 3 301 6312, Fax. +34 3 301 4107
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,
Tel. +49 40 23 52 60, Fax. +49 40 23 536 300
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 632 2000, Fax. +46 8 632 2745
Greece: No. 15, 25th March Street, GR 17778 TAVROS,
Tel. +30 1 4894 339/911, Fax. +30 1 4814 240
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2686, Fax. +41 1 481 7730
Hungary: see Austria
India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd.
Worli, MUMBAI 400 018, Tel. +91 22 4938 541, Fax. +91 22 4938 722
Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66,
Chung Hsiao West Road, Sec. 1, P.O. Box 22978,
TAIPEI 100, Tel. +886 2 382 4443, Fax. +886 2 382 4444
Indonesia: see Singapore
Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180,
Tel. +972 3 645 0444, Fax. +972 3 648 1007
Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. +90 212 279 2770, Fax. +90 212 282 6707
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,
20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557
Ukraine: PHILIPS UKRAINE, 2A Akademika Koroleva str., Office 165,
252148 KIEV, Tel. +380 44 476 0297/1642, Fax. +380 44 476 6991
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,
Tel. +81 3 3740 5130, Fax. +81 3 3740 5077
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 708 296 8556
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880
Uruguay: see South America
Vietnam: see Singapore
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +1 800 234 7381, Fax. +1 708 296 8556
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 825 344, Fax.+381 11 635 777
Middle East: see Italy
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Internet: http://www.semiconductors.philips.com/ps/
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
© Philips Electronics N.V. 1996
SCA50
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
517021/50/02/pp24
Date of release: 1996 Jul 17
Document order number: 9397 750 00965
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