TDA3602/N3 [NXP]
IC SPECIALTY ANALOG CIRCUIT, PSFM9, PLASTIC, SIP-9, Analog IC:Other;
| 型号： | TDA3602/N3 |
| 厂家： | 
NXP |
| 描述： | IC SPECIALTY ANALOG CIRCUIT, PSFM9, PLASTIC, SIP-9, Analog IC:Other 局域网 |
| 文件： | 总28页 (文件大小：240K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA3602
Multiple output voltage regulator
July 1994
Product specification
File under Integrated Circuits, IC01
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
FEATURES
GENERAL DESCRIPTION
• Two VP state controlled regulators (REG1 and REG2)
The TDA3602 is a multiple output voltage regulator,
intended for use in car radios with or without a
microprocessor. It contains two fixed voltage regulators
with foldback current protection (Regulators 1 and 2), and
one fixed voltage regulator that also operates during load
dump and thermal shutdown. This regulator can be used
to supply a microprocessor.
• Regulator 3 operates during load dump or thermal
shutdown
• Multi-function control pin
• A back-up circuit for Regulator 3 via a single capacitor
• Supply voltage of −6 V to 50 V (a voltage of −3 V on VP
does not discharge capacitor Cbu)
A back-up circuit supplies Regulator 3 during a short
period after the power is cut off (negative field decay or
engine start procedure). A state control pin (pin 4) controls
the device, which can be switched through four stages
using the information at this pin. The switching levels at
this pin contain hysteresis.
• Low reverse current Regulator 3
• Low quiescent current in coma mode
• HOLD output
• RESET output (LOW at load dump)
• High ripple rejection.
RESET and HOLD outputs can be used to interface with a
microprocessor. The RESET signal can be used to call up
or initialize a microprocessor (power-on reset). The HOLD
signal can be used to control the power stages (mute
signal in a low end application), or to generate a HOLD
interrupt (microprocessor application).
PROTECTIONS
• Foldback current limit protection (Regulators 1 and 2)
• Load dump protection
• Thermal protection
An internal Zener diode on the back-up pin allows this pin
to withstand a load dump when supplied by the pin using a
100 Ω series resistor.
• DC short-circuit safe to ground and VP of all regulator
outputs
• Reverse polarity safe of pin 1 (VP). No high currents are
flowing which can damage the IC
The supply pin can withstand load dump pulses and
negative supply voltages.
• Capable of handling high energy on the regulator
outputs.
July 1994
2
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
Supply
VP
positive supply voltage
operating
9.2
14.4
14.4
−
18
18
30
50
30
50
−
V
Regulator 3 on
6.0
−
V
jump start
V
load dump; Regulator 3 on
operating
−
−
V
note 1
6.5
−
−
V
load dump; Regulator 3 on
total quiescent current
virtual junction temperature
note 1
−
V
IP
coma mode
−
290
−
µA
°C
Tvj
−
150
Voltage regulators
VR1
VR2
VR3
output voltage Regulator 1
0.5 mA ≤ IR1 ≤ 250 mA
0.5 mA ≤ IR2 ≤ 140 mA
0.5 mA ≤ IR3 ≤ 50 mA
8.2
4.8
4.8
8.5
5.0
5
8.8
5.2
5.2
V
V
V
output voltage Regulator 2
output voltage Regulator 3
Note
1. Vbu (pin 8) supplied by VP2 with a 100 Ω series resistor and IREG3 < 10 mA.
ORDERING INFORMATION
PACKAGE
EXTENDED TYPE
NUMBER
PINS
PIN POSITION
MATERIAL
CODE
SOT110
TDA3602(1)
9
SIL
plastic
Note
1. SOT110-1; 1996 August 21.
July 1994
3
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
CMD34-61
July 1994
4
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
PINNING
handbook, halfpage
V
1
2
3
4
5
6
7
8
9
P
SYMBOL
PIN
DESCRIPTION
REG1
VP
1
2
3
4
5
6
7
8
9
positive supply voltage
Regulator 1 output
reset output
REG1
RESET
Vsc
RESET
V
sc
state control input
hold output
HOLD
GND
TDA3602
HOLD
GND
REG3
Vbu
ground
REG3
Regulator 3 output
back-up
V
bu
REG2
Regulator 2 output
REG2
MCD345
Fig.2 Pin configuration.
What follows depends on the voltage at the state control
pin (Vsc). In most applications, when the supply voltage is
connected, Vsc will rise slowly (e.g. by charging a
capacitor).The device will leave the power-on mode and
enter the reset mode when Vsc rises above 2.2 V. In both
the power-on and reset modes, Regulator 3 will be in the
high current mode, Regulators 1 and 2 will be switched off
and the RESET output will be HIGH.
FUNCTIONAL DESCRIPTION
This multiple output voltage regulator contains three fixed
voltage regulators, numbered 1, 2 and 3. Two of these can
be switched between the on and off states using the state
control pin (pin 4). The third (Regulator 3), which is
continuously in, can be switched by the state control pin
between a low and a high current mode.
In addition to Regulators 1 and 2, the device is supplied by
an internal switch that is open when the supply voltage
falls below the back-up voltage (negative field decay or
engine start procedure), or during a load dump. (During
this load dump, Regulators 1 and 2 are switched off and
RESET is switched LOW). This switched supply voltage
(the so-called back-up voltage (Vbu), is available at pin 8.
An electrolytic capacitor can be connected to this pin, and
the charge on this capacitor can be used to supply the
device for a short period after the supply voltage is
removed.
The device will enter the wake mode when Vsc reaches 2.8
V. The RESET pin will go LOW and the CPU must be
switched to the sleep mode. Regulator 3 is still in the high
current mode.
As Vsc continues rising and the voltage reaches 3.6 V, the
stabilizer will be switched into the sleep mode. It will be in
a coma mode when Vsc is greater than 3.8 V. In this mode,
only the relevant circuits remain operating; this is to keep
the power consumption as low as possible i.e. typically 290
µA.
If the device is switched on with Vsc already higher than 3.8
V, the device will be switched directly from the power-on
mode into the coma mode.
Three pins are provided for interfacing with a
microprocessor:
• state control pin
• hold output pin
• reset output pin.
When Vsc is lowered gradually from 3.6 V (or higher) to 2
V, the device will go from sleep to reset again.
Vsc must be lower than 1.1 V to bring the device into the on
mode; note that this is not the same as the power-on
mode. In this condition, Regulator 3 is in the high current
mode, both Regulators 1 and 2 are switched on and the
HOLD output will be HIGH (depending on the state of VP
and the in-regulation condition of Regulators 1 and 2).
When the supply voltage (VP) is connected to the device,
Vbu will rise. When Vbu reaches 7.9 V, the device is in the
power-on mode. The RESET output goes HIGH and
Regulator 3 is switched on. In a microprocessor
application, the RESET output can be used to call up the
CPU and to initialize the program.
July 1994
5
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
When the device is in the on mode, it will switch back to the reset mode when Vsc rises to 2 V, or when the supply voltage
drops below 7.3 V.
When VREG3 drops below 3 V, the device will return to the power off mode, regardless of the condition the device was in.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VP
PARAMETER
supply voltage
CONDITIONS
MIN.
MAX.
UNIT
operating
−
−
−
−
−
18
V
jump start
t ≤ 10 min
30
V
load dump
t ≤ 50 ms; tr ≥ 2.5 ms
VP > −3 V; note 1
50
V
Regulator 3 on
30
V
load dump
t ≤50 ms; tr ≥ 2.5 ms; note 1
50
V
reverse battery voltage
storage temperature
virtual junction temperature
reverse polarity
total power dissipation
−6
−55
−40
−
−
V
Tstg
Tvj
non-operating
operating
+150
+150
6
°C
°C
V
Vpr
Ptot
non-operating
−
15
W
Note
1. Vbu (pin 8) supplied by VP2 with a 100 Ω series resistor and IREG3 < 10 mA.
THERMAL RESISTANCE
SYMBOL
PARAMETER
from junction to ambient in free air
from junction to case (see Fig.6)
THERMAL RESISTANCE
50 K/W
Rth j-a
Rth j-c
12 K/W
CHARACTERISTICS
VP = 14.4 V; Tamb = 25 °C; measured in Fig.6; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
Supply
VP
supply voltage
operating
9.2
6.0
−
14.4
18
18
30
50
V
V
V
V
Regulator 3 on
jump start
note 1
14.4
−
t ≤ 10 min
load dump
t ≤ 50 ms; tr ≥ 2.5 ms
−
−
IP
quiescent current
VP = 12.4 V
VP = 14.4 V
Vsc > 4V; note 2
−
−
280
290
360
µA
µA
−
July 1994
6
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
Schmitt triggers
VP2 SCHMITT TRIGGER (FOR HOLD AND REGULATORS 1 AND 2)
Vthr
Vthf
Vhy
rising voltage threshold
falling voltage threshold
hysteresis
7.3
7.6
7.1
0.5
8.0
7.5
−
V
V
V
6.8
−
REGULATOR 1 SCHMITT TRIGGER (FOR HOLD)
Vthr
Vthf
Vhy
rising voltage threshold
falling voltage threshold
hysteresis
−
−
−
V
V
R1 − 0.2
R1 − 0.3
−
−
−
V
V
V
0.1
REGULATOR 2 SCHMITT TRIGGER (FOR HOLD)
Vthr
Vthf
Vhy
rising voltage threshold
falling voltage threshold
hysteresis
−
−
−
V
V
R2 − 0.2
R2 − 0.3
−
−
−
V
V
V
0.1
VBU SCHMITT TRIGGER (REGULATOR 3)
Vthr
Vthf
Vhy
rising voltage threshold Vbu
falling voltage threshold VREG3
hysteresis
7.3
2.5
−
7.9
3
8.4
3.5
−
V
V
V
4.9
State control pin
Vth
voltage threshold between
note 2
−
V
thr1 + 0.2
−
V
V
V
sleep and coma
Vthr1
voltage threshold wake to
sleep
3.35
2.5
3.6
2.7
3.85
2.9
Vthf1
voltage threshold sleep to
wake
Vhy1
Vthr2
hysteresis wake/sleep
voltage threshold reset to
wake
0.85
2.6
0.92
2.8
1.0
3.0
V
V
Vthf2
]
voltage threshold wake to
reset
1.75
1.9
2.05
V
Vhy2
Vthr3
Vthf3
Vhy3
Iscl
hysteresis reset/wake
voltage threshold on to reset
voltage threshold reset to on
hysteresis on/reset
input current
0.85
1.85
1.0
0.92
2.0
1.0
2.15
1.2
1.0
V
V
V
V
1.1
0.85
0.92
V
sc ≤ 0.8 V
sc ≥ 4 V
−
−
−
−
−1
µA
µA
V
1
July 1994
7
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
Reset output
VOL
VOH
IOL
LOW level output voltage
HIGH level output voltage
LOW level output current
HIGH level output current
IOL = 0
0
0.2
5.0
0.8
−2.0
0.8
5.25
−
V
2.0
V
VOL ≤ 0.8 V
0.3
mA
mA
IOH
VOH > 3 V
−0.3
−
Hold output
VOL
VOH
IOL
LOW level output voltage
IOL = 0
0
0.2
5.0
1.0
−9.0
0.8
5.25
−
V
HIGH level output voltage
LOW level output current
HIGH level output current
2.0
0.3
−1.5
V
VOL ≤ 0.8 V; note 3
mA
mA
IOH
VOH > 3 V
−
Regulator 1 (IREG1 = 5 mA unless otherwise specified)
VREG1
VREG1
output voltage off
output voltage
Vsc > 2.1 V
−
1
400
mV
0.5 V ≤ IREG1 ≤ 250 mA
10 V ≤ VP ≤ 18 V
8.2
8.2
−
8.5
8.5
−
8.8
8.8
50
50
−
V
V
∆VREG1
line regulation
10 V ≤ VP ≤ 18 V
mV
mV
dB
V
∆VREGL1 load regulation
0.5 mA ≤ IREG1 ≤ 250 mA
−
−
SVRR1
VREGd1
IREGm1
IREGsc1
supply voltage ripple rejection f = 200 Hz; 2 V (p-p)
60
−
−
drop-out voltage
current limit
IREG1 = 250 mA
−
0.4
1.2
−
VREG1 > 7 V; note 4
RL ≤ 0.5 Ω; note 4
0.4
−
−
A
short-circuit current
250
mA
Regulator 2 (IREG2 = 10 mA unless otherwise specified)
VREG2
VREG2
output voltage off
output voltage
Vsc >2.1 V
−
1
400
mV
0.5 V ≤ IREG2 ≤ 140 mA
8 V ≤ VP ≤ 18 V
4.8
4.8
−
5.0
5.0
−
5.2
5.2
50
50
−
V
V
∆VREG2
line regulation
8 V ≤ VP ≤ 18 V
mV
mV
dB
V
∆VREGL2 load regulation
0.5 mA ≤ IREG2 ≤ 140 mA
−
−
SVRR2
VREGd2
IREGm2
IREGsc2
supply voltage ripple rejection f = 200 Hz; 2 V (p-p)
60
−
−
drop-out voltage
current limit
IREG2 = 140 mA
1.2
−
−
VREG2 > 4.5 V; note 4
RL ≤ 0.5 Ω; note 4
200
−
600
−
mA
mA
short-circuit current
130
July 1994
8
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
SYMBOL
Regulator 3 (IREG3 = 5 mA unless otherwise specified)
VREG3 output voltage
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
0.5 mA ≤ IREG3 ≤ 50 mA
7 V ≤ VP ≤ 18 V
4.8
5.0
5.0
5.0
5.0
5.2
5.2
5.2
5.5
V
V
V
V
4.8
4.8
4.5
18 ≤ VP ≤ 50 V
∆VREGL3 output voltage
sleep mode; IREG3 ≤ 10 mA;
note 2
ILO1
leakage output current
line regulation
VP = 0; Vbu = 6 V; VREG3 = 6 V
7 V ≤ VP ≤ 18 V
−
−
−
−
−
−
−
−1
50
50
−
µA
mV
mV
dB
V
∆VREG3
−
∆VREGL3 load regulation
0.5 mA ≤ IREG3 ≤ 50 mA
−
SVRR3
VREGd3
IREGm3
supply voltage ripple rejection f = 200 Hz; 2 V (p-p)
60
−
drop-out voltage
current limit
IREG3 = 50 mA; note 5
VREG3 > 4.5 V; note 6
0.4
500
140
mA
Switch
Vswd
drop-out voltage
maximum current
Isw = 50 mA
−
−
−
0.45
V
Iswm
140
−
mA
Notes
1. Minimum operating voltage only if VP has exceeded 8 V.
2. In the sleep mode, Regulators 1 and 2 are off. In the coma mode, the state control circuit is also switched off, to make
the quiescent current as low as possible.
3. Hold circuit can sink this current in the RESET state and the ON state.
4. The foldback current protection limits the dissipated power at short-circuit (see Fig.5).
5. The drop-out voltage of Regulator 3 is measured between Vbu and VREG3 (pins 8 and 7).
6. At current limit, IREGm is held constant (behaviour in accordance with the broken line in Fig.5).
July 1994
9
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
Table 1 State control pin.
VP1 SCHMITT TRIGGER IS TRUE
STATE
Coma
REG3 (5 V)
REG1 + REG2
RESET
REMARKS
LOW current
off
0
stabilizer consumes low quiescent current;
state control circuit is switched off to lower the
quiescent current
Sleep
Wake
Reset
On
LOW current
HIGH current
HIGH current
HIGH current
HIGH current
off
off
off
on
off
0
0
1
1
1
state control circuit on
CPU in sleep mode
CPU called up
normal operation
Power on
VP1 rises from 0 to 8.5 V or higher
(first start-up)
Power off
off
off
0
VP2 falls from VP to less than 3 V
(VREG3 = 2.5 V)
COMA
V
V
< 3 V
REG3
REG3
V
< 3.8 V
V
> 3.8 V
sc
sc
SLEEP
WAKE
RESET
ON
< 3 V
V
< 2.7 V
V
> 3.6 V
sc
sc
V
> 3.8 V
sc
V
< 3 V
bu
V
> 2.8 V
sc
V
< 1.9 V
< 1.1 V
sc
V
> 7.9 V
V
> 2.2 V
bu
sc
POWER OFF
POWER ON
< 3 V
V
sc
V
> 2.0 V
or
< 7.1 V
sc
V
and
> 7.6 V
REG3
V
P
V
P
V
< 3 V
REG3
MCD347 - 1
Vbu = back-up voltage.
Vsc = state control voltage.
VREG3 = Regulator 3 output voltage.
Fig.3 State diagram.
10
July 1994
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
V
P
V
bu
REGULATOR 3
state control
reset
REGULATORS
1 and 2
hold
MCD348
Fig.4 Timing diagram.
Table 2 Logic table HOLD function.
INPUTS FOR HOLD (note 1)
OUTPUT
HOLD
VP SCHMITT
TRIGGER
VBU
ON STATE
REG1
REG2
1
0
1
1
1
1
0
1
1
1
1
1
X
X
0
1
1
1
0
0
0
0
X
1
0
0
0
X
0
1
0
0
0
0
0
1
Note
1. 0 = off; 1 = on; X = don't care.
July 1994
11
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
QUALITY SPECIFICATION
Quality in accordance with UZW-BO/FQ-0601.
TEST INFORMATION
The outputs of the regulators are measured by means of a
selector switch (one by one). In addition, switch SW2 is
only closed when Vbu is greater than VP; then the internal
switch of the TDA3602 is opened. Vbu (pin 8) can only
withstand a 50 V load dump pulse when switch SW2 is
kept open or when switch SW2 is replaced by a 100 Ω
resistor.
handbook, halfpage
V
Rx
V
0
(Regulators
1 and 2)
MCD354 - 1
I
I
REGm
sc
Fig.5 Foldback current protection.
on / off
V
Regulator 1
Regulator 2
Regulator 3
P
8.5 V
5 V
2
9
7
1
8
4
C3
10 µF
SW1
C1
220 nF
V
P
V
bu
C4
10 µF
R
L
V
SW2
V
C2
220 nF
2 W
bu
TDA3602
5 V continuous
C5
10µF
state control
hold
5
3
V
sc
reset
6
MCD351 - 1
ground
Fig.6 Test circuit.
12
July 1994
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
APPLICATION INFORMATION
Noise
STABILIZER WITHOUT MICROPROCESSOR 2
Fig.8 illustrates the application circuit for a low end radio
set with push switches when no microprocessor is used.
The stabilizer can be switched to the on mode by pressing
switch SW1. In this mode, Regulators 1 and 2 are switched
on, so transistor T1 takes over from switch SW1. The
stabilizer can only be switched off by connecting the base
of T1 to ground (SW1 not pressed). This can be achieved
by pressing switch SW2.
Table 3 Noise at regulator outputs dependent on
capacitive load (CL).
REGULATOR
CL
(NOTE 1)
REG
IL
10 µF
47 µF
220 µF
160 µV
1
2
3
150 mA
100 mA
50 mA
800 µV
500 µV
350 µV
220 µV
115 µV
190 µV
The hold signal is only HIGH when the device is in the on
mode and both VP and the regulators are available, so that
this signal can be used to control the power stages (mute).
During a fault condition, this signal turns LOW
immediately.
Note
1. Regulators loaded with 100mA; noise in µV RMS
When the stabilizer is connected to the supply for the first
time, the initial state will be the power-on stage, so
Regulators 1 and 2 are not switched on.
(B = 10 Hz to 1 MHz).
The available noise at the output of the regulators depends
on the bandwidth of the regulators, which can be adjusted
by means of the load capacitors. The noise figures are
given in Table 3.
STABILIZER USED WITH MICROPROCESSOR
For a good understanding of the high end application,
shown in Fig.10, consult the flow chart of Fig.9.
Although stability is guarenteed when CL is higher than
10 µF (over temperature range) with tan (φ) = 1 in the
frequency range 1 kHz to 20 kHz, it is recommended to
use a 47 µF load capacitor for Regulators 1 and 2. When
a microprocessor is supplied by Regulator 3 much noise
can be produced by this microprocessor. This noise is not
influenced by increasing the load capacitor of Regulator 3.
When the set is off, a reset can be generated by
connecting the set to the supply for the first time (stabilizer
in power-on), or by pressing any key on the key matrix
(stabilizer in reset mode). When the reset is generated, the
stabilizer is held in the reset mode for a short period by T1.
The microprocessor has to take over control by making
reset mode equal to 0. The microprocessor can then
proceed with the initializing process. After this action, the
microprocessor has to check if the correct key has been
pressed. If so, the radio can be switched on by making on
equal to 0; if not, the microprocessor must switch the
device to the coma mode again, by making reset mode
and on both equal to 1; (wake mode is entered after a short
time constant, determined by R1 × C7 × constant), and
switch itself to sleep mode.
The noise on the supply line depends on the supply
capacitor. When a high frequency capacitor of 220 nF with
an electrolytic capacitor of 100 µF in parallel is placed
directly over pin 1 (VP) and pin 6 (ground) the noise is
minimized.
The stabilizer is in 'power on' after the supply is
reconnected (Vbu> 7.9 V) and 0.1 < Vsc < 2.2 V.
When the reset is generated for the first time (power-on
mode), the mode of the device can be detected by the hold
signal. If on = 0 and hold remains LOW, then the
microprocessor is in the power-on mode. In this event, the
microprocessor must go to the switch-off routine (making
on and reset mode both equal to 1).
Application circuits
STABILIZER WITHOUT MICROPROCESSOR 1
The low end application is illustrated in Fig.7. When switch
SW1 is closed, a pulse is generated at the state control
input by C5 and R1, and the regulator is switched from
power off to the on mode (all three regulators are on). The
HOLD signal can be used to control the mute signal for the
power amplifiers. This signal is HIGH when all the
regulators are in regulation and VP1 Schmitt trigger is true.
July 1994
13
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
retro - rack
on / off
V
Regulator 1
Regulator 2
Regulator 3
hold
P
1
8
2
9
7
5
8.5 V
C8
220 nF
C2
C1
> 220 µF
SW1
10 µF
V
bu
C8
220 nF
5 V
C3
10 µF
TDA3602
reset
3
4
C5
68 nF
5 V continuous
C4
state control
10 µF
R1
47 kΩ
mute
6
MCD349 - 1
ground
Fig.7 Low end application circuit.
retro - rack
h
V
P
Regulator 1
Regulator 2
Regulator 3
battery
1
8
2
9
7
8.5 V
C1
C2
10 µF
C8
220 nF
> 220 µF
V
bu
5 V
C3
10 µF
C5
3.3 µF
TDA3602
R1
100 kΩ
5 V continuous
mute
C4
10 µF
state control
hold
5
3
4
C6
100 nF
R2
2.2 kΩ
reset
6
ground
T1
R3
47 kΩ
on
SW1
MCD350 - 1
off
SW2
Fig.8 Application circuit 2.
14
July 1994
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
SET OFF
Reset - pulse
by pressing any key
RESET- MODE = 0
READ KEY
no
yes
KEY = SET ON
ON = 0
RESET- MODE = 1
SET ON
READ KEY
yes
no
KEY = SET OFF
MCD353 - 1
RESET
ON = 1
RESET- MODE = 1
SET OFF
Fig.9 Flow chart for high end application.
15
July 1994
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
CMD35-21
July 1994
16
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
1. When the set has been disconnected from the supply,
the microprocessor must be initialized at connection to
the supply for the first time. The output ports of the
microprocessor are in a random state. To ensure
correct initialization, a reset has to be generated. This
is accomplished by the power-on state of the
Example of a modern car radio design with the
TDA3602
DESIGN CONSIDERATIONS
A modern car radio set meets the following design
considerations:
TDA3602. In this state the reset output is HIGH and
Regulators 1 and 2 are disabled (despite the voltage
on the state control pin Vsc being below 1.1 V). Only
after the voltage on the state control pin has risen
above 2.2 V can Regulators 1 and 2 be switched on
again by pulling the state control pin below 1.1 V.
1. Semi on/off logic. The radio set has to switch on/off by
pressing the on/off key or by switching the ignition
2. Security code check
3. Low quiescent current in standby (this means that the
microprocessor is off when the set is off)
2. In the sleep mode the microprocessor should be called
up by pressing the on/off key (normal off condition).
Now the reset is also generated by the RESET output
of the TDA3602. This reset output will go HIGH when
4. The set must recover the state it had before an engine
start or load dump
5. Apart from HOLD, RESET and VP only two more I/O
lines are used for full on/off logic
Vsc decreases from the value VREG3 to below 1.9 V.
6. Supply by 1 or 2 supply lines
3. At fault conditions
7. Radio Data System (RDS) should be implemented in
the set, but this is not a regulator problem
(VP below 7.1 V, VREG1 < VREG1 nominal −0.3 V or
VP > 1 8 V), HOLD drops to logic 0 and the
microprocessor switches off the set. In accordance
with the design considerations is that the mode of
operation must switch to the state it was in before an
engine start or load dump occurred. To achieve this
the HOLD output of the TDA3602 can be used to
generate a reset pulse (only when Vsc remains below
1.1 V).
8. Lights must switch off during load dump
Although the TDA3602 is designed only to be supplied by
a continuous supply (battery), it is also possible to use both
a continuous and a switchable supply (ignition). The
ignition can be used to supply also the TDA3602, although
in this event additional circuitry is needed.
APPLICATION CIRCUIT WITH (SEMI-)FULL ON/OFF LOGIC
The RESET and HOLD outputs of the TDA3602 are
combined to generate the reset pulses. The pulses are
created by differentiating the outputs, using capacitors
C8 and C9. The reset pulses are added by means of the
diodes D2 and D3. The time constants are:
The application circuit of Fig.11 will meet all the above
mentioned design considerations. Three circuit parts can
be distinguished:
Reset circuitry
• tresres(rise) = 3 × R7 × C8 = 3 × 10 kΩ × 1uF = 30 ms
on/off button S1 should be pressed for at least 30ms,
before the microprocessor will see this
A reset is required to call-up the microprocessor when it is
switched to the sleep mode or the power-on reset (first
initialization of the microprocessor). To achieve this, three
different types of resets should be generated:
• treshold(rise) = 3 × R7 × C9 = 5.4 ms
• tres(dis) = 3 × R8 × C8 = 140 ms
• treshold(disl) = 3 × R9 × C9 = 25 ms
the microprocessor has to wait and check if HOLD
remains LOW for at least 25 ms before it switches off;
now it is certain that a correct reset will occur to wake up
the microprocessor again.
July 1994
17
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
SM7A23
July 1994
18
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
A reset by the hold function can only be created when the
state control pin remains LOW. This is accomplished by
means of transistor T1 when Port P0,0 is high ohmic.
Because of resistors R2, R3 and R5 the transistor will
switch off when Vignition falls below a level of 5.0 V. During
an engine start, when Vignition reaches voltages as low as
5 V, the transistor will switch off. Regulators 1 and 2 are
already switched of by means of the VP Schmitt-trigger,
causing the HOLD output to go LOW. When Vignition again
increases the transistor will be switched on again (Port
P0,0 has to be open = logic 1), thereby switching the state
control pin to 0 V. As Vignition continues to increase above
7.6 V (Vrise of the VP1 Schmitt-trigger) Regulators 1 and 2
will again switch on causing the HOLD output to go HIGH,
creating a new reset pulse.
Bulb circuitry
The lights are switched on provided the RESET output of
the TDA3602 is HIGH. This normally occurs when the set
is switched on. Only at first connection (power-off) will the
RESET output be HIGH when the set is off. In this event
the lights are also switched on. This is not a problem
because the required time for initializing the
microprocessor will be very short.
When a load dump occurs, the RESET output will go LOW,
disabling the lights. With the aid of this feature it is possible
to prevent the light bulbs being damaged at load dump.
Noise.
Regulators 1 and 2 are loaded with a 47 µF/16 V load
capacitor because of output noise. With this value the
output noise will be lower than 220 µV for Regulator 1 and
lower than 120 µV for Regulator 2 (see Table 3 and
associated text).
The set can also be switched off by opening the ignition
key, causing transistor T1 to switch off. When the ignition
key is closed again, the set will restart to the original
situation that existed before the ignition key was opened.
The charge time of C6 equals 3 × R4 × C6 = 14ms. This is
less than the reset time tresres(rise). To avoid the TDA3602
switching to coma mode before the microprocessor is
awakened, a double function has been given to T1. During
a reset pulse T1 is on (because of resistor R7), thus Vsc will
remain 0 V provided a reset occurs. After the reset pulse
has disappeared, the microprocessor is able to fully
control Vsc by mean of Port P0,0 or Port P1,1.
To minimize the noise on the supply line, capacitors C1
and C2 should be placed as close as possible across the
supply and ground pins of the TDA3602.
Timing diagram
In the timing diagram all of the situations which can occur
are shown (see Fig.12). A HIGH of switch S1 indicates that
S1 is pressed. A HIGH on Port P0,0 indicates that Port
P0,0 is high ohmic (Port P0 is an open-collector output). If
no open-collector output is available another port can be
used, but an extra diode has to be added in series with this
port to prevent T1 being switched on by this port. A HIGH
for the microprocessor indicates that the microprocessor is
operating, a LOW indicates that the microprocessor is in
standby mode.
Security code circuitry
When the set is off and it is pulled out of RETRACK, ×3 and
×4 are disconnected thereby switching the base of
transistor T1 to the output voltage of Regulator 3 (using
resistors R5 and R6). Transistor T1 is starting to conduct
and a RESET pulse is generated. The microprocessor is
activated and checks if Port P1,0 = logic 1. If this is so, the
microprocessor knows that the set is pulled out of
The following situations are covered in the timing diagram:
1. Initialization of the microprocessor (TDA3602 in
power-off mode)
RETRACK and that time is limited to finish the program
correctly (because the microprocessor is operating on the
charge of capacitor C3). The security flag has to be set in
an EEPROM and the microprocessor can switch to
power-down before Regulator 3 switches to power-off.
2. Switching the ignition with the set off (Port P0,0 =
logic 0)
3. Switching the set on/off/on by pressing S1 sequentially
(ignition available)
Another possibility is that the set was running and pulled
out of RETRACK. Now a hold is generated, and the hold
interrupt routine has to check the security in Port P1,0.
4. Switching behaviour at engine start and load dump
(set on)
R6 is an internal resistor in the microprocessor. An
external resistor limits however the spread.
5. Switching the set off and on again by switching the
ignition.
July 1994
19
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
The timing diagram can only be understood after a
thorough investigation of the flow charts (see section Flow
chart semi on/off logic with security code). Furthermore
short and long RESET pulses can be seen (see Fig.12).
Flowchart semi on/off logic with security code
This section describes the software for controlling the
TDA3602 (semi on/off logic). A “o” in the flowchart flow
diagram Fig.13, indicates that the port mentioned is
switched as an output. A “1” indicates that the port
mentioned is switched as an input (temporarily).
The flowchart of figure 13 can be used for semi on/off logic.
A4
V
battery
A7
ignition
V
REG3
reset
microprocessor
reset
V
SC
S1
microprocessor
REGULATORS
1 and 2
hold
P0. 0
initialization
on
off
on
engine start load dump off by ignition
switch 1
MSA724
Fig.12 Timing of the applications.
20
July 1994
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
START
= 1 set disconnected
= 1 first connection
P1, 0 ?
= 0
P1, 0 ?
Po, 2 = 0
WAIT 25 ms
SEC FLAG = 0
SET FLAG = 0
P0, 0 = 0 (o)
= 1
µP: POWER DOWN
HOLD ?
SET FLAG = 1
SET ON
= 0
STOP
= 0
= 0
SET
FLAG ?
= 1
S
P0, 0 (in)
INTERUPT
HOLD = 0
yes
no
PRESSED
?
= 1
SET FLAG = 1
= 1
P0, 0 = 0 (o)
HOLD ?
= 0
RTI
WAIT 10 ms
(1) set pulled out
of RETRACK
P0, 0 = 1 (o)
P0, 0 = 0 (o)
= 1
P1, 0 ?
= 0
SEC FLAG = 1
P0, 0 = 1 (o)
yes
no
TIME OUT
µ
P
= 25 ms ?
POWER DOWN
hold LOW because of:
regulator fault
ignition = 0
MSA728
STOP
Fig.13 Interfacing flow chart TDA3602.
21
July 1994
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
SM7A25
July 1994
22
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
FULL ON/OFF LOGIC
Using application circuit Fig.14, full on/off logic can be
achieved. Also extra software loops are required to enable
the set when ignition is off. The set can be controlled by
Port P1,1 if the ignition is off (thus no extra I/O ports of the
microprocessor are required for full on/off logic).
halfpage
START
Because Port P1,1 is a part of the key matrix the complete
key-scan loop must be finished within less than 0.5 × R4 ×
C6 = 2.4 ms, otherwise the TDA3602 will enter the reset
state and Regulators 1 and 2 are switched off during this
key-scan loop. When the time of the complete loop is
within 2.4 ms the Vsc will remain below 2 V (thus
Regulators 1 and 2 remain on).
P1, 1 = 1 (i)
X = Sx
no
X
Sx + 4 ?
yes
It is also possible to switch Port P1,1 during the key-scan
loop sequentially from output (logic 0) to input. If this is
achieved within a time period of 1 ms, Vsc cannot become
HIGH long enough to switch Regulators 1 and 2 off.
P0, X = 0
Y = Sy
When ignition is available, transistor T1 overrules Port
P1,1. In this event no variation on Vsc is seen during the
key-scan loop.
no
Y
Sy + 4 ?
yes
t
R4 x C6 x in (5/3)
2.4 ms
t
The flow chart presented in Fig.15 is only required for the
full on/off logic application of Fig.14.
input P1, Y
Y = Y + 1
The complete key-scan routine must be finished within 2.4
ms (when ignition is off) and that the key-scan routine has
to end with a statement P1,1 = logic 0. In the flow chart of
the key-scan routine, Sx is the start value of the rows and
Sy the start value of the columns. With Sx = 1 and
Sy = 1, one '0' is shifted on the output ports P0,1 to P0,5
and the input ports P1,1 to P1,5 are being read
sequentially per shift action.
P0, X = 1
X = X + 1
P1, 1 = 0 (o)
STOP
Connections between microprocessor and Regulator 2
supplied
When digital ICs, supplied by Regulator 2, are connected
to I/O ports (especially Ports 1 and 2), special attention in
the software has to be taken to avoid currents flowing from
Regulator 3 to Regulator 2. Because of ESD diodes in
digital ICs a current can flow from an output port (which is
in a high state) through the ESD diode into Regulator 2.
This will cause an increase in the quiescent current of the
set. The recommended action to avoid this problem is to
switch the specific I/O ports to logic 0.
MSA727
Fig.15 Software key matrix with loops.
July 1994
23
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
ignition switch = open (set was on with ignition off)
2 V
V
SC
t
2.4 V
S1
P1. 1
P0. 1
P0. 2
open
0
REGULATORS
1 and 2
key scan cycle
S1 pushed to switch-off
S1 pushed to switch-on
MSA726
Fig.16 Timing key matrix.
July 1994
24
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
PACKAGE OUTLINE
SIL9MPF: plastic single in-line medium power package with fin; 9 leads
SOT110-1
D
D
1
q
A
2
P
P
1
A
3
q
2
q
1
A
A
4
E
pin 1 index
c
L
1
9
b
Q
e
Z
b
w
M
2
b
1
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
Z
max.
A
max.
2
(1)
(1)
E
UNIT
A
A
b
b
b
c
D
D
e
L
P
P
Q
q
q
q
2
w
A
3
4
1
2
1
1
1
18.5
17.8
8.7 15.8 1.40 0.67 1.40 0.48 21.8 21.4 6.48
8.0 15.4 1.14 0.50 1.14 0.38 21.4 20.7 6.20
3.9 2.75 3.4 1.75 15.1
3.4 2.50 3.2 1.55 14.9
4.4
4.2
5.9
5.7
2.54
mm
3.7
0.25 1.0
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-11-17
95-02-25
SOT110-1
July 1994
25
Philips Semiconductors
Product specification
Multiple output voltage regulator
TDA3602
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
Repairing soldered joints
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
Soldering by dipping or by wave
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
July 1994
26
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Description
Catalog by System
Automotive
Consumer Multimedia
Systems
Communications
The TDA3602 is a multiple output voltage regulator, intended for use in car radios with or without a microprocessor. It contains two fixed
voltage regulators with foldback current protection (Regulators 1 and 2), and one fixed voltage regulator that also operates during load
dump and thermal shutdown. This regulator can be used to supply a microprocessor.
PC/PC-peripherals
Cross reference
A back-up circuit supplies Regulator 3 during a short period after the power is cut off (negative field decay or engine start procedure). A
state control pin (pin 4) controls the device, which can be switched through four stages using the information at this pin. The switching
levels at this pin contain hysteresis.
Models
Packages
Application notes
Selection guides
Other technical documentation
End of Life information
Datahandbook system
RESET and HOLD outputs can be used to interface with a microprocessor. The RESET signal can be used to call up or initialize a
microprocessor (power-on reset). The HOLD signal can be used to control the power stages (mute signal in a low end application), or to
generate a HOLD interrupt (microprocessor application).
An internal Zener diode on the back-up pin allows this pin to withstand a load dump when supplied by the pin using a 100 W series resistor.
The supply pin can withstand load dump pulses and negative supply voltages.
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Features
l Two VP state controlled regulators (REG1 and REG2)
TDA3602
l Regulator 3 operates during load dump or thermal shutdown
l Multi-function control pin
TDA3602
l A back-up circuit for Regulator 3 via a single capacitor
l Supply voltage of -6 V to 50 V (a voltage of -3 V on VP does not discharge capacitor Cbu
)
l Low reverse current Regulator 3
l Low quiescent current in coma mode
l HOLD output
l RESET output (LOW at load dump)
l High ripple rejection.
PROTECTIONS
l Foldback current limit protection (Regulators 1 and 2)
l Load dump protection
l Thermal protection
l DC short-circuit safe to ground and VP of all regulator outputs
l Reverse polarity safe of pin 1 (VP ). No high currents are flowing which can damage the IC
l Capable of handling high energy on the regulator outputs.
Datasheet
File
size
(kB)
Publication
release date Datasheet status
Page
count
Type nr. Title
Datasheet
Download
TDA3602 Multiple output voltage regulator
01-Jul-94
Product
26
205
Specification
Products, packages, availability and ordering
Partnumber North American Partnumber Order code (12nc) marking/packing
package device status
buy online
TDA3602/N3 TDA3602U
9350 837 50112 Standard Marking * Tube SOT110 Samples available
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