TDA6403AM [NXP]
IC 2-BAND, VIDEO TUNER, PDSO28, 5.30 MM, PLASTIC, SOT-341-1, SSOP-28, Tuner IC;
| 型号： | TDA6403AM |
| 厂家： | 
NXP |
| 描述： | IC 2-BAND, VIDEO TUNER, PDSO28, 5.30 MM, PLASTIC, SOT-341-1, SSOP-28, Tuner IC 光电二极管 |
| 文件： | 总40页 (文件大小：209K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA6402; TDA6402A; TDA6403;
TDA6403A
5 V mixers/oscillators and
synthesizers for cable TV and VCR
2-band tuners
Product specification
2000 Jan 24
Supersedes data of 1998 Jul 28
File under Integrated Circuits, IC02
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
FEATURES
• Single-chip 5 V mixer/oscillator and synthesizer for
cable TV and VCR tuners
• Synthesizer function compatible with existing TSA5526
• Universal bus protocol (I2C-bus or 3-wire bus)
– Bus protocol for 18 or 19-bit transmission (3-wire
bus)
APPLICATIONS
– Extra protocol for 27-bit transmission (test modes and
features for 3-wire bus)
• Cable tuners for TV and VCR (switched concept for
VHF)
– Address + 4 data bytes transmission (I2C-bus ‘write’
mode)
– Address + 1 status byte (I2C-bus ‘read’ mode)
– 4 independent I2C-bus addresses.
• Recommended RF bands for the USA:
55.25 to 133.25 MHz, 139.25 to 361.25 MHz and
367.25 to 801.25 MHz.
GENERAL DESCRIPTION
• 1 PNP buffer for UHF band selection (25 mA)
• 3 PNP buffers for general purpose, e.g. 2 VHF
sub-bands, FM sound trap (25 mA)
The TDA6402, TDA6402A, TDA6403 and TDA6403A are
programmable 2-band mixers/oscillators and synthesizers
intended for VHF/UHF cable tuners (see Fig.1).
• 33 V tuning voltage output
The devices include two double balanced mixers and two
oscillators for the VHF and UHF band respectively, an IF
amplifier and a PLL synthesizer. The VHF band can be
split-up into two sub-bands using a proper oscillator
application and a switchable inductor. Two pins are
available between the mixer output and the IF amplifier
input to enable IF filtering for improved signal handling.
Four PNP ports are provided. Band selection is provided
by using pin PUHF. When PUHF is ‘ON’, the UHF
mixer-oscillator is active and the VHF band is switched off.
When PUHF is ‘OFF’, the VHF mixer-oscillator is active
and the UHF band is ‘OFF’. PVHFL and PVHFH are used
to select the VHF sub-bands. FMST is a general purpose
port, that can be used to switch an FM sound trap. When
it is used, the sum of the collector currents has to be limited
to 30 mA.
• In-lock detector
• 5-step A/D converter (3 bits in I2C-bus mode)
• 15-bit programmable divider
• Programmable reference divider ratio (512, 640 or
1024)
• Programmable charge pump current (60 or 280 µA)
• Programmable automatic charge pump current switch
• Varicap drive disable
• Mixer/oscillator function compatible with existing
TDA5732
• Balanced mixer with a common emitter input for VHF
(single input)
• Balanced mixer with a common base input for UHF
(balanced input)
The synthesizer consists of a divide-by-eight prescaler, a
15-bit programmable divider, a crystal oscillator and its
programmable reference divider and a phase/frequency
detector combined with a charge pump which drives the
tuning amplifier, including 33 V output (V33) at pin VT.
• 2-pin common emitter oscillator for VHF
• 4-pin common emitter oscillator for UHF
• IF preamplifier with asymmetrical 75 Ω output
impedance to drive a low-ohmic impedance (75 Ω)
• Low power
• Low radiation
• Small size
Depending on the reference divider ratio (512, 640 or
1024), the phase comparator operates at 7.8125 kHz,
6.25 kHz or 3.90625 kHz with a 4 MHz crystal.
• The TDA6402A and TDA6403A differ from the TDA6402
and TDA6403 by the UHF port protocol in the I2C-bus
mode (see Tables 3 and 4).
2000 Jan 24
2
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
The device can be controlled according to the I2C-bus
format or 3-wire bus format depending on the voltage
applied to pin SW (see Table 2). In the 3-wire bus mode
(SW = HIGH), pin LOCK/ADC is the LOCK output.
The LOCK output is LOW when the PLL loop is locked.
In the I2C-bus mode (SW = LOW), the lock detector bit FL
is set to logic 1 when the loop is locked and is read on the
SDA line (Status Byte; SB) during a READ operation in
I2C-bus mode only. The Analog-to-Digital Converter
(ADC) input is available on pin LOCK/ADC for digital AFC
control in the I2C-bus mode only. The ADC code is read
during a READ operation on the I2C-bus (see Table 11).
In test mode, pin LOCK/ADC is used as a TEST output for
fREF and 1⁄2fDIV, in both I2C-bus mode and 3-wire bus mode
(see Table 7).
I2C-bus mode (SW = GND)
Five serial bytes (including address byte) are required to
address the device, select the VCO frequency, program
the four ports, set the charge pump current and set the
reference divider ratio. The device has four independent
I2C-bus addresses which can be selected by applying a
specific voltage on input CE (see Table 6).
3-wire bus mode (SW = OPEN or VCC)
Data is transmitted to the devices during a HIGH-level on
input CE (enable line). The device is compatible with 18-bit
and 19-bit data formats, as shown in Figs 4 and 5. The first
four bits are used to program the PNP ports and the
remaining bits control the programmable divider. A 27-bit
data format may also be used to set the charge pump
current, the reference divider ratio and for test purposes
(see Fig.6).
When the automatic charge pump current switch mode is
activated and when the loop is phase-locked, the charge
pump current value is automatically switched to LOW. This
action is taken to improve the carrier-to-noise ratio.
The status of this feature can be read in the ACPS flag
during a READ operation on the I2C-bus (see Table 9).
It is not allowed to address the devices with words whose
length is different from 18, 19 or 27 bits.
Table 1 Data word length for 3-wire bus
TYPE NUMBER
DATA WORD REFERENCE DIVIDER(1) FREQUENCY STEP
TDA6402; TDA6402A; TDA6403; TDA6403A
TDA6402; TDA6402A; TDA6403; TDA6403A
TDA6402; TDA6402A; TDA6403; TDA6403A
18-bit
19-bit
27-bit
512
62.50 kHz
1024
31.25 kHz
programmable
programmable
Note
1. The selection of the reference divider is given by an automatic identification of the data word length. When the 27-bit
format is used, the reference divider is controlled by RSA and RSB bits (see Table 8). More details are given in
Chapter “PLL functional description”, Section “3-wire bus mode (SW = OPEN or VCC)”.
2000 Jan 24
3
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
QUICK REFERENCE DATA
Measured over full voltage and temperature ranges; unless otherwise specified.
SYMBOL
PARAMETER
supply voltage
CONDITIONS
operating
MIN.
4.5
TYP.
MAX.
5.5
UNIT
VCC
ICC
5
V
supply current
all PNP ports are ‘OFF’
−
71
4.0
−
−
mA
MHz
mA
mW
°C
fXTAL
Io(PNP)
Ptot
crystal oscillator input frequency
PNP port output current
total power dissipation
IC storage temperature
ambient temperature
RF frequency
3.2
4.48
30
note 1
note 2
−
−
−
490
+150
+85
Tstg
−40
−
Tamb
fRF
−20
−
°C
VHF band
UHF band
VHF band
UHF band
VHF band
UHF band
VHF band
UHF band
55.25
−
361.25 MHz
801.25 MHz
367.25
−
GV
NF
Vo
voltage gain
noise figure
−
−
−
−
−
−
19
29
8.5
9
−
−
−
−
−
−
dB
dB
dB
dB
output voltage causing 1% cross
modulation in channel
108
108
dBµV
dBµV
Notes
1. One buffer ‘ON’, Io = 25 mA; two buffers ‘ON’, maximum sum of Io = 30 mA.
2
1
--
2
V33
2. The power dissipation is calculated as follows: Ptot = VCC × (ICC – Io) + VCE(sat PNP) × I +
----------------------
o
22 kΩ
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
DESCRIPTION
VERSION
TDA6402M;
TDA6402AM
SSOP28 plastic shrink small outline package; 28 leads; body width 5.3 mm
SOT341-1
TDA6403M;
TDA6403AM
SSOP28 plastic shrink small outline package; 28 leads; body width 5.3 mm
SOT341-1
2000 Jan 24
4
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
BLOCK DIAGRAM
V
IFFIL1 IFFIL2
CC
19 (10)
5 (24) 6 (23)
(5) 24
VHFOSCOC
3 (26)
VHFIN
VHF
OSCILLATOR
RF INPUT
VHF
VHF
MIXER
(7) 22
VHFOSCIB
BS
BS
BS
(6) 23
OSCGND
TDA6402
TDA6402A
TDA6403
4 (25)
(9) 20
IF
RFGND
IFOUT
PREAMPLIFIER
TDA6403A
(1) 28
(2) 27
(3) 26
(4) 25
UHFOSCIB2
UHFOSCOC2
1 (28)
2 (27)
UHFIN1
UHFIN2
RF INPUT
UHF
UHF
MIXER
UHF
OSCILLATOR
UHFOSCOC1
UHFOSCIB1
BS
BS
BS
(13) 16
(12) 17
CP
VT
XTAL
OSCILLATOR
4 MHz
PRESCALER
DIVIDE BY
512, 640, 1024
18 (11)
f
f
REF
XTAL
PHASE
COMPARATOR
CHARGE
PUMP
RSA
RSB
OPAMP
OS
15-BIT
PROGRAMMABLE
DIVIDER
PRESCALER
DIVIDE BY 8
DIV
T0, T1, T2 CP
IN LOCK
DETECTOR
15-BIT
FREQUENCY
REGISTER
POWER-DOWN
DETECTOR
CONTROL
REGISTER
FL
FL
14 (15)
13 (16)
11 (18)
CL
SCL
CP T2 T1 T0 RSA RSB OS
2
SDA
SW
DA
I C / 3-WIRE BUS TRANSCEIVER
f
SW
CE/AS
REF
1/2f
PORT
REGISTER
FL
DIV
12 (17)
CE/AS
UHF VHFH VHFL FMST
3-BIT A/D
CONVERTER
GATE
BS
(8) 21
GND
T0, T1, T2
15 (14)
LOCK/ADC
9 (20)
PVHFH
7 (22) 10 (19)
FMST
8 (21)
MGE692
PUHF
PVHFL
The pin numbers in parenthesis represent the TDA6403 and TDA6403A.
Fig.1 Block diagram.
5
2000 Jan 24
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
PINNING
PIN
SYMBOL
DESCRIPTION
TDA6402;
TDA6402A
TDA6403;
TDA6403A
UHFIN1
UHFIN2
VHFIN
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
UHF RF input 1
UHF RF input 2
VHF RF input
RF ground
2
3
RFGND
IFFIL1
4
5
IF filter output 1
IF filter output 2
IFFIL2
6
PVHFL
PVHFH
PUHF
7
PNP port output, general purpose (e.g. VHF low sub-band)
PNP port output, general purpose (e.g. VHF high sub-band)
PNP port output, UHF band
PNP port output, general purpose (e.g. FM sound trap)
bus mode selection input (I2C-bus/3-wire bus)
Chip Enable/Address Selection input
serial data input/output
8
9
FMST
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
SW
CE/AS
DA
CL
serial clock input
lock detector output (3-wire bus)/ADC input (I2C-bus)
LOCK/ADC
CP
charge pump output
VT
tuning voltage output
XTAL
crystal oscillator input
VCC
supply voltage
IFOUT
IF output
GND
8
digital ground
VHFOSCIB
OSCGND
VHFOSCOC
UHFOSCIB1
UHFOSCOC1
UHFOSCOC2
UHFOSCIB2
7
VHF oscillator input base
6
oscillator ground
5
VHF oscillator output collector
UHF oscillator input base 1
4
3
UHF oscillator output collector 1
UHF oscillator output collector 2
UHF oscillator input base 2
2
1
2000 Jan 24
6
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
handbook, halfpage
handbook, halfpage
UHFOSCIB2
UHFOSCOC2
UHFOSCOC1
UHFOSCIB1
VHFOSCOC
OSCGND
1
2
UHFIN1
UHFIN2
VHFIN
UHFIN1
UHFOSCIB2
UHFOSCOC2
UHFOSCOC1
UHFOSCIB1
VHFOSCOC
28
27
26
25
24
1
2
28
27
26
25
24
UHFIN2
VHFIN
RFGND
IFFIL1
IFFIL2
PVHFL
PVHFH
PUHF
FMST
SW
3
3
RFGND
IFFIL1
4
4
5
5
23 IFFIL2
22 PVHFL
21 PVHFH
6
23 OSCGND
VHFOSCIB
6
VHFOSCIB
GND
7
22
7
TDA6402
TDA6402A
TDA6403
TDA6403A
8
8
21 GND
IFOUT
PUHF
FMST
SW
9
20
19
18
17
16
IFOUT
9
20
19
18
17
16
V
V
10
11
10
11
CC
CC
XTAL
XTAL
VT
VT 12
CP
CE/AS
DA
CE/AS 12
DA
CP
13
LOCK/ADC 14
13
CL 14
15 CL
15 LOCK/ADC
MGE690
MGE691
Fig.2 Pin configuration for TDA6402 and
TDA6402A.
Fig.3 Pin configuration for TDA6403 and
TDA6403A.
PLL FUNCTIONAL DESCRIPTION
and clock inputs respectively. A LOW-level on SW input
enables the I2C-bus; the CE/AS, DA and CL inputs are
used as address selection (AS), SDA and SCL input
respectively (see Table 2).
The device is controlled via the I2C-bus or the 3-wire bus,
depending on the voltage applied on the SW input.
A HIGH-level on the SW input enables the 3-wire bus;
CE/AS, DA and CL inputs are used as enable (CE), data
Table 2 Bus mode selection
PIN
SYMBOL
3-WIRE BUS MODE
I2C-BUS MODE
TDA6402;
TDA6402A
TDA6403;
TDA6403A
SW
11
12
13
14
15
18
17
16
15
14
HIGH-level or OPEN
LOW-level or GND
address selection input
serial data input
CE/AS
DA
enable input
data input
CL
clock input
serial clock input
LOCK/ADC
LOCK/TEST output
ADC input/TEST output
2000 Jan 24
7
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
I2C-bus mode (SW = GND)
controller, additional data bytes can be entered without the
need to re-address the device. The frequency register is
loaded after the 8th clock pulse of the second divider byte
(DB2), the control register is loaded after the 8th clock
pulse of the control byte (CB) and the band-switch register
is loaded after the 8th clock pulse of the band switch byte
(BB).
WRITE MODE; R/W = 0 (see Tables 3 and 4)
Data bytes can be sent to the device after the address
transmission (first byte). Four data bytes are needed to
fully program the device. The bus transceiver has an
auto-increment facility which permits the programming of
the device within one single transmission
(address + 4 data bytes).
I2C-BUS ADDRESS SELECTION
The device can also be partially programmed providing
that the first data byte following the address is divider
byte 1 (DB1) or control byte (CB). The bits in the data
bytes are defined in Tables 3 and 4. The first bit of the first
data byte transmitted indicates whether frequency data
(first bit = 0) or control and band-switch data (first bit = 1)
will follow. Until an I2C-bus STOP command is sent by the
The module address contains programmable address bits
(MA1 and MA0) which offer the possibility of having
several synthesizers (up to 4) in one system by applying a
specific voltage on the CE input. The relationship between
MA1 and MA0 and the input voltage applied to the CE
input is given in Table 6.
Table 3 I2C-bus data format, ‘write’ mode for the TDA6402 and TDA6403
BITS
NAME
BYTE
ACK
MSB
LSB
Address byte
Divider byte 1
Divider byte 2
Control byte
ADB
DB1
DB2
CB
1
0
1
N14
N6
CP
X
0
N13
N5
T2
X
0
N12
N4
T1
X
0
N11
N3
MA1
N10
N2
MA0
N9
R/W = 0
N8
A
A
A
A
A
N7
1
N1
N0
T0
RSA
RSB
OS
Band-switch byte
BB
X
FMST
PUHF PVHFH PVHFL
Table 4 I2C-bus data format, ‘write’ mode for the TDA6402A and TDA6403A
BITS
NAME
BYTE
ACK
MSB
LSB
Address byte
Divider byte 1
Divider byte 2
Control byte
ADB
DB1
DB2
CB
1
0
1
N14
N6
CP
X
0
N13
N5
T2
X
0
N12
N4
T1
X
0
N11
N3
MA1
N10
N2
MA0
N9
R/W = 0
N8
A
A
A
A
A
N7
1
N1
N0
T0
RSA
RSB
OS
Band-switch byte
BB
X
PUHF
FMST PVHFH PVHFL
2000 Jan 24
8
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
Table 5 Description of symbols used in Tables 3 and 4
SYMBOL
DESCRIPTION
A
acknowledge
programmable address bits (see Table 6)
programmable divider bits; N = N14 × 214 + N13 × 213 + ... + N1 × 21 + N0
MA1, MA0
N14 to N0
CP
charge pump current:
CP = 0 = 60 µA
CP = 1 = 280 µA (default)
T2, T1,T0
RSA, RSB
OS
test bits (see Table 7)
reference divider ratio select bits (see Table 8)
tuning amplifier control bit:
OS = 0; normal operation; tuning voltage is ‘ON’ (default)
OS = 1; tuning voltage is ‘OFF’ (high-impedance)
PVHFL, PVHFH, PUHF, FMST PNP ports control bits:
bit = 0; buffer n is ‘OFF’ (default)
bit = 1; buffer n is ‘ON’
don’t care
X
Table 6 Address selection (I2C-bus mode)
MA1
MA0
VOLTAGE APPLIED ON CE INPUT (SW = GND)
0
0
1
1
0
1
0
1
0 V to 0.1 × VCC
open or 0.2 × VCC to 0.3 × VCC
0.4 × VCC to 0.6 × VCC
0.9 × VCC to 1.0 × VCC
Table 7 Test modes
T2
T1
T0
TEST MODES
0
0
0
1
1
1
1
0
0
1
1
1
0
0
0
1
X
0
1
0
1
automatic charge pump switched off
automatic charge pump switched on (note 1)
charge pump is ‘OFF’
charge pump is sinking current
charge pump is sourcing current
fREF is available on pin LOCK/ADC (note 2)
1⁄2fDIV is available on pin LOCK/ADC (note 2)
Notes
1. This is the default mode at power-on reset.
2. The ADC input cannot be used when these test modes are active; see Section “Read mode; R/W = 1 (see Table 9)”
for more information.
2000 Jan 24
9
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
Table 8 Reference divider ratio select bits
RSA
RSB
REFERENCE DIVIDER RATIO
FREQUENCY STEP (kHz)
X(1)
0
0
1
1
640
1024
512
6.25
3.90625
7.8125
1
Note
1. X = don’t care.
READ MODE; R/W = 1 (see Table 9)
READ sequence). Control of the loop is made possible
with the in-lock flag FL which indicates when the loop is
locked (FL = 1).
Data can be read from the device by setting the R/W bit to
logic 1. After the slave address has been recognized, the
device generates an acknowledge pulse and the first data
byte (status byte) is transferred on the SDA line (MSB
first). Data is valid on the SDA line during a HIGH-level of
the SCL clock signal. A second data byte can be read from
the device if the microcontroller generates an
The automatic charge pump switch flag (ACPS) is LOW
when the automatic charge pump switch mode is ‘ON’ and
the loop is locked. In other conditions, ACPS = 1.
When ACPS = 0, the charge pump current is forced to the
LOW value.
acknowledge on the SDA line (master acknowledge).
End of transmission will occur if no master acknowledge
occurs. The device will then release the data line to allow
the microcontroller to generate a STOP condition.
The POR flag is set to logic 1 at power-on. The flag is reset
when an end-of-data is detected by the device (end of a
A built-in ADC is available on LOCK/ADC pin (I2C-bus
mode only). This converter can be used to apply AFC
information to the microcontroller from the IF section of the
television. The relationship between the bits A2, A1 and A0
is given in Table 11.
Table 9 Read data format
BITS
ACK
LSB
NAME
BYTE
MSB(1)
Address byte
Status byte
ADB
SB
1
1
0
0
1
0
1
MA1
A2
MA0
A1
R/W = 1
A0
A
POR
FL
ACPS
−
Note
1. MSB is transmitted first.
Table 10 Description of symbols used in Table 9
SYMBOL
DESCRIPTION
A
acknowledge
POR
FL
power-on reset flag (POR = 1 at power-on)
in-lock flag (FL = 1 when the loop is locked)
automatic charge pump switch flag:
ACPS = 0; active
ACPS
ACPS = 1; not active
A2, A1, A0
digital outputs of the 5-level ADC
2000 Jan 24
10
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
Table 11 A to D converter levels (note 1)
A2
A1
A0
VOLTAGE APPLIED ON ADC INPUT
0.60 × VCC to 1.00 × VCC
1
0
0
0
0
0
1
1
0
0
0
1
0
1
0
0.45 × VCC to 0.60 × VCC
0.30 × VCC to 0.45 × VCC
0.15 × VCC to 0.30 × VCC
0 to 0.15 × VCC
Note
1. Accuracy is ±0.03 × VCC
.
POWER-ON RESET
Table 12 Default bits at power-on reset
BITS
NAME
BYTE
MSB
LSB
Address byte
Divider byte 1
Divider byte 2
Control byte
ADB
DB1
DB2
CB
1
0
1
X
X
1
0
X
X
0
0
X
X
0
0
X
X
1
0
MA1
X
MA0
X
X
X
X
1
X
1
X
X
X
1
Band switch byte
BB
X
X
X
X
0
0
0
The power-on detection threshold voltage VPOR is set to
VCC = 2 V at room temperature. Below this threshold, the
device is reset to the power-on state.
bits are loaded into the frequency register at the
HIGH-to-LOW transition of the chip enable line when an
18-bit or 19-bit data word is transmitted (see Figs 4 and 5).
At power-on state, the charge pump current is set to
280 µA, the tuning voltage output is disabled, the test bits
T2, T1 and T0 are set to ‘001’ (automatic charge pump
switch ‘ON’) and RSB is set to logic 1.
When a 27-bit data word is transmitted, the frequency bits
are loaded into the frequency register on the 20th rising
edge of the clock pulse and the control bits at the
HIGH-to-LOW transition of the chip enable line (see Fig.6).
In this mode, the reference divider is given by the RSA and
RSB bits (see Table 8). The test bits T2, T1 and T0, the
charge pump bit CP, the ratio select bit RSB and the OS
bit can only be selected or changed with a 27-bit
transmission. They remain programmed if an 18-bit or
19-bit transmission occurs. Only RSA is controlled by the
transmission length when the 18-bit or 19-bit format is
used. When an 18-bit data word is transmitted, the most
significant bit of the divider N14 is internally set to logic 0
and the RSA bit is set to logic 1. When a 19-bit data word
is transmitted, the RSA bit is set to logic 0.
PUHF is ‘OFF’, which means that the UHF oscillator and
the UHF mixer are switched off. Consequently, the VHF
oscillator and the VHF mixer are switched on. PVHFL and
PVHFH are ‘OFF’, which means that the VHF tank circuit
is working in the VHF I sub-band. The tuning amplifier is
switched off until the first transmission. In that case, the
tank circuit in VHF I is supplied with the maximum tuning
voltage. The oscillator is therefore working at the end of
the VHF I sub-band.
3-wire bus mode (SW = OPEN or VCC
)
A data word of less than 18 bits will not affect the
frequency register of the device. The definition of the bits
is unchanged compared to I2C-bus mode.
During a HIGH-level on the CE input (enable line), the data
is clocked into the data register at the HIGH-to-LOW
transition of the clock. The first four bits control the PNP
ports and are loaded into the internal band switch register
on the 5th rising edge of the clock pulse. The frequency
It is not allowed to address the devices with words whose
length is different from 18, 19 or 27 bits.
2000 Jan 24
11
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
POWER-ON RESET
PVHFH are ‘OFF’, which means that the VHF tank circuit
is working in the VHF I sub-band. The tuning amplifier is
switched off until the first transmission. In that case, the
tank circuit in VHF I is supplied with the maximum tuning
voltage. The oscillator is therefore working at the end of
the VHF I sub-band.
The power-on detection threshold voltage VPOR is set to
VCC = 2 V at room temperature. Below this threshold, the
device is reset to the power-on state.
At power-on state, the charge pump current is set to
280 µA, the tuning voltage output is disabled, the test bits
T2, T1 and T0 are set to ‘001’ (automatic charge pump
switch ‘ON’) and RSB is set to logic 1.
If the first sequence transmitted to the device
has 18 or 19 bits, the reference divider ratio is set to 512
or 1024, depending on the sequence length.
If the sequence has 27 bits, the reference divider ratio is
fixed by RSA and RSB bits (see Table 8).
PUHF is ‘OFF’, which means that the UHF oscillator and
the UHF mixer are switched off. Consequently, the VHF
oscillator and the VHF mixer are switched on. PVHFL and
INVALID
DATA
BAND SWITCH
DATA
FREQUENCY
DATA
INVALID
DATA
FMST PVHFL
PUHF
PVHFH
N13 N12 N11 N10 N9
N8 N7
N6 N5 N4 N3 N2 N1
N0
18
DA
CL
CE
1
4
5
LOAD BAND SWITCH
REGISTER
LOAD FREQUENCY
REGISTER
MGE693
Fig.4 Normal mode; 18-bit data format (RSA = 1).
2000 Jan 24
12
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
INVALID
DATA
BAND SWITCH
DATA
FREQUENCY
DATA
INVALID
DATA
FMST PVHFL
PUHF PVHFH
N14 N13 N12 N11 N10 N9 N8 N7 N6 N5 N4 N3 N2 N1 N0
DA
CL
CE
1
4
5
19
LOAD BAND SWITCH
REGISTER
LOAD FREQUENCY
REGISTER
MGE694
Fig.5 Normal mode; 19-bit data format (RSA = 0).
INVALID
DATA
BAND SWITCH
DATA
FREQUENCY
DATA
TEST AND FEATURES
DATA
INVALID
DATA
FMST PVHFL
PUHF PVHFH
N14 N13 N12
N2
N1 N0
X
CP T2 T1
T0 RSA RSB OS
DA
CL
CE
1
4
5
19
20
27
LOAD BAND SWITCH
REGISTER
LOAD FREQUENCY
REGISTER
LOAD CONTROL
REGISTER
MGE695
Fig.6 Test and features mode; 27-bit data format.
13
2000 Jan 24
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
INVALID
DATA
INVALID
DATA
DA
CL
MSB
LSB
t
HIGH
t
SU;DA
t
HD;DA
CE
t
t
SU;ENCL
HD;ENDA
MGE696
Fig.7 Timing diagram for 3-wire bus; DA, CL and CE.
t
handbook, halfpage
CE
EN
CL
t
MGE697
HD;ENCL
Fig.8 Timing diagram for 3-wire bus; CE and CL.
14
2000 Jan 24
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134) (note 1).
PIN
SYMBOL
PARAMETER
MIN. MAX. UNIT
TDA6402;
TDA6403;
TDA6402A TDA6403A
VCC
19
10
DC supply voltage
−0.3
4.5
+6
V
operating supply voltage
5.5
8
V
OVS pulse is 1 second width and 1 A max.
PNP port output voltage
−
V
VBSn
IBSn
7 to 10
7 to 10
16
19 to 22
19 to 22
13
−0.3
−1
+6
V
PNP port output current
+30
+6
mA
V
VCP
charge pump output voltage
bus mode selection input voltage
tuning voltage output
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−1
VSW
VVT
11
18
+6
V
17
12
+35
+6
V
VLOCK/ADC
VCL
15
14
LOCK/ADC input/output voltage
serial clock input voltage
V
14
15
+6
V
VDA
13
16
serial data input/output voltage
data output current (I2C-bus mode)
chip enable/address selection input voltage
crystal input voltage
+6
V
IDA
13
16
+10
+6
mA
V
VCE
12
17
−0.3
−0.3
−
VXTAL
IO
18
11
+6
V
1 to 6,
19 to 28
1 to 10,
23 to 28
output current of each pin to ground
−10
mA
tsc(max)
−
−
maximum short-circuit time (all pins to VCC and all
pins to GND, OSCGND and RFGND)
−
10
s
Tstg
Tamb
Tj
−
−
−
−
−
−
IC storage temperature
ambient temperature
junction temperature
−40
−20
−
+150 °C
+85
150
°C
°C
Note
1. Maximum ratings can not be exceeded, not even momentarily without causing irreversible IC damage.
Maximum ratings can not be accumulated.
THERMAL CHARACTERISTICS
SYMBOL
Rth( j-a
PARAMETER
CONDITIONS
in free air
TYP.
UNIT
)
thermal resistance from junction to ambient
90
K/W
2000 Jan 24
15
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
CHARACTERISTICS
Tamb = 25 °C
SYMBOL
Supply
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VCC
ICC
supply voltage
supply current at VCC = 5 V
4.5
5.0
5.5
V
all PNP ports are ‘OFF’
−
−
71
78
mA
mA
one PNP port is ‘ON’; sourcing
25 mA
103
113
one PNP port is ‘ON’; sourcing
25 mA and a second one is ‘ON’;
sourcing 5 mA
−
111
122
mA
PLL part (VCC = 4.5 to 5.5 V; Tamb = −20 to +85 °C; unless otherwise specified)
FUNCTIONAL RANGE
VPOR
power-on reset supply voltage below this supply voltage power-on
reset becomes active
1.5
2.0
−
V
N
divider ratio
15-bit frequency word
14-bit frequency word
RXTAL = 25 to 300 Ω
fXTAL = 4 MHz
256
256
3.2
−
32767
16383
4.48
−
−
fXTAL
crystal oscillator
4.0
1200
MHz
ZXTAL
input impedance (absolute
value)
600
Ω
PNP PORTS
IBSn(off)
leakage current
VCC = 5.5 V; VPn = 0 V
−10
−
−
µA
VBSn(sat)
output saturation voltage
one buffer output is ‘ON’, sourcing
−
0.25
0.4
V
25 mA; VPn(sat) = VCC − VPn
LOCK OUTPUT IN 3-WIRE BUS MODE (PNP COLLECTOR OUT)
IUNLOCK
output current when the PLL is VCC = 5.5 V; VOUT = 5.5 V
out-of-lock
−
−
−
−
100
0.8
µA
V
VUNLOCK output saturation voltage
when the PLL is out-of-lock
ISOURCE = 200 µA;
UNLOCK = VCC − VOUT
0.4
0.01
V
VLOCK
output voltage
the PLL is locked
0.40
V
ADC INPUT IN I2C-BUS MODE
VADC
IADCH
IADCL
ADC input voltage
see Table 11
VADC = VCC
VADC = 0 V
0
−
−
−
VCC
10
−
V
HIGH-level input current
LOW-level input current
−
µA
µA
−10
SW INPUT (BUS MODE SELECTION)
VSWL
VSWH
ISWH
ISWL
LOW-level input voltage
HIGH-level input voltage
HIGH-level input current
LOW-level input current
0
−
−
−
−
1.5
VCC
10
−
V
3
V
VSW = VCC
VSW = 0 V
−
µA
µA
−100
2000 Jan 24
16
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
CE/AS INPUT (CHIP ENABLE/ADDRESS SELECTION)
VCE/ASL
VCE/ASH
ICE/ASH
ICE/ASL
LOW-level input voltage
HIGH-level input voltage
HIGH-level input current
LOW-level input current
0
3
−
−
−
−
−
1.5
V
5.5
10
−
V
VCE/AS = 5.5 V
µA
µA
VCE/AS = 0 V
−10
CL AND DA INPUTS
VCL/DAL
VCL/DAH
ICL/DAH
LOW-level input voltage
0
−
−
−
−
−
−
1.5
5.5
10
10
10
−
V
HIGH-level input voltage
HIGH-level input current
3
V
VBUS = 5.5 V; VCC = 0 V
−
µA
µA
µA
µA
V
BUS = 5.5 V; VCC = 5.5 V
VBUS = 1.5 V; VCC = 0 V
BUS = 0 V; VCC = 5.5 V
−
ICL/DAL
LOW-level input current
−
V
−10
DA OUTPUT (I2C-BUS MODE)
IDAH
VDA
leakage current
output voltage
VDA = 5.5 V
−
−
−
−
10
µA
IDA = 3 mA (sink current)
0.4
V
CLOCK FREQUENCY
fclk
clock frequency
−
100
150
kHz
CHARGE PUMP OUTPUT CP
ICPH
HIGH-level input current
(absolute value)
CP = 1
CP = 0
−
−
280
60
−
−
µA
µA
ICPL
LOW-level input current
(absolute value)
VCP
output voltage
PLL is locked; Tamb = 25 °C
−
1.95
−
V
ICPleak
off-state leakage current
T2 = 0; T1 = 1
−15
−0.5
+15
nA
TUNING VOLTAGE OUTPUT VT
IVTOFF
leakage current when
switched off
output voltage when the loop OS = 0; T2 = 0; T1 = 0; T0 = 1;
OS = 1; tuning supply = 33 V
−
−
−
10
µA
VVT
0.2
32.7
V
is closed
RLOAD = 22 kΩ; tuning supply = 33 V
3-WIRE BUS TIMING
tHIGH
clock HIGH time
see Fig.7
see Fig.7
see Fig.7
see Fig.7
see Fig.7
see Fig.8
2
−
−
−
−
−
−
−
−
−
−
−
−
µs
µs
µs
µs
µs
µs
tSU;DA
tHD;DA
tSU;ENCL
tHD;ENDA
tEN
data set-up time
2
data hold time
2
enable to clock set-up time
enable to data hold time
10
2
enable time between two
transmissions
10
tHD;ENCL
enable to clock active edge
hold time
see Fig.8
6
−
−
µs
2000 Jan 24
17
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Mixer/oscillator part (VCC = 5 V) (measured in circuit of Fig.19; unless otherwise specified)
VHF MIXER (INCLUDING IF AMPLIFIER)
fRF
Gv
RF frequency
voltage gain
note 1
55.25
16.5
16.5
−
−
361.25 MHz
fRF = 57.5 MHz; see Fig.12
19
21.5
21.5
9.5
10.5
12.5
−
dB
fRF = 357.5 MHz; see Fig.12
fRF = 50 MHz; see Figs 13 and 14
fRF = 150 MHz; see Figs 13 and 14
fRF = 300 MHz; see Fig.14
19
dB
NF
Vo
noise figure
8.5
8.5
9.5
108
108
83
dB
−
dB
−
dB
output voltage causing 1%
cross modulation in channel
fRF = 55.25 MHz; see Fig.15
RF = 361.25 MHz; see Fig.15
105
105
−
dBµV
dBµV
dBµV
f
−
Vi
input voltage causing pulling in fRF = 361.25 MHz; note 2
channel (750 Hz)
−
gos
optimum source conductance fRF = 50 MHz
for noise figure
−
−
−
−
−
−
0.7
0.9
1.5
0.25
0.5
1.3
−
−
−
−
−
−
mS
mS
mS
mS
mS
pF
f
RF = 150 MHz
RF = 300 MHz
f
gi
input conductance
input capacitance
fRF = 55.25 MHz; see Fig.9
RF = 361.25 MHz; see Fig.9
f
Ci
fRF = 57.5 to 357.5 MHz; see Fig.9
VHF OSCILLATOR; see Fig.19
fOSC
oscillator frequency
note 3
101
−
−
407
120
−
MHz
kHz
kHz
kHz
∆fOSC(V)
oscillator frequency shift
∆VCC = 5%; note 4
∆VCC = 10%; note 4
20
−
110
1600
∆fOSC(T)
oscillator frequency drift
oscillator frequency drift
∆T = 25 °C; with compensation;
note 5
−
2700
∆fOSC(t)
5 s to 15 min after switch on; note 6
−
−
600
100
1100
kHz
ΦOSC
phase noise, carrier to noise
sideband
±100 kHz frequency offset; worst
case in the frequency range
−
dBc/Hz
RSC
ripple susceptibility of VCC
(peak-to-peak value)
VCC = 5 V; worst case in the
frequency range; ripple frequency
500 kHz; note 7
15
20
−
mV
UHF MIXER (INCLUDING IF AMPLIFIER)
fRF
Gv
RF frequency
voltage gain
note 1
367.25
26
−
801.25 MHz
fRF = 369.5 MHz; see Fig.16
29
29
9
32
32
11
12
−
dB
fRF = 803.5 MHz; see Fig.16
fRF = 369.5 MHz; see Fig.17
fRF = 803.5 MHz; see Fig.17
26
dB
NF
Vo
Vi
noise figure (not corrected for
image)
−
dB
−
10
108
108
82
dB
output voltage causing 1%
cross modulation in channel
fRF = 367.25 MHz; see Fig.18
RF = 801.25 MHz; see Fig.18
105
105
−
dBµV
dBµV
dBµV
f
−
input voltage causing pulling in fRF = 801.25 MHz; note 2
channel (750 Hz)
−
2000 Jan 24
18
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
30
MAX.
UNIT
Zi
input impedance (RS + jωLS)
RS at fRF = 367.25 MHz; see Fig.10
RS at fRF = 801.25 MHz; see Fig.10
LS at fRF = 367.25 MHz; see Fig.10
LS at fRF = 801.25 MHz; see Fig.10
−
−
−
−
−
Ω
38
9
−
−
−
Ω
nH
nH
6
UHF OSCILLATOR
fOSC
oscillator frequency
note 3
413
−
−
847
80
MHz
kHz
kHz
kHz
∆fOSC(V)
oscillator frequency shift
∆VCC = 5%; note 4
∆VCC = 10%; note 4
10
−
300
2000
−
∆fOSC(T)
∆fOSC(t)
ΦOSC
oscillator frequency drift
oscillator frequency drift
∆T = 25 °C; with compensation;
note 5
−
2700
5 s to 15 min after switching on;
note 6
−
300
100
28
1300
kHz
phase noise, carrier to noise
sideband
±100 kHz frequency offset; worst
case in the frequency range
−
−
−
dBc/Hz
mV
RSC
ripple susceptibility of VCC
(peak-to-peak value)
VCC = 5 V (worst case in the
frequency range); ripple frequency
500 kHz; note 7
15
IF AMPLIFIER
S22
output reflection coefficient
magnitude; see Fig.11
phase; see Fig.11
−
−
−
−
−13.1
2.9
−
−
−
−
dB
deg
Ω
Zo
output impedance (RS + jωLS) RS at 43.5 MHz; see Fig.11
75
LS at 43.5 MHz; see Fig.11
6.6
nH
REJECTION AT THE IF OUTPUT
INTDIF
level of divider interferences in note 8; worst case: channel C
the IF signal
INTRXTAL crystal oscillator interferences VIF = 100 dBµV; worst case in the
rejection frequency range; note 9
−
17
−
−
−
−
dBµV
dBc
60
50
INTRFREF reference frequency rejection VIF = 100 dBµV; worst case in the
−
dBc
frequency range; fREF = 7.8125 kHz;
note 10
INTCH6
channel 6 beat
VRFpix = VRFsnd = 80 dBµV; note 11
VRFpix = 80 dBµV; note 12
57
60
−
−
−
−
dBc
dBc
INTCHA-5 channel A-5 beat
Notes
1. The RF frequency range is defined by the oscillator frequency range and the intermediate frequency (IF).
2. This is the level of the RF signal (100% amplitude modulated with 11.89 kHz) that causes a 750 Hz frequency
deviation on the oscillator signal; it produces sidebands 30 dB below the level of the oscillator signal.
3. Limits are related to the tank circuits used in Fig.19; frequency bands may be adjusted by the choice of external
components.
4. The frequency shift is defined as a change in oscillator frequency when the supply voltage varies from
VCC = 5 to 4.75 V (4.5 V) or from VCC = 5 to 5.25 V (5.5 V). The oscillator is free running during this measurement.
2000 Jan 24
19
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
5. The frequency drift is defined as a change in oscillator frequency when the ambient temperature varies from
Tamb = 25 to 50 °C or from Tamb = 25 to 0 °C. The oscillator is free running during this measurement. The VHF drift
value can be improved by adding a 10 kΩ resistor between the VHFOSCOC pin and the VCC. In that case the typical
VHF drift value can be reduced to 900 kHz.
6. Switch-on drift is defined as the change in oscillator frequency between 5 s and 15 min after switch on. The oscillator
is free running during this measurement.
7. The ripple susceptibility is measured for a 500 kHz ripple at the IF output using the measurement circuit of Fig.19;
the level of the ripple signal is increased until a difference of 53.5 dB occurs between the IF carrier fixed at 100 dBµV
and the sideband components.
8. This is the level of divider interferences close to the IF frequency. For example channel C: fOSC = 179 MHz,
1⁄4 fOSC = 44.75 MHz. Divider interference is measured with the Philips 37185 demonstration board in accordance
with Fig.19. All ground pins are connected to a single ground plane under the IC. The VHFIN input must be left open
(i.e. not connected to any load or cable); The UHFIN1 and UHFIN2 inputs are connected to a hybrid.
The measured levels of divider interference are influenced by layout, grounding and port decoupling.
The measurement results could vary by as much as 10 dB with respect to the specification.
9. Crystal oscillator interference means the 4 MHz sidebands caused by the crystal oscillator. The rejection has to be
greater than 60 dB for an IF output signal of 100 dBµV.
10. The reference frequency rejection is the level of reference frequency sidebands related to the sound sub-carrier.
The rejection has to be greater than 50 dB for an IF output signal of 100 dBµV.
11. Channel 6 beat is the interfering product of fRFpix + fRFsnd − fOSC of channel 6 at 42 MHz.
12. Channel A-5 beat is the interfering product of fRFpix, fIF and fOSC of channel A-4; fBEAT = 45.5 MHz. The possible
mechanisms are: fOSC − 2 × fIF or 2 × fRFpix − fOSC. For the measurement VRF = 80 dBµV.
1
2
0.5
0.2
5
10
∞
10
– j
+ j
40 MHz
10
5
2
1
0.5
0.2
0
400 MHz
5
0.2
2
0.5
MGE722
1
Fig.9 Input admittance (S11) of the VHF mixer input (40 to 400 MHz); Y0 = 20 mS.
2000 Jan 24
20
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
1
0.5
2
860 MHz
0.2
5
350 MHz
0.5
10
+ j
0.2
1
2
5
10
0
∞
10
– j
5
0.2
2
0.5
MGE723
1
Fig.10 Input impedance (S11) of the UHF mixer input (350 to 860 MHz); Z0 = 50 Ω.
1
0.5
2
0.2
5
10
+ j
– j
20 MHz
0.2
0.5
1
2
5
10
0
∞
100 MHz
10
5
0.2
2
0.5
MGE724
1
Fig.11 Output impedance (S22) of the IF amplifier (20 to 60 MHz); Z0 = 50 Ω.
2000 Jan 24
21
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
TEST AND APPLICATION INFORMATION
signal
source
50 Ω
22 Ω
VHFIN
IFOUT
spectrum
analyzer
D.U.T.
e
V
V
50 Ω
50 Ω
meas
V
V
V'
i
o
meas
RMS
voltmeter
MGE698
Zi >> 50 Ω
Vi = 2 × Vmeas = 80 dBµV.
Vi = Vmeas + 6 dB = 80 dBµV.
50 + 22
Vo = V’meas ×
-------------------
50
V o
G = 20 log
v
------
V i
Fig.12 Gain measurement in VHF band.
I1
I3
BNC
PCB
PCB
plug
C1
C3
BNC
plug
I2
L1
C2
RIM-RIM
RIM-RIM
C4
(a)
(b)
MBE286 - 1
(a) For fRF = 50 MHz:
(b) For fRF = 150 MHz:
mixer A frequency response measured = 57 MHz, loss = 0 dB
image suppression = 16 dB
mixer A frequency response measured = 150.3 MHz, loss = 1.3 dB
image suppression = 13 dB
C3 = 5 pF
C1 = 9 pF
C2 = 15 pF
C4 = 25 pF
L1 = 7 turns ( 5.5 mm, wire = 0.5 mm)
l2 = semi rigid cable (RIM): 30 cm long
l1 = semi rigid cable (RIM): 5 cm long
l3 = semi rigid cable (RIM): 5 cm long
(semi rigid cable (RIM); 33 dB/100 m; 50 Ω; 96 pF/m).
(semi rigid cable (RIM); 33 dB/100 m; 50 Ω; 96 pF/m).
Fig.13 Input circuit for optimum noise figure in VHF band.
2000 Jan 24
22
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
NOISE
NOISE
FIGURE
METER
22 Ω
BNC
RIM
VHFIN
IFOUT
SOURCE
INPUT
CIRCUIT
D.U.T.
MGE699
NF = NFmeas − loss (of input circuit) (dB).
Fig.14 Noise figure (NF) measurement in VHF band.
FILTER
AM = 50%
18 dB
attenuator
50 Ω
22 Ω
1 kHz
A
C
VHFIN
IFOUT
modulation
analyzer
unwanted
signal
45.75 MHz
e
u
source
HYBRID
D.U.T.
50 Ω
V
V
V
meas
o
50 Ω
B
D
wanted
signal
e
50
Ω
w
RMS
voltmeter
source
MGE700
50 + 22
Vo = Vmeas
×
-------------------
50
Wanted output signal at fRFW = 55.25 (361.25) MHz; Vo(w) = 100 dBµV.
Measuring the level of the unwanted output signal Vo(u) causing 0.5% AM modulation in the wanted output signal; fRFU = 59.75 (366.75) MHz.
fOSC = 101 (407) MHz.
Filter characteristics: fC = 45.75 MHz, f−3 dB(BW) = 1.4 MHz, f−30 dB(BW) = 3.1 MHz.
Fig.15 Cross modulation measurement in VHF band.
2000 Jan 24
23
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
signal
source
22 Ω
50 Ω
A
UHFIN1 IFOUT
D.U.T.
C
spectrum
analyzer
V
HYBRID
i
e
V
V
50 Ω
50 Ω
meas
V
V'
o
meas
B
D
UHFIN2
50 Ω
RMS
voltmeter
MGE701
Loss (in hybrid) = 1 dB.
Vi = Vmeas − loss (in hybrid) = 70 dBµV.
50 + 22
Vo = V’meas ×
-------------------
50
V o
G = 20 log
v
------
V i
Fig.16 Gain (Gv) measurement in UHF band.
NOISE
FIGURE
METER
22 Ω
NOISE
SOURCE
A
C
UHFIN IFOUT
D.U.T.
HYBRID
B
D
UHFIN
MGE702
50 Ω
Loss (in hybrid) = 1 dB.
NF = NFmeas − loss (in hybrid).
Fig.17 Noise figure (NF) measurement in bands UHF.
24
2000 Jan 24
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
FILTER
18 dB
attenuator
AM = 50%
50 Ω
22 Ω
1 kHz
A
A
C
C
UHFIN IFOUT
D.U.T.
modulation
analyzer
unwanted
signal
45.75 MHz
e
u
source
HYBRID
HYBRID
50 Ω
V
V
V
meas
o
50 Ω
B
D
B
D
UHFIN
wanted
signal
e
w
RMS
voltmeter
source
50 Ω
50 Ω
MGE703
50 + 22
Vo = Vmeas
×
-------------------
50
Wanted output signal at fRFW = 367.25 (801.25) MHz; Vo(w) = 100 dBµV.
Measuring the level of the unwanted output signal Vo(u) causing 0.5% AM modulation in the wanted output signal; fRFU = 371.25 (805.75) MHz.
fOSC = 413 (847) MHz.
Filter characteristics: fC = 45.75 MHz, f−3 dB(BW) = 1.4 MHz, f−30 dB(BW) = 3.1 MHz.
Fig.18 Cross modulation measurement in UHF band.
2000 Jan 24
25
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
C1
C6 (N750)
R1
UHFIN1
UHFIN2
VHFIN
UHFOSCIB2
UHFOSCOC2
UHFOSCOC1
UHFOSCIB1
VHFOSCOC
OSCGND
1 (28)
2 (27)
3 (26)
4 (25)
5 (24)
6 (23)
UHF-IN
UHF-IN
VHF-IN
(1) 28
(2) 27
(3) 26
(4) 25
(5) 24
(6) 23
(7) 22
(8) 21
(9) 20
(10) 19
(11) 18
(12) 17
(13) 16
(14) 15
22 kΩ
1 nF
C2
1 pF
D1
BB134
23
nH
C7 (N750)
L2
C11
1 nF
C3
1.8 pF
23
nH
L3
C8 (N750)
47 pF
(N750)
4.7
kΩ
8 pF
(N750)
C10
R2
1 nF
1.8 pF
C9 (N750)
RFGND
IFFIL1
1 pF
R3
R4
C4
C12 (N750)
22 kΩ
22 kΩ
C14 (N470)
15 pF
C5
2.2 pF
R5
D2
L1
2 x 5t
4.7 Ω
R6
BB133
L4
100 pF
L5
IFFIL2
PVHFL
PVHFH
PUHF
FMST
SW
C15
15 pF
30 nH
80 nH
10 kΩ
4.7 nF
D3
C13 (N750)
2.5 pF
R19
VHFOSCIB
GND
VHF-LOW
7 (22)
TDA6402
TDA6402A
TDA6403
C16
R7
680 Ω
R9
330 Ω
D4
D5
D6
D7
PVHFH
4.7 nF
BA792
R20
VHF-HIGH
UHF
TDA6403A
8 (21)
330 Ω
3.9 kΩ
C17
1 nF
R21
L6
IFOUT
R8
9 (20)
PVHFL
80 nH
330 Ω
3.9 kΩ
R22
V
FMST
CC
10 (19)
11 (18)
12 (17)
13 (16)
14 (15)
330 Ω
C18
10 nF
2
3-WIRE / I C-bus
4 × LED 3 mm
X1
C19
XTAL
open for
3-wire
V
CC
2
1
18 pF
4 MHz
for test purpose only
R14
CE/AS
VT
CP
330 Ω
V
CC
VT
TP
C20
R12
R10
33 kΩ
C21
R16
DA
CL
330 Ω
22 kΩ
100 nF
1
2
22
kΩ
10
nF
R11
C22
TR1
BC847B
R13
LOCK/ADC
330 Ω
2.2 nF
R23
6.8 kΩ
R15
for test
purpose
only
22
Ω
R18
10 µF
(16 V)
10 µF
(16 V)
330 Ω
C23
V
C24
R26
50 Ω
R24
R25
IFOUT
measurement
ripple
68 kΩ
1 kΩ
1/2f
or f
REF
DIV
measurement
C25
3
2
1
BC847B
MGE689
TR2
10 nF
DA
CE
+5 V
+33 V
AGND
CL
JMP2
+5 V
AGND
LOCK
V
CC
for test purpose only
The pin numbers in parenthesis represent the TDA6403 and TDA6403A.
Fig.19 Measurement circuit.
2000 Jan 24
26
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
Component values for measurement circuit
Table 13 Capacitors (all SMD and NP0)
COMPONENT
VALUE
COMPONENT
VALUE
C1
1 nF
R11
R12
R13
R14
R15
R16
R18
R19
R20
R21
R22
R23
R24
R25
R26
22 kΩ
330 Ω
330 Ω
330 Ω
330 Ω
22 kΩ
22 Ω
C2
1 nF
C3
1 nF
C4
15 pF
15 pF
C5
C6
1 pF (N750)
1.8 pF (N750)
1.8 pF (N750)
1 pF (N750)
8 pF (N750)
47 pF (N750)
2.2 pF (N750)
2.7 pF (N750)
100 pF (N470)
4.7 nF
C7
C8
330 Ω
330 Ω
330 Ω
330 Ω
6.8 kΩ
68 kΩ
1 kΩ
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
50 Ω
4.7 nF
Table 15 Diodes and ICs
1 nF
COMPONENT
VALUE
10 nF
D1
D2
D3
IC
BB134
BB133
BA792
18 pF
100 nF
2.2 nF
TDA6402; TDA6402A;
TDA6403; TDA6403A
10 nF
10 µF (16 V; electrolytic)
10 µF (16 V; electrolytic)
10 nF
Table 16 Coils (wire size 0.4 mm)
COMPONENT
VALUE
Table 14 Resistors (all SMD)
L2
L3
L4
L5
L6
23 nH
23 nH
30 nH
80 nH
80 nH
COMPONENT
VALUE
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
22 kΩ
4.7 kΩ
22 kΩ
22 kΩ
4.7 Ω
Table 17 Transformer (note 1)
COMPONENT
VALUE
2 × 5 turns
10 kΩ
680 Ω
3.9 kΩ
3.9 kΩ
33 kΩ
L1
Note
1. Coil type: TOKO 7kN; material: 113 kN; screw core:
03-0093; pot core: 04-0026.
2000 Jan 24
27
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
Examples of I2C-bus sequences (SW = VCC) for
TDA6402 and TDA6403
Table 18 Crystal
COMPONENT
VALUE
VALUE
Tables 20 to 24 show the various sequences where:
X1
4 MHz
fOSC = 100 MHz
Table 19 Transistors
PVHFL = ‘ON’ to switch on VHF I
FMST is ‘ON’ to switch on an FM sound trap
ICP = 280 µA
COMPONENT
TR1
TR2
BC847B
BC847B
N = 512
fXTAL = 4 MHz
Tuning amplifier
S = START
The tuning amplifier is capable of driving the varicap
voltage without an external transistor. The tuning voltage
output must be connected to an external load of 27 kΩ
which is connected to the tuning voltage supply rail.
The loop filter design depends on the oscillator
A = acknowledge
P = STOP.
For the complete sequence see Table 20 (sequence 1) or
Table 21 (sequence 2).
characteristics and the selected reference frequency.
Crystal oscillator
The crystal oscillator uses a 4 MHz crystal connected in
series with an 18 pF capacitor thereby operating in the
series resonance mode. Connecting the oscillator to the
supply voltage is preferred, but it can also be connected to
ground.
Table 20 Complete sequence 1
BAND SWITCH
START ADDRESS BYTE DIVIDER BYTE 1 DIVIDER BYTE 2 CONTROL BYTE
C2 06 40 CE
Table 21 Complete sequence 2
START ADDRESS BYTE CONTROL BYTE
C2 CE
STOP
BYTE
S
A
A
A
A
09
A
P
BAND SWITCH
BYTE
DIVIDER BYTE 1 DIVIDER BYTE 2 STOP
S
A
A
09
A
06
A
40
A
P
Table 22 Divider bytes only sequence
C2 06
Table 25 Status byte acquisition
S
A
A
40
A
P
S
C3
A
XX(1)
X(2)
P
Notes
Table 23 Control and band switch bytes only sequence
C2 CE 09
1. XX = Read status byte.
S
A
A
A
P
2. X = No acknowledge from the master means end of
sequence.
Table 24 Control byte only sequence
S
C2
A
CE
A
P
2000 Jan 24
28
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
Table 26 Two status bytes acquisition
S
C3
A
XX(1)
A
XX(1) X(2)
P
Notes
1. XX = Read status byte.
2. X = No acknowledge from the master means end of sequence.
Other I2C-bus addresses may be selected by applying an appropriate voltage to the CE input.
Examples of 3-wire bus sequences (SW = OPEN)
Table 27 18-bit sequence (fOSC = 800 MHz; PUHF = ON)
1
0
0
0
1
1
0
0
1
0
0
0
0
0
0
0
0
0
The reference divider is automatically set to 512 assuming that RSB has been set to logic 1 at power-on. If RSB has been
set to logic 0, in a previous 27-bit sequence, the reference divider will still be set at 640. In that event, the 18-bit sequence
has to be adapted to the 640 divider ratio.
Table 28 19-bit sequence (fOSC = 650 MHz; PUHF = ON)
1
0
0
0
0
1
0
1
0
0
0
1
0
1
0
0
0
0
0
The reference divider is automatically set to 512 assuming that RSB has been set to logic 1 at power-on. If RSB has been
set to logic 0 in a previous 27-bit sequence, the reference divider will still be set at 640. In that event, the 19-bit sequence
has to be adapted to the 640 divider ratio.
Table 29 27-bit sequence (fOSC = 750 MHz; PUHF = ON; N = 640; ICP = 60 µA; no test function)
1
0
0
0
0
1
1
1
0
1
0
1
0
0
1
1
1
0
0
0
1
0
0
0
1
0
0
0
0
Table 30 19-bit sequence
1
0
0
0
0
1
0
1
1
0
1
1
1
0
0
0
0
This sequence will program fOSC to 600 MHz in 50 kHz steps; ICP remains at 60 µA.
Table 31 18-bit sequence
1
0
0
0
1
0
1
1
1
0
1
1
1
0
0
0
0
0
This sequence will program fOSC to 600 MHz in 50 kHz steps; ICP remains at 60 µA.
2000 Jan 24
29
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
INTERNAL PIN CONFIGURATION
PIN
AVERAGE DC VOLTAGE (V)
(measured in Fig.19)
SYMBOL
DESCRIPTION(1)
TDA6402;
TDA6403;
VHF
UHF
TDA6402A TDA6403A
UHFIN1
1
2
28
27
note 2
note 2
1.0
1.0
UHFIN2
1
2
(27)
(28)
MGE704
VHFIN
3
26
1.8
note 2
3
(26)
MGE705
RFGND
4
25
0.0
0.0
4
(25)
MGE706
IFFIL1
IFFIL2
5
6
24
23
3.6
3.6
3.6
3.6
(24)
5
6 (23)
MGD617
PVHFL
PVHFH
PUHF
7
8
22
21
20
19
0.0 or (VCC − VCE
)
0.0
(VCC − VCE) or 0.0 0.0
9
0.0
(VCC − VCE
)
7
8
FMST
10
0.0 or (VCC − VCE)
0.0
(22)
(21)
9
10
(20)
(19)
MGE708
2000 Jan 24
30
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
AVERAGE DC VOLTAGE (V)
PIN
(measured in Fig.19)
SYMBOL
DESCRIPTION(1)
TDA6402;
TDA6403;
VHF
UHF
TDA6402A TDA6403A
SW
11
12
18
17
5.0
5.0
11
(18)
MGE709
CE/AS
1.25
1.25
12
(17)
MGE710
DA
13
16
note 2
note 2
13
(16)
MGE711
CL
14
15
15
14
note 2
note 2
14
(15)
MGE712
LOCK/ADC
4.6
4.6
15
(14)
MGE713
2000 Jan 24
31
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
AVERAGE DC VOLTAGE (V)
PIN
(measured in Fig.19)
SYMBOL
DESCRIPTION(1)
TDA6402;
TDA6403;
VHF
UHF
TDA6402A TDA6403A
CP
16
13
1.9
1.9
16
(13)
MGE714
VT
17
18
12
11
VVT
VVT
17
(12)
MGE715
XTAL
3.4
3.4
18
(11)
MGE716
VCC
19
20
10
9
supply voltage
5.0
2.1
5.0
2.1
IFOUT
20
(9)
MGE717
GND
21
23
8
6
0.0
0.0
0.0
0.0
21
(8)
MGE718
OSCGND
23
(6)
MGE719
2000 Jan 24
32
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
AVERAGE DC VOLTAGE (V)
PIN
(measured in Fig.19)
SYMBOL
DESCRIPTION(1)
TDA6402;
TDA6403;
VHF
UHF
TDA6402A TDA6403A
VHFOSCIB
22
24
7
5
1.8
3.0
note 2
note 2
VHFOSCOC
24
(5)
22
(7)
MGE720
UHFOSCIB1
UHFOSCOC1
UHFOSCOC2
UHFOSCIB2
25
26
27
28
4
3
2
1
note 2
note 2
note 2
note 2
1.9
2.9
2.9
1.9
(2)
(3)
26
27
28
(1)
25
(4)
MGK825
Notes
1. The pin numbers in parenthesis represent the TDA6403 and TDA6403A.
2. Not applicable.
2000 Jan 24
33
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
PACKAGE OUTLINE
SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm
SOT341-1
D
E
A
X
v
c
H
M
A
y
E
Z
28
15
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
14
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
10.4
10.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
1.1
0.7
mm
2.0
0.25
0.65
1.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-02-04
99-12-27
SOT341-1
MO-150
2000 Jan 24
34
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
SOLDERING
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Manual soldering
Wave soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
2000 Jan 24
35
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
WAVE
REFLOW(1)
not suitable suitable
PACKAGE
BGA, LFBGA, SQFP, TFBGA
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS
PLCC(3), SO, SOJ
not suitable(2)
suitable
suitable
suitable
LQFP, QFP, TQFP
not recommended(3)(4) suitable
not recommended(5)
suitable
SSOP, TSSOP, VSO
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2000 Jan 24
36
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
2000 Jan 24
37
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
NOTES
2000 Jan 24
38
Philips Semiconductors
Product specification
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
TDA6402; TDA6402A;
TDA6403; TDA6403A
NOTES
2000 Jan 24
39
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For all other countries apply to: Philips Semiconductors,
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5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
69
SCA
© Philips Electronics N.V. 2000
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545004/05/pp40
Date of release: 2000 Jan 24
Document order number: 9397 750 06728
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