TDA8350 [NXP]
DC-coupled vertical deflection and East-West output circuit; 直流耦合垂直偏转和东 - 西输出电路
| 型号： | TDA8350 |
| 厂家： | 
NXP |
| 描述： | DC-coupled vertical deflection and East-West output circuit |
| 文件： | 总16页 (文件大小：118K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA8350Q
DC-coupled vertical deflection and
East-West output circuit
January 1995
Preliminary specification
Supersedes data of September 1991
File under Integrated Circuits, IC02
Philips Semiconductors
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and
East-West output circuit
TDA8350Q
FEATURES
GENERAL DESCRIPTION
• Few external components
The TDA8350Q is a power circuit for use in 90° and 110°
colour deflection systems for field frequencies of 50
to 120 Hz. The circuit provides a DC driven vertical
deflection output circuit, operating as a highly efficient
class G system and an East-West driver for sinking the
diode modulator current.
• Highly efficient fully DC-coupled vertical output bridge
circuit
• Vertical flyback switch
• Guard circuit
• Protection against:
– short-circuit of the output pins
– short-circuit of the output pins to VP
• High EMC immunity due to common mode inputs
• Temperature (thermal) protection
• East-West output stage with one single conversion
resistor.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
DC supply
VP
IP
supply voltage
9
−
25
V
quiescent current
−
30
−
mA
Vertical circuit
IO(p-p)
output current (peak-to-peak value)
−
−
−
3
A
Idiff(p-p)
differential input current
(peak-to-peak value)
600
−
µA
Vdiff(p-p)
differential input voltage
(peak-to-peak value)
−
1.5
1.8
V
Flyback switch
IM
peak output current
−
−
−
−
−
−
±1.5
50
A
V
V
VFB
flyback supply voltage
note 1
60
East-West amplifier
IO(sink)
VO(sink)
Ibias
output current (sink only)
−
−
−
−
−
−
500
40
1
mA
V
peak output voltage
input bias current
IO(sink) = 10 µA
µA
Thermal data (in accordance with IEC 747-1)
Tstg
Tamb
Tvj
storage temperature
−65
−25
−
−
−
−
150
+75
150
°C
°C
°C
operating ambient temperature
virtual junction temperature
Note
1. A flyback supply voltage of >50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22 Ω resistor
(dependent on IO and the inductance of the coil) has to be connected between pin 7 and ground. The decoupling
capacitor of VFB has to be connected between pin 8 and pin 4. This supply voltage line must have a resistance of
33 Ω (see application circuit Fig.5).
January 1995
2
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and
East-West output circuit
TDA8350Q
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
DESCRIPTION
VERSION
TDA8350Q
DBS13P plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm)
SOT141-6
BLOCK DIAGRAM
V
V
V
P
4
O(guard)
10
FB
8
V
P
CURRENT
SOURCE
TDA8350
V
P
9
V
O(A)
V
O(A)
I
S
1
2
I
I
I
drive(pos)
drive(neg)
T
3
V
I(fb)
I
T
V
P
V
I
S
5
V
O(B)
V
O(B)
I
I(set)
13
12
I
I(set)
11
V
O(sink)
I
I(corr)
7
MBC229-1
GND
Fig.1 Block diagram.
January 1995
3
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and
East-West output circuit
TDA8350Q
PINNING
FUNCTIONAL DESCRIPTION
The vertical driver circuit is a bridge configuration. The
deflection coil is connected between the output amplifiers,
which are driven in phase opposition. An external resistor
(RM) connected in series with the deflection coil provides
internal feed back information. The differential input circuit
is voltage driven. The input circuit has been adapted to
enable it to be used with the TDA9150, TDA9151B,
TDA9160A, TDA9162, TDA8366 and TDA8367 which
deliver symmetrical current signals. An external resistor
(RCON) connected between the differential input
determines the output current through the deflection coil.
The relationship between the differential input current and
the output current is defined by: Idiff × RCON = I(coil) × RM.
The output current is adjustable from 0.5 A (p-p) to 3 A
(p-p) by varying RM. The maximum input differential
voltage is 1.8 V. In the application it is recommended that
SYMBOL
PIN
DESCRIPTION
Idrive(pos)
1
input power-stage (positive);
includes II(sb) signal bias
Idrive(neg)
2
input power-stage (negative);
includes II(sb) signal bias
VI(fb)
3
4
5
6
7
8
9
feedback voltage input
supply voltage
VP
VO(B)
n.c.
output voltage B
not connected
GND
VFB
ground
flyback supply voltage
output voltage A
VO(A)
VO(guard)
VO(sink)
10 guard output voltage
V
diff = 1.5 V (typ). This is recommended because of the
spread of input current and the spread in the value of
RCON
11
East-West amplifier driver (sink)
output voltage
.
II(corr)
II(set)
12 East-West amplifier input
correction current (negative)
The flyback voltage is determined by an additional supply
voltage VFB. The principle of operating with two supply
voltages (class G) makes it possible to fix the supply
voltage VP optimum for the scan voltage and the second
supply voltage VFB optimum for the flyback voltage. Using
this method, very high efficiency is achieved.
13 East-West amplifier set input
current (positive)
dbook, halfpage
The supply voltage VFB is almost totally available as
flyback voltage across the coil, this being possible due to
the absence of a decoupling capacitor (not necessary, due
to the bridge configuration). The output circuit is fully
protected against the following:
I
I
1
2
drive(pos)
drive(neg)
V
3
I(fb)
V
P
4
•
•
•
thermal protection
V
5
O(B)
short-circuit protection of the output pins (pins 5 and 9)
short-circuit of the output pins to VP.
n.c.
6
7
GND
TDA8350
A guard circuit VO(guard) is provided. The guard circuit is
activated at the following conditions:
V
8
FB
V
• during flyback
O(A)
9
• during various short-circuit possibilities at the output
pins
V
10
11
12
13
O(guard)
V
O(sink)
• during open loop
I
I(corr)
• when the thermal protection is activated.
I
I(set)
This signal can be used for blanking the picture tube
screen.
MBC226-1
An East-West amplifier is also provided. This amplifier is
an inverting amplifier which is current driven with sink
current only capabilities.
Fig.2 Pin configuration.
January 1995
4
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and
East-West output circuit
TDA8350Q
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
DC supply
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VP
supply voltage
non-operating
−
−
−
40
V
25
50
60
V
V
V
VFB
flyback supply voltage
note 1
Vertical circuit
IO
output current (peak-to-peak value)
output voltage (pin 9)
note 2
note 1
−
−
3
A
V
V
VO(A)
52
62
Flyback switch
IM
peak output current
−
±1.5
A
East-West amplifier
VO(sink)
output voltage
output current
IO(sink) = 10 µA; note 3
−
−
40
V
IO(sink)
VO(sink) = 2 V; note 3
500
mA
Thermal data (in accordance with IEC 747-1)
Tstg
storage temperature
−65
−25
−
150
+75
150
4
°C
Tamb
Tvj
operating ambient temperature
virtual junction temperature
resistance vj-case
°C
°C
Rth vj-c
Rth vj-a
tsc
−
K/W
K/W
hr
resistance vj-ambient in free air
short-circuiting time
−
40
1
note 4
−
Notes
1. A flyback supply voltage of >50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22 Ω resistor
(dependent on IO and the inductance of the coil) has to be connected between pin 7 and ground. The decoupling
capacitor of VFB has to be connected between pin 8 and pin 4. This supply voltage line must have a resistance of
33 Ω (see application circuit Fig.5).
2. IO maximum determined by current protection.
3. The operating area is limited by a straight line between the points VO(sink) = 40 V; IO(sink) = 10 µA and VO(sink) = 2 V;
IO(sink) = 500 mA.
4. Up to Vp = 18 V.
January 1995
5
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and
East-West output circuit
TDA8350Q
CHARACTERISTICS
VP = 17.5 V; VFB = 45 V; VO(sink) = 20 V; fi = 50 Hz; II(sb) = 400 µA; Tamb = 25°C; measured in test circuit of Fig.3; unless
otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
DC supply
VP
operating supply voltage
flyback supply voltage
9
−
25
V
VFB
Vp
−
−
50
60
55
V
note 1
−
V
IP
supply current
no signal; no load
−
30
mA
Vertical circuit
VO
LE
output voltage swing (scan)
Idiff = 0.6 mA (p-p);
19.8
−
−
V
V
diff = 1.8 V (p-p);
IO = 3 A (p-p)
linearity error
IO = 3 A (p-p);
−
−
−
1
2
2
−
%
%
V
IO = 50 mA (p-p); note 2
1
VO
output voltage swing (flyback)
VO(A) - VO(B)
Idiff = 0.3 mA;
IO = 1.5 A (M)
39
VDF
|Ios|
forward voltage of the internal
IO = −1.5 A (M);
Idiff = 0.3 mA
−
−
−
−
−
−
−
−
1.5
30
18
72
V
efficiency diode (VO(A) - VFB
)
output offset current
Idiff = 0;
mA
mV
µV/K
I
I(sb) = 50 to 500 µA
|Vos|
∆VosT
offset voltage at the input of the
feedback amplifier VI(fb) - VO(B)
Idiff = 0;
II(sb) = 50 to 500 µA
output offset voltage as a function Idiff = 0;
of temperature
VO(A)
Gv
DC output voltage
Idiff = 0; note 3
−
−
−
8
−
−
−
V
open loop voltage gain (V9-5/V1-2
)
notes 4 and 5
note 4
80
80
dB
dB
open loop voltage gain (V9-5/V3-5
V1-2 = 0)
;
VR
voltage ratio V1-2/V3-5
−
−
−
−
0
−
dB
Hz
fres
GI
frequency response (−3 dB)
note 6
40
−
current gain (IO/Idiff
)
5000
−
10−4
∆GIT
current gain drift as a function of
temperature
−
/K
II(sb)
signal bias current
50
−
400
−
500
100
−
µA
µA
dB
V
IFB
flyback supply current
power supply ripple rejection
DC voltage at the input
common mode input voltage
input bias current
during scan
note 7
PSRR
VI(DC)
VI(CM)
Ibias
−
80
2.7
−
−
−
II(sb) = 0
II(sb) = 0
0
1.6
0.5
−
V
−
0.1
0.2
µA
mA
IO(CM)
common mode output current
∆II(sb) = 300 µA (p-p);
−
fi = 50 Hz; Idiff = 0
January 1995
6
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and
East-West output circuit
TDA8350Q
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
East-West amplifier
VO(sink)
saturation voltage
IO(sink) = 500 mA;
−
2.0
2.5
V
II(corr) = 0 µA; note 8
Gv
fres
LE
open loop voltage gain (V11/V12)
frequency response (−3 dB)
linearity error
−
−
−
−
−
−
−
−
47
−
dB
Hz
%
4000
−
VO(sink) = 3 V
−
−
−
1
1
−
1
VO(sink) = 10 V; note 2
0.5
2
%
Ibias
input bias current (pin 12)
DC input voltage
µA
V
VI(DC)
Iset
−
offset voltage set current
−
mA
V
V13-7
maximum allowed voltage at
pin 13
0.3
Guard circuit
IO
output current
not active;
−
−
50
µA
VO(guard) = 0 V
output current
active; VO(guard) = 4.5 V
1
−
−
−
−
−
2.5
5.5
40
mA
V
VO(guard)
output voltage
IO = 100 µA
allowable voltage on pin 10
maximum leakage
V
current = 10 µA
Notes
1. A flyback supply voltage of >50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22 Ω resistor
(dependent on IO and the inductance of the coil) has to be connected between pin 7 and ground. The decoupling
capacitor of VFB has to be connected between pin 8 and pin 4. This supply voltage line must have a resistance of
33 Ω (see application circuit Fig.5).
2. The linearity error is measured without S-correction and based on the same measurement principle as performed on
the screen. The measuring method is as follows:
Divide the output signal I5 - I9 (VRM) into 22 equal parts ranging from 1 to 22 inclusive. Measure the value of two
succeeding parts called one block starting with part 2 and 3 (block 1) and ending with part 20 and 21 (block 10). Thus
part 1 and 22 are unused. The equations for linearity error for adjacent blocks (LEAB) and not adjacent blocks (NAB)
are given below;
ak – a(k + 1)
amax – amin
-----------------------------
aavg
LEAB =
; NAB =
-----------------------------
aavg
3. Referenced to VP.
4. V values within formulae, relate to voltages at or between relative pin numbers, i.e. V9-5/V1-2 = voltage value across
pins 9 and 5 divided by voltage value across pins 1 and 2.
5. V3-5 AC short-circuited.
6. Frequency response V9-5/V3-5 is equal to frequency response V9-5/V1-2
.
7. At V(ripple) = 500 mV eff; measured across RM; fi = 50 Hz.
8. The output pin 11 requires a capacitor of minimum value 68 nF.
January 1995
7
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and
East-West output circuit
TDA8350Q
V
FB
h
V
O(guard)
10
8
4
V
P
I
I(sb)
TDA8350
signal
bias
9
3
5
1
2
I
R = 6.2 Ω
drive(pos)
R
FEEDBACK
PULSE
CON
3 kΩ
I
diff
R
= 0.6 Ω
M
I
drive(neg)
V
signal
bias
I
I(sb)
EAST WEST-AMPLIFIER
12
36 Ω
I
I(corr)
V
O(sink)
I
SET
68
nF
13
7
GND
68 kΩ
MBC228
Fig.3 Test circuit.
January 1995
8
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and
East-West output circuit
TDA8350Q
APPLICATION INFORMATION
V
V
FB
V
O(guard)
10
8
4
P
I
I(sb)
100
nF
TDA8350
signal
bias
V
9
3
5
O(A)
deflection coil
AT6005/31
L = 8.63 mH
R = 5.0 Ω
1
2
I
(coil)
I
drive(pos)
V
V
I(fb)
R
FEEDBACK
PULSE
CON
I
diff
3 kΩ
R
= 0.7 Ω
I
M
drive(neg)
O(B)
V
signal
bias
I
I(sb)
EAST WEST-AMPLIFIER
to line
output stage
V
12
I
I(corr)
O(sink)
I
SET
68
nF
13
7
GND
68 kΩ
MBC227
VP = 14 V; IO(p-p) = 2.14 A; II(sb) = 400 µA; Idiff(p-p) = 500 µA; VFB = 42 V; tFB = 0.6 ms.
Fig.4 Application diagram.
January 1995
9
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and
East-West output circuit
TDA8350Q
V
o
FB
V
O(guard)
10
8
4
V
P
I
I(sb)
100
nF
TDA8350
signal
bias
V
9
3
O(A)
1
2
deflection coil
AT6005/31
L = 8.63 mH
R = 5.0 Ω
I
I
220
nF
(coil)
drive(pos)
V
V
I(fb)
R
FEEDBACK
PULSE
CON
I
diff
3 kΩ
20
Ω
R
= 0.7 Ω
M
I
drive(neg)
V
5
signal
bias
O(B)
I
I(sb)
EAST WEST-AMPLIFIER
to line
12
output stage
V
I
I(corr)
O(sink)
I
SET
68
nF
13
7
GND
68 kΩ
MGC054
VP = 14 V; IO(p-p) = 2.14 A; II(sb) = 400 µA; Idiff(p-p) = 500 µA; VFB = 60 V; tFB = 0.4 ms.
Fig.5 Application circuit; 50 V ≤ VFB ≤ 60 V.
January 1995
10
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and
East-West output circuit
TDA8350Q
PACKAGE OUTLINE
24.4
23.6
20.0
19.6
4.7
4.1
0.05 convex
10
mounting
base
A
12.4 3.4
11.6 3.1
6
17.0
15.5
13 12 11 10
9
8
7
6
5
4
3
2
1
2.4
1.6
13
11
2.1
1.8
2.20
1.45
0.75
0.60
0.55
0.35
0.25
1.7
0.8
A
M
M
(13x)
(13x)
(12x)
3.4
MBC369
5.08
4.3
Dimensions in mm.
Fig.6 Plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm); (DBS13P; SOT141-6).
January 1995
11
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and
East-West output circuit
TDA8350Q
specified storage maximum. If the printed-circuit board has
been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within
the permissible limit.
SOLDERING
Plastic DIL-bent-SIL packages
BY DIP OR WAVE
The maximum permissible temperature of the solder is
260 °C; this temperature must not be in contact with the
joint for more than 5 s. The total contact time of successive
solder waves must not exceed 5 s.
REPAIRING SOLDERED JOINTS
Apply the soldering iron below the seating plane (or not
more than 2 mm above it). If its temperature is below
300 °C, it must not be in contact for more than 10 s; if
between 300 and 400 °C, for not more than 5 s.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
January 1995
12
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and
East-West output circuit
TDA8350Q
NOTES
January 1995
13
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and
East-West output circuit
TDA8350Q
NOTES
January 1995
14
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and
East-West output circuit
TDA8350Q
NOTES
January 1995
15
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Sweden: Kottbygatan 7, Akalla. S-164 85 STOCKHOLM,
Tel. (0)8-632 2000, Fax. (0)8-632 2745
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Tel. (01)488 2211, Fax. (01)481 77 30
Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West
Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978,
TAIPEI 100, Tel. (02)388 7666, Fax. (02)382 4382.
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
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Bangkok 10260, THAILAND,
Tel. (662)398-0141, Fax. (662)398-3319.
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Tel. (0212)279 2770, Fax. (0212)269 3094
United Kingdom: Philips Semiconductors LTD.,
276 Bath Road, Hayes, MIDDLESEX UB3 5BX,
Tel. (081)730-5000, Fax. (081)754-8421
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Uruguay: Coronel Mora 433, MONTEVIDEO,
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Ireland: Newstead, Clonskeagh, DUBLIN 14,
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For all other countries apply to: Philips Semiconductors,
International Marketing and Sales, Building BE-p,
P.O. Box 218, 5600 MD, EINDHOVEN, The Netherlands,
Telex 35000 phtcnl, Fax. +31-40-724825
Italy: PHILIPS SEMICONDUCTORS S.r.l.,
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Tel. (0039)2 6752 2531, Fax. (0039)2 6752 2557
Japan: Philips Bldg 13-37, Kohnan2-chome, Minato-ku, TOKYO 108,
SCD36
© Philips Electronics N.V. 1994
Tel. (03)3740 5028, Fax. (03)3740 0580
Korea: (Republic of) Philips House, 260-199 Itaewon-dong,
All rights are reserved. Reproduction in whole or in part is prohibited without the
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533061/1500/02/pp16
Date of release: January 1995
9397 744 70011
Norway: Box 1, Manglerud 0612, OSLO,
Tel. (022)74 8000, Fax. (022)74 8341
Document order number:
Philips Semiconductors
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