TDA8708B [NXP]
Video analog input interface; 模拟视频输入接口
| 型号： | TDA8708B |
| 厂家： | 
NXP |
| 描述： | Video analog input interface |
| 文件： | 总24页 (文件大小：131K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA8708B
Video analog input interface
1996 Nov 26
Product specification
Supersedes data of June 1994
File under Integrated Circuits, IC02
Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
FEATURES
APPLICATIONS
• 8-bit resolution
• Video signal decoding
• Sampling rate up to 32 MHz
• Scrambled TV (encoding and decoding)
• Digital picture processing
• Frame grabbing.
• Binary or two’s complement 3-state TTL outputs
• TTL-compatible digital inputs and outputs
• Internal reference voltage regulator
• Power dissipation of 365 mW (typical)
• Input selector circuit (one out of three video inputs)
GENERAL DESCRIPTION
The TDA8708B is an analog input interface for video signal
processing. It includes a video amplifier with clamp and
gain control, an 8-bit Analog-to-Digital Converter (ADC)
with a sampling rate of 32 MHz and an input selector.
• Clamp and Automatic Gain Control (AGC) functions for
CVBS and Y signals
• No sample-and-hold circuit required
• The TDA8708B has no white peak control in mode 2
whereas the TDA8708A has control in modes 1 and 2
• In-range output (not TTL levels).
QUICK REFERENCE DATA
SYMBOL
PARAMETER
analog supply voltage
MIN.
4.5
TYP.
5.0
MAX.
5.5
UNIT
VCCA
VCCD
VCCO
ICCA
ICCD
ICCO
ILE
V
V
V
digital supply voltage
4.5
4.2
−
5.0
5.0
37
24
12
−
5.5
5.5
45
30
16
±1
±0.5
−
TTL output supply voltage
analog supply current
mA
digital supply current
−
mA
TTL output supply current
DC integral linearity error
DC differential linearity error
maximum clock frequency
maximum −3 dB bandwidth (AGC amplifier)
total power dissipation
−
mA
−
LSB
LSB
MHz
MHz
mW
DLE
−
−
fclk(max)
B
30
12
−
32
18
365
−
Ptot
500
ORDERING INFORMATION
TYPE NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
TDA8708BT
SO28
plastic small outline package; 28 leads; body width 7.5 mm
SOT136-1
1996 Nov 26
2
Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
BLOCK DIAGRAM
analog
voltage
output
video input video input
selection bit 0 selection bit 1
ADC
input
clock decoupling
input input
TTL outputs V
7
(+ 5 V)
CCO
14
15
19 20
5
21
VIDEO
AMPLIFIER
output format/
chip enable
(3-state input)
D7
16
17
18
9
video input 0
video input 1
video input 2
8 - bit
ADC
INPUT
SELECTOR
AMP.
1
2
3
D6
D5
D4
D3
D2
D1
D0
24
25
clamp capacitor
connection
TTL
OUTPUTS
4
10
11
12
13
AGC capacitor
connection
TDA8708B
PEAK LEVEL
DIGITAL COMPARATOR
AGC &
CLAMP
LOGIC
&
BLACK LEVEL
DIGITAL COMPARATOR
MODE
SELECTION
in-range
output
28
SYNC LEVEL
DIGITAL COMPARATOR
27
26
6
8
22
23
MSA672
sync level
sync pulse
black level digital V
digital
ground
analog V
(+ 5 V)
analog
ground
CCD
CCA
sync pulse
(+ 5 V)
Fig.1 Block diagram.
1996 Nov 26
3
Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
PINNING
SYMBOL PIN
DESCRIPTION
D7
1
2
3
4
5
6
7
8
9
data output; bit 7 (MSB)
data output; bit 6
D6
D5
data output; bit 5
D4
data output; bit 4
CLK
VCCD
VCCO
DGND
OF
clock input
D7
1
2
3
4
5
6
7
8
9
IR
28
digital supply voltage (+5 V)
TTL outputs supply voltage (+5 V)
digital ground
27 GATE A
D6
D5
GATE B
AGC
26
25
D4
output format/chip enable
(3-state input)
CLK
24 CLAMP
23 AGND
D3
10 data output; bit 3
V
CCD
D2
11 data output; bit 2
V
22
V
CCA
CCO
TDA8708B
D1
12 data output; bit 1
21 DEC
DGND
OF
D0
13 data output; bit 0 (LSB)
14 video input selection bit 0
15 video input selection bit 1
16 video input 0
20 ADCIN
19 ANOUT
I0
D3 10
D2 11
D1 12
I1
VIN2
VIN1
VIN0
18
17
16
VIN0
VIN1
VIN2
ANOUT
ADCIN
DEC
VCCA
AGND
CLAMP
AGC
GATE B
GATE A
IR
17 video input 1
18 video input 2
D0
I0
13
14
19 analog voltage output
20 analog-to-digital converter input
21 decoupling input
15 I1
MSA671
22 analog supply voltage (+5 V)
23 analog ground
24 clamp capacitor connection
25 AGC capacitor connection
26 black level synchronization pulse
27 sync level synchronization pulse
28 in-range output
Fig.2 Pin configuration.
1996 Nov 26
4
Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
The voltage across the capacitor connected to the AGC
pin controls the gain of the video amplifier. This is the gain
control loop.
FUNCTIONAL DESCRIPTION
The TDA8708B provides a simple interface for decoding
video signals.
The sync level comparator is active during a positive-going
pulse at the GATE A input. This means that the sync pulse
of the composite video signal is used as an amplitude
reference. The bottom of the sync pulse is adjusted to
obtain a digital output of logic 0 at the converter output.
As the black level is at digital level 64, the sync pulse will
have a digital amplitude of 64 LSBs.
The TDA8708B operates in configuration mode 1
(see Fig.4) when the video signals are weak (i.e. when the
gain of the AGC amplifier has not yet reached its optimum
value). This enables a fast recovery of the synchronization
pulses in the decoder circuit. When the pulses at the
GATE A and GATE B inputs become distinct (GATE A and
GATE B pulses are synchronization pulses occurring
during the sync period and rear porch respectively) the
TDA8708B automatically switches to configuration mode 2
(see Fig.5).
The use of nominal signals will prevent the output from
exceeding a digital code of 213.
The clamp level control is accomplished by using the same
techniques as used for the gain control. The black-level
digital comparator is active during a positive-going pulse at
the GATE B input. The clamp capacitor will be charged or
discharged to adjust the digital output to code 64.
When the TDA8708B is in configuration mode 1, the gain
of the AGC amplifier will be roughly adjusted (sync level to
a digital output level of 0 and the peak level to a digital
output level of 255).
In configuration mode 2 the digital output of the ADC is
compared to internal digital reference levels.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER
VCCA
MIN.
−0.3
MAX.
+7.0
UNIT
analog supply voltage
digital supply voltage
V
V
V
VCCD
VCCO
∆VCC
−0.3
−0.3
+7.0
+7.0
TTL output supply voltage
supply voltage differences:
V
V
V
CCA − VCCD
CCO − VCCD
CCA − VCCO
−1.0
−1.0
−1.0
−0.3
0
+1.0
+1.0
+1.0
VCCA
+10
V
V
V
V
VI
input voltage
IO
output current
mA
°C
°C
°C
Tstg
Tamb
Tj
storage temperature
operating ambient temperature
junction temperature
−55
0
+150
+70
0
+125
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
VALUE
UNIT
Rth j-a
thermal resistance from junction to ambient in free air
70
K/W
1996 Nov 26
5
Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
CHARACTERISTICS
VCCA = V22 to V23 = 4.5 to 5.5 V; VCCD = V6 to V8 = 4.5 to 5.5 V; VCCO = V7 to V8 = 4.2 to 5.5 V; AGND and DGND
shorted together; VCCA to VCCD = −0.5 to +0.5 V; VCCO to VCCD = −0.5 to +0.5 V; VCCA to VCCO = −0.5 to +0.5 V;
Tamb = 0 to +70 °C; typical readings taken at VCCA = VCCD = VCCO = 5 V and Tamb = 25 °C; unless otherwise specified.
SYMBOL
Supplies
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
VCCA
VCCD
VCCO
ICCA
analog supply voltage
4.5
5.0
5.0
5.0
37
5.5
V
digital supply voltage
TTL output supply voltage
analog supply current
digital supply current
4.5
4.2
−
5.5
5.5
45
V
V
mA
mA
mA
ICCD
−
24
30
ICCO
TTL output supply current
TTL load (see Fig.8)
−
12
16
Video amplifier inputs
VIN0 TO VIN2 INPUTS
VI(p-p)
input voltage (peak-to-peak value)
AGC load with external
capacitor; note 1
0.6
−
1.5
V
Zi
input impedance
input capacitance
fi = 6 MHz
fi = 6 MHz
10
20
1
−
−
kΩ
Ci
−
pF
I0 AND I1 TTL INPUTS (see Table 1)
VIL
VIH
IIL
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
0
−
−
−
−
0.8
VCCD
−
V
2.0
−400
−
V
VI = 0.4 V
VI = 2.7 V
µA
µA
IIH
20
GATE A AND GATE B TTL INPUTS (see Figs 4 and 5)
VIL
VIH
IIL
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
pulse width
0
−
−
−
−
−
0.8
VCCD
−
V
2.0
−400
−
V
VI = 0.4 V
VI = 2.7 V
see Fig.5
µA
µA
µs
IIH
tW
20
−
2
AGC INPUT (PIN 25)
V25(min)
V25(max)
AGC voltage for minimum gain
−
−
2.8
4.0
−
−
V
V
AGC voltage for maximum gain
AGC output current
see Table 2
CLAMP INPUT (PIN 24)
V24
I24
clamp voltage for code 128 output
clamp output current
−
3.5
−
V
see Table 3
1996 Nov 26
6
Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
Video amplifier outputs
ANOUT OUTPUT (PIN 19)
V19(p-p)
AC output voltage
(peak-to-peak value)
VVIN = 1.33 V (p-p);
V25 = 3.6 V
−
1.33
−
V
I19
internal current source
RL = ∞
2.0
2.5
−
mA
mA
IO(p-p)
output current driven by the load
VANOUT = 1.33 V (p-p);
note 2
−
−
1.0
V19
Z19
DC output voltage for black level
output impedance
note 3
−
−
V
CCA − 2.24
−
−
V
20
Ω
Video amplifier dynamic characteristics
αct
crosstalk between VIN inputs
differential gain
VCCA = 4.75 to 5.25 V
−
−
−50
−45
dB
%
Gdiff
VVIN = 1.33 V (p-p);
V25 = 3.6 V
2
−
ϕdiff
differential phase
VVIN = 1.33 V (p-p);
V25 = 3.6 V
−
0.8
−
deg
B
−3 dB bandwidth
12
60
−
−
−
MHz
dB
dB
dB
%
S/N
signal-to-noise ratio
supply voltage ripple rejection
gain range
note 4
−
−
SVRR1
∆G
note 5
45
−
−
see Fig.10
−4.5
−
+6.0
5
Gstab
gain stability as a function of supply see Fig.10
voltage and temperature
−
Analog-to-digital converter inputs
CLK INPUT (PIN 5)
VIL
VIH
IIL
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
input impedance
0
−
0.8
VCCD
−
V
2.0
−400
−
−
V
Vclk = 0.4 V
Vclk = 2.7 V
fclk = 10 MHz
fclk = 10 MHz
−
µA
µA
kΩ
pF
IIH
|Zi|
CI
−
100
−
−
4
input capacitance
−
4.5
−
OF INPUT (3-STATE; see Table 4)
VIL
VIH
V9
IIL
LOW level input voltage
0
−
0.2
VCCD
−
V
HIGH level input voltage
input voltage in high impedance state
LOW level input current
2.6
−
−
V
1.15
−300
300
V
−370
−
−
µA
µA
IIH
HIGH level input current
450
1996 Nov 26
7
Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
ADCIN INPUT (PIN 20; see Table 5)
V20
input voltage
input voltage
digital output = 00
digital output = 255
−
−
−
V
CCA − 2.42 −
CCA − 1.41 −
V
V
V
V20
V
V20(p-p)
input voltage amplitude
(peak-to-peak value)
1.0
−
I20
Zi
input current
−
−
−
1.0
50
1
10
−
µA
MΩ
pF
input impedance
input capacitance
fi = 6 MHz
fi = 6 MHz
Ci
−
Analog-to-digital converter outputs
IR OUTPUT (PIN 28)
VOL
VOH
IO
LOW level output voltage
HIGH level output voltage
output current
−
−
−
−
1.7
−
V
1.9
V
−500
−
µA
DIGITAL OUTPUTS D0 TO D7
VOL
VOH
IOZ
LOW level output voltage
IOL = 2 mA
0
−
−
−
0.6
V
HIGH level output voltage
IOL = −0.4 mA
0.4 V < VO < VCCD
2.4
−20
VCCD
+20
V
output current in 3-state mode
µA
Switching characteristics
fclk(max) maximum clock input frequency
see Fig.6; note 6
30
32
2
−
−
MHz
%
Analog signal processing (fclk = 32 MHz); see Fig.8
Gdiff
differential gain
V20 = 1.0 V (p-p);
see Fig.7; note 7
−
ϕdiff
f1
differential phase
see Fig.7; note 7
−
−
−
2
−
0
−
deg
dB
fundamental harmonics (full-scale)
fi = 4.43 MHz; note 7
fi = 4.43 MHz; note 7
−
fall
harmonics (full-scale);
all components
−55
dB
SVRR2
supply voltage ripple rejection
note 8
note 9
−
1
5
%/V
Transfer function (see Fig.8)
ILE
DLE
ILE
DC integral linearity error
−
−
−
−
−
−
±1
LSB
LSB
LSB
DC differential linearity error
AC integral linearity error
±0.5
±2
Timing (fclk = 32 MHz) see Figs 6, 7 and 8
DIGITAL OUTPUTS (CL = 15 pF; IOL = 2 mA; RL = 2 kΩ)
tds
th
sampling delay time
−
6
−
−
−
2
−
ns
ns
ns
ns
ns
output hold time
8
−
td
output delay time
16
19
14
20
25
20
tdEZ
tdDZ
3-state delay time; output enable
3-state delay time; output disable
1996 Nov 26
8
Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
Notes
1. 0 dB is obtained at the AGC amplifier when applying Vi(p-p) = 1.33 V.
2. The output current at pin 19 should not exceed 1 mA. The load impedance RL should be referenced to VCCA and
defined as:
a) AC impedance ≥1 kΩ and the DC impedance >2.7 kΩ.
b) The load impedance should be coupled directly to the output of the amplifier so that the DC voltage supplied by
the clamp is not disturbed.
3. Control mode 2 is selected.
VANOUTC (p – p)
S
N
4. Signal-to-noise ratio measured with 5 MHz bandwidth:
5. The voltage ratio is expressed as:
= 20 log
at B = 5 MHz .
------------------------------------------------
VANOUTY (RMS noise)
---
∆VCCA
G
SVRR1 = 20 log
×
for VI = 1 V (p-p), gain at 100 kHz = 1 and 1 V supply variation.
----------------- --------
VCCA ∆ G
6. It is recommended that the rise and fall times of the clock are ≥2 ns. In addition, a ‘good layout’ for the digital and
analog grounds is recommended.
7. These measurements are realized on analog signals after a digital-to-analog conversion (TDA8702 is used).
8. The supply voltage rejection is the relative variation of the analog signal (full-scale signal at input) for 1 V of supply
variation:
∆ (VI (00) – VI (FF) ) + (VI (00) – VI (FF)
)
SVRR2 =
-----------------------------------------------------------------------------------------------------
∆VCCA
9. Full-scale sine wave (fi = 4.4 MHz; fclk = 27 MHz).
1996 Nov 26
9
Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
Table 1 Video input selection (CVBS)
Table 3 CLAMP output current
I1
I0
SELECTED INPUT
DIGITAL
GATE A GATE B
OUTPUT
ICLAMP
MODE
0
0
1
1
0
1
0
1
VIN0
VIN1
VIN2
VIN2
1
1
output < 0
output > 0
X
130 µA
−2.5 µA
0 µA
1
1
2
2
2
X(1)
0
0
1
output < 64
64 < output
+50 µA
−50 µA
Table 2 AGC output current
DIGITAL
OUTPUT
Note
1. X = don't care.
GATE A GATE B
IAGC
MODE(1)
1
1
output < 255 −2.5 µA
output > 255 130 µA
1
1
2
2
2
Table 4 OF input coding
0
1
X(2)
0
−
0 µA
OF
D0 TO D7
output < 0
output > 0
+2.5 µA
−2.5 µA
0
active, two’s complement
high impedance
1
open circuit(1)
active, binary
Notes
1. Mode 2 can only be initialized with successive pulses
on GATE A and GATE B (see Fig.5).
Note
1. Use C ≥ 10 pF to DGND.
2. X = don’t care.
Table 5 Output coding and input voltage (typical values)
BINARY OUTPUTS
TWO’S COMPLEMENT
STEP
VADCIN
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
Underflow
−
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
1
.
1
1
1
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
1
.
0
V
CCA − 2.41 V
1
−
.
.
−
−
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
254
−
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
255
V
CCA − 1.41 V
Overflow
−
1996 Nov 26
10
Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
0.25 V
5 MHz sine wave
1.0 V
0.25 V
MBB959
64 µs
Fig.3 Test signal on the ADCIN pin for differential gain and phase measurements.
k
digital
MBB969
output
level
peak-level gain control
255
black-level
clamping
sync-level gain control
0
time
GATE A
GATE B
MODE 1
Fig.4 Control mode 1.
11
1996 Nov 26
Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
digital
MSA674
output
level
255
black-level
clamping
64
sync-level control
0
t
W
time
GATE A
t
W
GATE B
MODE 2
Fig.5 Control mode 2.
clock input
reference level
(1.5 V)
CLK
input
t
ds
sample
sample
N
1
N
2
sample
N
sample
N
analog
input
1
(ADCIN)
t
h
2.4 V
data
data N
3
data N
2
data N
1
data N
data N
1
outputs
D0 to D7)
0.4 V
MBB958
t
d
Fig.6 Timing diagram for data output.
12
1996 Nov 26
Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
OF
open
input
2.4 V
0.4 V
data
outputs
(D0 to D7)
high impedance
binary
two's complement
t
t
MBB968
dDZ
dEZ
Fig.7 Output format timing diagram.
V
CCO
2 kΩ
handbook, halfpage
D0 to D7
15 pF
IN916
or
IN3064
MBD865
DGND
Fig.8 Load circuit for timing measurement; data outputs (OF = LOW or open-circuit).
13
1996 Nov 26
Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
V
CCO
handbook, halfpage
2 kΩ
S1
D0 to D7
C
5
kΩ
IN916
or
IN3064
S2
MBB955
DGND
Fig.9 Load circuit for timing measurement; 3-state outputs (OF: fi = 1 MHz; VOF = 3 V).
MSA676
12
G
(dB)
8
5 %
4
0
(1)
(2)
4
8
2.6
3
3.4
3.8
4.2
4.6
(V)
V
25
(1) Typical value (VCCA = VCCD = 5 V; Tamb = 25 °C).
(2) Minimum and maximum values (temperature and supply).
Fig.10 Gain control curve.
14
1996 Nov 26
pin 25
AGC
pin 28
IR
pins 26 or 27
GATE A or GATE B
V
V
V
CCA
V
CCO
CCD
CCD
V
CCD
pins 1 to 4
and 10 to 13
data outputs
pin 6
V
CCD
DGND
pin 7
V
CCO
DGND
AGND
V
pin 22
V
V
CCD
CCA
DGND
pin 24
CLAMP
DGND
CCA
pin 5
clock input
1.5 V
DGND
TDA8708B
I
1
pin 8
DGND
I
I
1
V
2
CCD
4 V
BE
pin 23
AGND
chip enable
AGND
V
pin 9
OF
CCA
binary/
two's complement
V
CCA
V
REF
V
V
CCA
CCA
V
V
top
DGND
V
CCA
mid
20
kΩ
pins 14 or 15
I
,I
0
1
V
REF
2.5
mA
V
bottom
AGND
AGND
AGND
AGND
AGND
MSA675
pins 16 to 18
VIN0, VIN1 and VIN2
pin 19
ANOUT
pin 20
ADCIN
pin 21
DEC
ahdnbok,uflapegwidt
Fig.11 Internal pin configuration.
Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
APPLICATION INFORMATION
Additional information can be found in the laboratory report of TDA8708A “FBL/AN9308”.
(2)
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
horizontal sync
horizontal clamp
2
data outputs
3
220 nF
4
33 pF
18 nF
100 Ω
clock
5 V
5
6
22 nF
22 nF
1 µF
10 nF
1µH
(1)
7
5 V
22 Ω
TDA8708B
8
5 V
1 µF
9
10 pF
LOW PASS
FILTER
(3)
10
11
12
13
14
4.7 µF
data outputs
4.7 µF
75 Ω
4.7 µF
75 Ω
75 Ω
MSA673
(1) It is recommended to decouple VCCO through a 22 Ω resistor especially when the output data of TDA8708B interfaces with a capacitive CMOS load
device.
(2) When IR is not used, it must be connected to ground via a 47 pF capacitor.
(3) See Figs 13 and 15 for examples of the low-pass filters.
Fig.12 Application diagram.
1996 Nov 26
16
Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
22 µH
22 µH
12 pF
12 pF
680 Ω
ANOUT
(pin 19)
ADCIN
(pin 20)
2.2 kΩ
27 pF
V
V
i
o
27 pF
68 pF
MBB966 - 1
V
CCA
(pin 22)
This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680 Ω and 2.2 kΩ
must in any event be applied.
Fig.13 Example of a low-pass filter for CVBS and Y signals.
Characteristics of Fig.14:
• Order 5; adapted CHEBYSHEV
MSA682
• Ripple ρ ≤ 0.4 dB
• f = 6.5 MHz at −3 dB
• fnotch = 9.75 MHz.
0
handbook, halfpage
α
(dB)
40
80
120
160
0
10
20
30
f (MHz)
Fig.14 Frequency response for filter shown in
Fig.13.
1996 Nov 26
17
Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
82 µH
680 Ω
ADOUT
ADCIN
(pin 20)
h
(pin 19)
2.2 kΩ
15 pF
V
V
i
o
15 pF
MSA678
V
CCA
(pin 22)
This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680 Ω and 2.2 kΩ
must in any event be applied.
Fig.15 Example of an economical low-pass filter for CVBS and Y signals.
Characteristics of Fig.16:
• Order 5; adapted CHEBYSHEV
MSA681
• Ripple ρ ≤ 0.4 dB
0
handbook, halfpage
α
• f = 6.5 MHz at −3 dB.
(dB)
10
20
30
40
0
10
20
30
f (MHz)
Fig.16 Frequency response for filter shown in
Fig.15.
1996 Nov 26
18
Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
PACKAGE OUTLINE
SO28: plastic small outline package; 28 leads; body width 7.5 mm
SOT136-1
D
E
A
X
c
y
H
v
M
A
E
Z
28
15
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
14
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.30
0.10
2.45
2.25
0.49
0.36
0.32
0.23
18.1
17.7
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
mm
2.65
1.27
0.050
1.4
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.71
0.014 0.009 0.69
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches 0.10
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-01-24
97-05-22
SOT136-1
075E06
MS-013AE
1996 Nov 26
19
Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
SOLDERING
Introduction
Wave soldering
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
• The package footprint must incorporate solder thieves at
the downstream end.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Reflow soldering
Reflow soldering techniques are suitable for all SO
packages.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Repairing soldered joints
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
1996 Nov 26
20
Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1996 Nov 26
21
Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
NOTES
1996 Nov 26
22
Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
NOTES
1996 Nov 26
23
Philips Semiconductors – a worldwide company
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Romania: see Italy
Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. +1 800 234 7381
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,
Tel. +7 095 247 9145, Fax. +7 095 247 9144
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Tel. +45 32 88 2636, Fax. +45 31 57 1949
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Tel. +90 212 279 2770, Fax. +90 212 282 6707
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20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557
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Tel. +81 3 3740 5130, Fax. +81 3 3740 5077
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MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421
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Tel. +1 800 234 7381
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For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Internet: http://www.semiconductors.philips.com
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
© Philips Electronics N.V. 1996
SCA52
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
537021/1200/04/pp24
Date of release: 1996 Nov 26
Document order number: 9397 750 01456
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