TDA8709A [NXP]
Video analog input interface; 模拟视频输入接口
| 型号： | TDA8709A |
| 厂家： | 
NXP |
| 描述： | Video analog input interface |
| 文件： | 总28页 (文件大小：172K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA8709A
Video analog input interface
June 1994
Product specification
Supersedes data of April 1993
File under Integrated Circuits, IC02
Philips Semiconductors
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
FEATURES
GENERAL DESCRIPTION
• 8-bit resolution
The TDA8709A is an analog input interface for video signal
processing. It includes a an input selector
• Sampling rate up to 32 MHz
(one out-of-three video signals), video amplifier with clamp
and external gain control, an 8-bit analog-to-digital
converter (ADC) with a sampling rate of 32 MHz and an
input selector.
• TTL-compatible digital inputs and outputs
• Internal reference voltage regulator
• Low-level AC clock inputs and outputs
• Clamp function with selection for ‘16’ or ‘128’
• No sample-and-hold circuit required
• Three selectable video inputs.
APPLICATIONS
• Video signal processing
• Digital picture processing
• Frame grabbing.
• Colour difference signals (U, V)
• R, G, B signals
• Chrominance signal (C).
QUICK REFERENCE DATA
SYMBOL
VCCA
PARAMETER
MIN.
4.5
TYP.
5.0
MAX.
5.5
UNIT
analog supply voltage
V
V
V
VCCD
VCCO
ICCA
ICCD
ICCO
ILE
digital supply voltage
4.5
4.2
−
5.0
5.0
40
24
12
−
5.5
5.5
47
30
16
±1
±0.5
−
TTL output supply voltage
analog supply current
mA
digital supply current
−
mA
TTL output supply current
DC integral linearity error
DC differential linearity error
maximum clock frequency
maximum −3 dB bandwidth (preamplifier)
total power dissipation
−
mA
−
LSB
LSB
MHz
MHz
mW
DLE
fclk(max)
B
−
−
30
12
−
32
18
380
−
Ptot
512
ORDERING INFORMATION
TYPE NUMBER
PACKAGE
PINS
PIN POSITION
MATERIAL
CODE
TDA8709A
28
28
DIP
plastic
plastic
SOT117-1
SOT136-1
TDA8709AT
SO28L
June 1994
2
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
BLOCK DIAGRAM
analog
voltage
output
video input video input
selection bit 0 selection bit 1
ADC
input
clock decoupling
input input
TTL outputs V
7
(+ 5 V)
CCO
14
15
20
21
19
5
VIDEO
AMPLIFIER
16
17
18
9
fast output
chip enable
video input 0
video input 1
video input 2
8 - bit
ADC
INPUT
SELECTOR
AMP.
1
2
3
D7
D6
D5
D4
D3
D2
D1
D0
24
25
clamp capacitor
connection
4
10
11
12
13
TTL
OUTPUTS
gain control
input
TDA8709A
CLAMP LEVEL "16"
DIGITAL COMPARATOR
output
format
selection
28
CLAMP
LOGIC
CLAMP LEVEL "128"
DIGITAL COMPARATOR
26
23
27
6
8
22
analog V
MBB951
clamp
level
selection
clamp
pulse
digital V
(+ 5 V)
digital
ground
analog
ground
CCD
CCA
(+ 5 V)
Fig.1 Block diagram.
June 1994
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Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
PINNING
SYMBOL PIN
DESCRIPTION
D7
1
2
3
4
5
6
7
8
9
data output; bit 7 (MSB)
data output; bit 6
D6
D5
data output; bit 5
D4
data output; bit 4
handbook, halfpage
D7
1
2
3
4
5
6
7
8
9
OFS
28
CLK
VCCD
VCCO
DGND
FOEN
D3
clock input
digital supply voltage (+5 V)
TTL outputs supply voltage (+5 V)
digital ground
27 CLS
D6
D5
CLP
26
25
D4
GAIN
fast output chip enable
CLK
24 CLAMP
23 AGND
10 data output; bit 3
V
CCD
D2
11 data output; bit 2
V
22
V
CCA
CCO
D1
12 data output; bit 1
TDA8709A
21 DEC
DGND
FOEN
D0
13 data output; bit 0 (LSB)
14 video input selection bit 0
15 video input selection bit 1
16 video input 0
I0
20 ADCIN
19 ANOUT
I1
D3 10
D2 11
D1 12
VIN0
VIN1
VIN2
ANOUT
ADCIN
DEC
VCCA
AGND
CLAMP
GAIN
CLP
CLS
OFS
VIN2
VIN1
VIN0
18
17
16
17 video input 1
18 video input 2
D0
I0
13
14
19 analog voltage output
20 analog-to-digital converter input
21 decoupling input
15 I1
MBB950
22 analog supply voltage (+5 V)
23 analog ground
24 clamp capacitor connection
25 gain control input
26 clamping pulse
27 clamping level selection input
28 output format selection
Fig.2 Pin configuration.
June 1994
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Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
chrominance or colour difference signals). While clamping
pulse at pin 27 is logic 1, the device will adjust the
clamping level to the chosen value. The output format can
be selected between binary and two's complement at
pin 28.
FUNCTIONAL DESCRIPTION
TDA8709A is an 8-bit ADC with internal clamping and a
preamplifier with adjustable gain.
The clamping value is switched via pin 27 between
digital 16 (for R, G, B signals) and digital 128 (for
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER
MIN.
−0.3
MAX.
+7.0
UNIT
VCCA
VCCD
VCCO
∆VCC
analog supply voltage
digital supply voltage
V
V
V
V
V
V
V
−0.3
−0.3
−0.5
−0.5
−1.0
−0.3
−
+7.0
+7.0
+0.5
+0.5
+1.0
+7.0
+10
TTL output supply voltage
supply voltage difference between VCCA and VCCD
supply voltage difference between VCCO and VCCD
supply voltage difference between VCCA and VCCO
input voltage
VI
IO
output current
mA
°C
°C
°C
Tstg
Tamb
Tj
storage temperature
−55
0
+150
+70
operating ambient temperature
junction temperature
0
+125
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
VALUE
UNIT
Rth j-a
thermal resistance from junction to ambient in free air
SOT117-1
SOT136-1
55
70
K/W
K/W
June 1994
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Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
CHARACTERISTICS
VCCA = V22 to V23 = 4.5 to 5.5 V; VCCD = V6 to V8 = 4.5 to 5.5 V; VCCO = V7 to V8 = 4.2 to 5.5 V; AGND and DGND
shorted together; VCCA to VCCD = −0.5 to +0.5 V; VCCO to VCCD = −0.5 to +0.5 V; VCCA to VCCO = −0.5 to +0.5 V;
Tamb = 0 to +70 °C; typical readings taken at VCCA = VCCD = VCCO = 5 V and Tamb = 25 °C; unless otherwise specified.
SYMBOL
Supplies
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
VCCA
VCCD
VCCO
ICCA
analog supply voltage
4.5
5.0
5.0
5.0
40
5.5
V
digital supply voltage
TTL output supply voltage
analog supply current
digital supply current
4.5
4.2
−
5.5
5.5
47
V
V
mA
mA
mA
ICCD
−
24
30
ICCO
TTL output supply current
TTL load (see Fig.7)
−
12
16
Preamplifier inputs
VIN0 TO VIN2 INPUTS
VI(p-p)
|Zi|
input voltage (peak-to-peak value)
note 1
0.6
10
−
−
1.5
−
V
input impedance
input capacitance
fi = 6 MHz
fi = 6 MHz
20
1
kΩ
pF
CI
−
I0 AND I1 TTL INPUTS (SEE TABLE 1)
VIL
VIH
IIL
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
0
−
−
−
−
0.8
VCCD
−
V
2.0
−400
−
V
VI = 0.4 V
VI = 2.7 V
µA
µA
IIH
20
CLS, OFS AND CLP TTL INPUTS (SEE FIG.5)
VIL
VIH
IIL
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
clamp pulse width
0
−
−
−
−
−
0.8
VCCD
−
V
2.0
−400
−
V
VI = 0.4 V
VI = 2.7 V
µA
µA
µs
IIH
20
−
tCLP
2
GAIN INPUT (PIN 25)
V25(min)
V25(max)
II
input voltage for minimum gain
see Fig.9
see Fig.9
−
−
−
1.8
3.8
1.0
−
−
−
V
input voltage for maximum gain
input current
V
µA
CLAMP INPUT (PIN 24)
V24
I24
clamp voltage for code 128 output
clamp output current
−
3.5
−
V
see Table 2
June 1994
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Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
Video amplifier outputs
ANOUT OUTPUT (PIN 19)
V19(p-p)
AC output voltage
(peak-to-peak value)
VOF = 1.33 V (p-p);
V25 = 3.0 V
−
1.33
−
V
I19
internal current source
RL = ∞
2.0
2.5
−
mA
mA
IO(p-p)
output current driven by the load
VANOUT = 1.33 V (p-p);
note 2
−
−
1.0
V19
V19
Z19
DC output voltage for black level
DC output voltage for black level
output impedance
CLS = logic 1
CLS = logic 0
−
−
−
V
CCA − 2.02
CCA − 2.6
−
−
−
V
V
Ω
V
20
Preamplifier dynamic characteristics
αct
crosstalk between VIN inputs
VCCA = 4.75 to 5.25 V;
note 3
−
−
−
−50
2
−45
−
dB
%
Gdiff
ϕdiff
differential gain
VVIN = 1.33 V (p-p);
V25 = 3.0 V
differential phase
VVIN = 1.33 V (p-p);
V25 = 3.0 V
0.8
−
deg
B
−3 dB bandwidth
12
60
−
−
−
MHz
dB
dB
dB
%
S/N
signal-to-noise ratio
supply voltage ripple rejection
gain range
note 4
−
−
SVRR1
∆G
note 5
45
−
−
see Fig.9
−4.5
−
+6.0
5
Gstab
gain stability as a function of supply see Fig.9
voltage and temperature
−
Analog-to-digital converter inputs
CLK INPUT (PIN 5)
VIL
VIH
IIL
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
input impedance
0
−
0.8
VCCD
−
V
2.0
−400
−
−
V
Vclk = 0.4 V
Vclk = 2.7 V
fclk = 10 MHz
fclk = 10 MHz
−
µA
µA
kΩ
pF
IIH
|Zi|
CI
−
100
−
−
4
input capacitance
−
4.5
−
FOEN INPUT (SEE TABLE 3)
VIL
VIH
IIL
LOW level input voltage
0
−
−
−
−
0.8
VCCD
−
V
HIGH level input voltage
LOW level input current
HIGH level input current
2.0
−400
−
V
V9 = 0.4 V
V9 = 2.7 V
µA
µA
IIH
20
June 1994
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Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
ADCIN INPUT (PIN 20; SEE TABLE 4)
V20
input voltage
input voltage
digital output = 00
digital output = 255
−
−
−
V
CCA − 2.52 −
CCA − 1.52 −
V
V
V
V20
V
V20(p-p)
input voltage amplitude
(peak-to-peak value)
1.0
−
I20
|Zi|
CI
input current
−
−
−
1.0
50
1
10
−
µA
MΩ
pF
input impedance
input capacitance
fi = 6 MHz
fi = 6 MHz
−
Analog-to-digital converter outputs
DIGITAL OUTPUTS D0 TO D7
VOL
VOH
IOZ
LOW level output voltage
HIGH level output voltage
output current in 3-state mode
IOL = 2 mA
0
−
−
−
0.6
V
IOL = −0.4 mA
0.4 V < VO < VCCD
2.4
VCCD
+20
V
−20
µA
Switching characteristics
fclk(max) maximum clock input frequency
see Fig.5; note 6
30
32
2
−
−
MHz
%
Analog signal processing (fclk = 32 MHz; see Fig.7)
Gdiff
differential gain
V20 = 1.0 V (p-p);
see Fig.6; note 7
−
ϕdiff
f1
differential phase
see Fig.6; note 7
−
−
−
2
−
0
−
deg
dB
fundamental harmonics (full-scale)
fi = 4.43 MHz; note 7
fi = 4.43 MHz; note 7
−
fall
harmonics (full-scale);
all components
−55
dB
SVRR2
supply voltage ripple rejection
note 8
note 9
−
1
5
%/V
Transfer function
ILE
DLE
ILE
DC integral linearity error
−
−
−
−
−
−
±1
LSB
LSB
LSB
DC differential linearity error
AC integral linearity error
±0.5
±2
Timing (fclk = 32 MHz; see Figs 5, 6 and 7)
DIGITAL OUTPUTS (CL = 15 pF; IOL = 2 mA; RL = 2 kΩ)
tds
th
sampling delay time
−
−
−
−
−
2
−
ns
ns
ns
ns
ns
output hold time
8
−
td
output delay time
16
16
12
20
25
25
tdEZ
tdDZ
3-state delay time; output enable
3-state delay time; output disable
June 1994
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Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
Notes to the “Characteristics”
1. 0 dB is obtained at the AGC amplifier when applying Vi(p-p) = 1.33 V.
2. The output current at pin 19 should not exceed 1 mA. The load impedance RL should be referenced to VCCA and
defined as:
a) AC impedance ≥1 kΩ and the DC impedance >2.7 kΩ.
b) The load impedance should be coupled directly to the output of the amplifier so that the DC voltage supplied by
the clamp is not disturbed.
3. Input signals with the same amplitude. Gain is adjusted to obtain ANOUT = 1.33 V (p-p).
4. Signal-to-noise ratio measured with 5 MHz bandwidth:
VANOUT (p – p)
S
N
= 20 log
at B = 5 MHz.
---------------------------------------------
VANOUT (RMS noise)
---
5. The voltage ratio is expressed as:
∆VCCA
G
SVRR1 = 20 log
×
for VI = 1 V (p-p), gain at 100 kHz = 1 and 1 V supply variation.
----------------- --------
VCCA ∆ G
6. It is recommended that the rise and fall times of the clock are ≥2 ns. In addition, a ‘good layout’ for the digital and
analog grounds is recommended.
7. These measurements are realized on analog signals after a digital-to-analog conversion (TDA8702 is used).
8. The supply voltage rejection is the relative variation of the analog signal (full-scale signal at input) for 1 V of supply
variation:
∆ (VI (00) – VI (FF) ) + (VI (00) – VI (FF)
)
SVRR2 =
-----------------------------------------------------------------------------------------------------
∆VCCA
9. Full-scale sine wave (fi = 4.4 MHz; fclk = 27 MHz).
June 1994
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Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
Table 1 Video input selection (CVBS).
Table 3 FOEN input coding.
I1
I0
SELECTED INPUT
FOEN
D0 TO D7
0
0
1
1
0
1
0
1
VIN0
VIN1
VIN2
VIN1
0
1
active, two's complement
high impedance
Table 2 CLAMP output current.
DIGITAL
OUTPUT
CLS
CLP
ICLAMP
1
1
output < 128
output > 128
X
+50 µA
−50 µA
0 µA
X(1)
0
0
1
output < 16
16 < output
+50 µA
−50 µA
Note
1. X = don't care.
Table 4 Output coding and input voltage (typical values).
BINARY OUTPUTS
TWO'S COMPLEMENT
STEP
VADCIN
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
Underflow
−
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
1
.
1
1
1
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
1
.
0
V
CCA − 2.52 V
1
−
.
.
−
−
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
254
−
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
255
V
CCA − 1.52 V
Overflow
−
June 1994
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Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
0.25 V
5 MHz sine wave
1.0 V
0.25 V
MBB959
64 µs
Fig.3 Test signal on the ADCIN pin for differential gain and phase measurements.
digital
output
level
MBB960
255
"128"
"16"
CLS = 1
CLS = 2
black-level
clamping
0
t
t
CLP
CLP
Fig.4 Control mode selection.
11
June 1994
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
clock input
reference level
(1.5 V)
CLK
input
t
ds
sample
sample
N
1
N
2
sample
N
sample
N
analog
input
1
(ADCIN)
t
h
2.4 V
data
data N
3
data N
2
data N
1
data N
data N
1
outputs
D0 to D7)
0.4 V
MBB958
t
d
Fig.5 Timing diagram.
2 V
FOEN
input
0.8 V
2.4 V
0.4 V
data
outputs
(D0 to D7)
high impedance
active
active
t
t
MBB957
dDZ
dEZ
Fig.6 Output format timing diagram.
12
June 1994
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
V
CCO
handbook, halfpage
2 kΩ
S1
D0 to D7
C
5
kΩ
IN916
or
IN3064
S2
MBB955
DGND
Fig.7 Load circuit for timing measurement; data outputs (FOEN = LOW).
V
CCO
2 kΩ
handbook, halfpage
D0 to D7
15 pF
IN916
or
IN3064
MBD865
DGND
Fig.8 Load circuit for timing measurement; 3-state outputs (FOEN: fi = 1 MHz; VFOEN = 3 V).
13
June 1994
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
MBB961 - 1
12
handbook, halfpage
G
(dB)
8
4
0
4
5 %
(1)
(2)
8
1.6
2.4
3.2
4.0
V
(V)
25
(1) Typical value (VCCA = VCCD = 5 V; Tamb = 25 °C).
(2) Minimum and maximum values (temperature and supply).
Fig.9 Typical gain control curve as a function of
gain voltage.
June 1994
14
pin 25
GAIN
pins 26, 27 or 28
CLS or CLP or OFS
V
V
CCO
V
CCA
CCD
V
CCA
pin 6
V
pins 1 to 4
and 10 to 13
data outputs
CCD
pin 7
V
DGND
CCO
DGND
pin 22
V
CCA
AGND
V
CCD
pin 24
CLAMP
V
CCA
pin 5
clock input
1.5 V
TDA8709A
DGND
I
1
pin 8
DGND
I
V
I
CCD
1
2
pin 23
CLAMP
pin 9
FOEN
AGND
V
CCA
V
CCA
DGND
V
V
CCA
CCA
V
V
top
CCA
V
mid
20
kΩ
pins 14 or 15
I
,I
0
1
V
2.5
mA
REF
V
bottom
AGND
AGND
AGND
AGND
AGND
MBB962
pins 16 to 18
VIN0, VIN1 and VIN2
pin 19
ANOUT
pin 20
ADCIN
pin 21
DEC
ahdnbok,uflapegwidt
Fig.10 Internal pin configuration.
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
APPLICATION INFORMATION
Additional information can be found in the laboratory report of TDA8708A “FBL/AN9308”.
V
CCA
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
2
data outputs
3
horizontal clamp
220 nF
4
33 pF
18 nF
100 Ω
clock
5 V
5
6
22 nF
22 nF
1 µF
10 nF
1 µH
(1)
7
5 V
22 Ω
TDA8709A
8
5 V
1 µ F
9
LOW PASS
FILTER
(2)
10
11
12
13
14
4.7 µF
data outputs
4.7 µF
75Ω
4.7 µF
75Ω
75Ω
MBB954 - 1
(1) It is recommended to decouple VCCO through a 22 Ω resistor especially when
the output data of TDA8709A interfaces with a capacitive CMOS load device.
(2) See Figs 12, 14, 16 and 18 for examples of the low-pass filters.
Fig.11 Application diagram.
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June 1994
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
22 µH
22 µH
12 pF
12 pF
680 Ω
ANOUT
(pin 19)
ADCIN
(pin 20)
2.2 kΩ
27 pF
V
V
i
o
27 pF
68 pF
MBB953 - 1
V
CCA
(pin 22)
This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680 Ω and 2.2 kΩ
must in any event be applied.
Fig.12 Example of a low-pass filter for RGB and C signals.
Characteristics of Fig.13
• Order 5; adapted CHEBYSHEV
MSA682
• Ripple ρ ≤ 0.4 dB
0
handbook, halfpage
• f = 6.5 MHz at −3 dB
α
(dB)
• fnotch = 9.65 MHz.
40
80
120
160
0
10
20
30
f (MHz)
Fig.13 Frequency response for filter shown in
Fig.12.
June 1994
17
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
82 µH
680 Ω
ADOUT
ADCIN
(pin 20)
(pin 19)
2.2 kΩ
15 pF
V
V
i
o
15 pF
MSA678
V
CCA
(pin 22)
This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680 Ω and 2.2 kΩ
must in any event be applied.
Fig.14 Example of an economical low-pass filter for RGB and C signals.
Characteristics of Fig.15
• Order 3; adapted CHEBYSHEV
MSA681
• Ripple ρ ≤ 0.4 dB
0
handbook, halfpage
• f = 6.5 MHz at −3 dB.
α
(dB)
10
20
30
40
0
10
20
30
f (MHz)
Fig.15 Frequency response for filter shown in
Fig.14.
June 1994
18
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
180 µH
180 µH
6.8 pF
6.8 pF
680 Ω
ANOUT
(pin 19)
ADCIN
(pin 20)
2.2 kΩ
22 pF
V
V
i
o
22 pF
56 pF
MSA683
V
CCA
(pin 22)
This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680 Ω and 2.2 kΩ
must in any event be applied.
Fig.16 Example of a low-pass filter for U and V signals.
Characteristics of Fig.17
• Order 5; adapted CHEBYSHEV
MSA680
• Ripple ρ ≤ 0.4 dB
0
handbook, halfpage
α
• f = 2.3 MHz at −3 dB
(dB)
• fnotch = 4.5 MHz.
20
40
60
80
100
0
10
20
30
f (MHz)
Fig.17 Frequency response for filter shown in
Fig.16.
June 1994
19
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
180 µH
1 pF
680 Ω
ANOUT
(pin 19)
ADCIN
(pin 20)
2.2 kΩ
27 pF
V
V
i
o
27 pF
MSA677
V
CCA
(pin 22)
This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680 Ω and 2.2 kΩ
must in any event be applied.
Fig.18 Example of an economical low-pass filter for U and V signals.
Characteristics of Fig.19
• Order 3; adapted CHEBYSHEV
• Ripple ρ ≤ 0.3 dB
MSA679
0
handbook, halfpage
• f = 2.8 MHz at −3 dB
α
(dB)
• fnotch = 11.9 MHz.
20
40
60
80
0
10
20
30
f (MHz)
Fig.19 Frequency response for filter shown in
Fig.18.
June 1994
20
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
PACKAGE OUTLINES
15.80
15.24
36.0
35.0
4.0
max
5.1
max
3.9
3.4
0.51
min
M
0.254
0.32 max
1.7
max
0.53
max
2.54
(13x)
15.24
1.7 max
17.15
15.90
MSA264
28
15
14.1
13.7
1
14
Dimensions in mm.
Fig.20 Plastic dual in-line package; 28 leads (600 mil) with internal heat spreader (SOT117-1).
June 1994
21
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
18.1
17.7
7.6
7.4
h
A
10.65
10.00
0.1 S
S
0.9
0.4
(4x)
28
15
1.1
1.0
2.45
2.25
2.65
0.3
0.1
0.32
2.35
0.23
pin 1
index
1.1
0.5
o
0 to 8
1
14
detail A
MBC236 - 1
0.49
0.36
0.25 M
(28x)
1.27
Dimensions in mm.
Fig.21 Plastic small outline package; 28 leads; large body (SOT136-1).
June 1994
22
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
SOLDERING
BY SOLDER PASTE REFLOW
Reflow soldering requires the solder paste (a suspension
of fine solder particles, flux and binding agent) to be
applied to the substrate by screen printing, stencilling or
pressure-syringe dispensing before device placement.
Plastic dual in-line packages
BY DIP OR WAVE
The maximum permissible temperature of the solder is
260 °C; this temperature must not be in contact with the
joint for more than 5 s. The total contact time of successive
solder waves must not exceed 5 s.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt, infrared, and
vapour-phase reflow. Dwell times vary between 50 and
300 s according to method. Typical reflow temperatures
range from 215 to 250 °C.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified storage maximum. If the printed-circuit board has
been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within
the permissible limit.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 min at 45 °C.
REPAIRING SOLDERED JOINTS (BY HAND-HELD SOLDERING
IRON OR PULSE-HEATED SOLDER TOOL)
REPAIRING SOLDERED JOINTS
Fix the component by first soldering two, diagonally
opposite, end pins. Apply the heating tool to the flat part of
the pin only. Contact time must be limited to 10 s at up to
300 °C. When using proper tools, all other pins can be
soldered in one operation within 2 to 5 s at between 270
and 320 °C. (Pulse-heated soldering is not recommended
for SO packages.)
Apply a low voltage soldering iron below the seating plane
(or not more than 2 mm above it). If its temperature is
below 300 °C, it must not be in contact for more than 10 s;
if between 300 and 400 °C, for not more than 5 s.
Plastic small-outline packages
BY WAVE
For pulse-heated solder tool (resistance) soldering of VSO
packages, solder is applied to the substrate by dipping or
by an extra thick tin/lead plating before package
placement.
During placement and before soldering, the component
must be fixed with a droplet of adhesive. After curing the
adhesive, the component can be soldered. The adhesive
can be applied by screen printing, pin transfer or syringe
dispensing.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder bath is
10 s, if allowed to cool to less than 150 °C within 6 s.
Typical dwell time is 4 s at 250 °C.
A modified wave soldering technique is recommended
using two solder waves (dual-wave), in which a turbulent
wave with high upward pressure is followed by a smooth
laminar wave. Using a mildly-activated flux eliminates the
need for removal of corrosive residues in most
applications.
June 1994
23
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
June 1994
24
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
NOTES
June 1994
25
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
NOTES
June 1994
26
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
NOTES
June 1994
27
Philips Semiconductors – a worldwide company
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P.O. Box 218, 5600 MD, EINDHOVEN, The Netherlands,
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SCD31
© Philips Electronics N.V. 1994
Tel. (03)3740 5028, Fax. (03)3740 0580
Korea: (Republic of) Philips House, 260-199 Itaewon-dong,
All rights are reserved. Reproduction in whole or in part is prohibited without the
prior written consent of the copyright owner.
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The information presented in this document does not form part of any quotation
or contract, is believed to be accurate and reliable and may be changed without
notice. No liability will be accepted by the publisher for any consequence of its
use. Publication thereof does not convey nor imply any license under patent- or
other industrial or intellectual property rights.
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Tel. (040)783749, Fax. (040)788399
533061/1500/03/pp28
Date of release: June 1994
9397 734 60011
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Document order number:
Philips Semiconductors
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