TDA8745H [NXP]
Satellite sound receiver with I2C-bus control; 卫星接收机的声音带I2C总线控制
| 型号： | TDA8745H |
| 厂家： | 
NXP |
| 描述： | Satellite sound receiver with I2C-bus control |
| 文件： | 总40页 (文件大小：264K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA8745
Satellite sound receiver with
I2C-bus control
1996 Mar 11
Preliminary specification
Supersedes data of 1995 Mar 08
File under Integrated Circuits, IC02
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
FEATURES
• On-chip frequency synthesizer and mixer:
– tuning range 4 to 9.77 MHz
– reference oscillator 4 MHz (using a crystal or 4 MHz
frequency source)
• IF input switches allowing selection of various IF
bandwidths (wide or narrow)
APPLICATIONS
• Demodulation of two audio signals by wide band
Phase-Locked Loops (PLLs)
• Satellite receivers
• TV sets
• Audio level control after PLL (modulation depth setting)
• Video recorders.
• Noise Reduction (NR) bypass for use with main audio
signals
GENERAL DESCRIPTION
• Left, right and mono output [1⁄2(l + r)] on SCART level
The TDA8745 is the successor of the TDA8740 and
TDA8741. The device contains the functionality of the
TDA8740 and TDA8741 together with a synthesizer, mixer
and I2C-bus control.
• External audio inputs (for decoder connection)
• Selectable de-emphasis (DEEM) 50 µs, 75 µs, J17 and
flat response
• I2C-bus control of all functions
The pin numbers mentioned in this publication refer to the
SDIP42 package; unless otherwise indicated.
• Two selectable addresses
• Carrier presence detector with automatic mute option.
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
SOT270-1
SOT307-2
TDA8745
SDIP42
QFP44
plastic shrink dual in-line package; 42 leads (600 mil)
TDA8745H
plastic quad flat package; 44 leads (lead length 1.3 mm);
body 10 × 10 × 1.75 mm
1996 Mar 11
2
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
VP1
VP2
VP3
IP1
synthesizer and mixer supply voltage
I2C-bus supply voltage
4.5
4.5
8.0
−
5.0
5.0
12.0
37
5.5
5.5
13.2
48
−
V
V
general supply voltage
V
synthesizer and mixer supply current
I2C-bus supply current
mA
mA
mA
dB
IP2
−
0.6
35
IP3
general supply current
−
46
−
S/N(A)
signal-to-noise ratio secondary channel
A-weighted;
NR = on; DEEM = 75 µs
input sensitivity (RMS value) baseband input S/N(A) = 40 dB;
68
77
Vi(rms)
−
0.5
1.5
mV
to mixer
NR = on; DEEM = 75 µs
Vi(rms)
Vo
baseband input voltage (RMS value)
output voltage
THD ≤ 0.5%
200
−4
mV
−8
−6
610
−
dBV
mW
Ptot
total power dissipation
storage temperature
operating ambient temperature
−
800
Tstg
Tamb
−65
−20
+150 °C
+70 °C
−
1996 Mar 11
3
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
BLOCK DIAGRAM
BM0E37
D E E M O U T L
D E E M O U T R
o o g e w i d t h
I N - 6
I N - 5
I N - 4
I N - 3
I N - 2
I N - 1
1996 Mar 11
4
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
PINNING
PIN
SYMBOL
DESCRIPTION
DC decoupling capacitor (right channel)
SDIP42
QFP44
CDC R
SLF
1
39
41
42
43
44
1
2
synthesizer loop-filter
BASEBAND IN
VP1
3
baseband input to mixer
4
synthesizer and mixer supply voltage (+5 V)
intercarrier output from mixer
synthesizer and mixer ground
intercarrier input 5/port expansion output 1
intercarrier input 6/port expansion output 2
Intercarrier input 1
IF OUT
SYNGND
IN-5
5
6
7
2
IN-6
8
3
IN-1
9
4
HFGND
IN-2
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
5
HF ground
6
intercarrier input 2
I2C-bus address selection
ADDsel
7
IN-3
8
Intercarrier input 3
I2C-bus ground
I2CGND
IN-4
9
10
11
12
13
14
15
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
intercarrier input 4
VP2
I2C-bus supply voltage (+5 V)
I2C-bus serial clock input
SCL
SDA
I2C-bus serial data input/output
decoupling capacitor for reference voltage
general supply voltage (+12 V)
mono channel output [1⁄2(l + r)]
right channel output
Vref
VP3
OM
OR
OL
left channel output
EXTR
external audio input (right channel)
external audio input (left channel)
attack/recovery capacitor (right channel)
rectifier DC decoupling (right channel)
EXTL
CATT/REC R
RECTR
CNR D R
CD R
noise reduction de-emphasis capacitor (right channel)
de-emphasis capacitor (right channel)
de-emphasis output (right channel)
audio pass-through input (right channel)
AF ground
DEEM OUT R
CCL R
AFGND
CCL L
audio pass-through input (left channel)
de-emphasis output (left channel)
DEEM OUT L
CD L
de-emphasis capacitor (left channel)
noise reduction de-emphasis capacitor (left channel)
rectifier DC decoupling (left channel)
attack/recovery capacitor (left channel)
CNR D L
RECTL
CATT/REC L
1996 Mar 11
5
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
PIN
SYMBOL
DESCRIPTION
presence detector timing (right channel)
SDIP42
QFP44
PRES DET R
XTAL
39
40
41
42
−
35
36
37
38
16
40
crystal input for 4 MHz oscillator
presence detector timing (left channel)
DC decoupling capacitor (left channel)
not connected
PRES DET L
CDC L
n.c.
n.c.
−
not connected
handbook, halfpage
C
C
1
2
42
41
40
DC L
DC R
SLF
PRES DET L
XTAL
3
BASEBAND IN
V
4
39 PRES DET R
C
P1
5
IF OUT
SYNGND
IN-5
38
37
36
35
ATT/REC L
RECT
6
L
NR D L
D L
C
C
7
8
IN-6
9
IN-1
DEEM OUT L
34
33
C
10
11
12
13
14
15
HFGND
IN-2
CL L
TDA8745
32
31
30
29
28
27
26
25
AFGND
ADD
sel
C
CL R
IN-3
2
DEEM OUT R
C
I
CGND
D R
C
IN-4
NR D R
V
RECT
R
16
P2
C
SCL 17
ATT/REC R
18
19
20
21
SDA
EXT
EXT
L
V
24
23
22
R
ref
V
O
L
P3
O
M
O
R
MBE035
Fig.2 Pin configuration (SDIP42).
6
1996 Mar 11
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
RECT
C
SYNGND
IN-5
1
2
33
32
31
30
29
28
27
26
25
24
23
L
NR D L
D L
C
3
IN-6
4
DEEM OUT L
IN-1
C
5
HFGND
IN-2
CL L
6
TDA8745H
AFGND
C
7
ADD
sel
CL R
DEEM OUT R
8
IN-3
2
C
9
D R
I
CGND
IN-4
C
10
11
NR D R
RECT
R
V
P2
MBE034
Fig.3 Pin configuration (QFP44).
1996 Mar 11
7
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
The mixer transfers the different sound carrier frequencies
to fixed intermediate frequencies of 10.7 and 10.52 MHz.
These frequencies are fed via an internal buffer stage to
external ceramic band-pass filters before they are routed
to the two demodulator inputs. The buffer stage can drive
up to three external ceramic band-pass filters (assuming
330 Ω filter terminations) but this can be increased to four
or more by adding an external buffer.
FUNCTIONAL DESCRIPTION
Satellite sound
The baseband signal coming from a satellite tuner
comprises the demodulated video signal plus a number of
sound carriers in the event of reception of a PAL, NTSC or
SECAM satellite signal.
Nearest to the video signal is the main sound carrier which
carries the mono sound related to the video. This is an FM
modulated carrier with a fixed pre-emphasis. The carrier
frequency can be in the range of 5.8 to 6.8 MHz.
Synthesizer
The synthesizer consists of the following parts:
• Reference oscillator
Additionally, a number of optional secondary sound
carriers may be present. These can be used for stereo or
multi-language sound related to the video signal, or for
unrelated radio sound. These carriers are also FM
modulated, and for better sound quality (improved
signal-to-noise performance) broadcast satellites
(e.g. ‘ASTRA’) use a noise reduction system (adaptive
pre-emphasis circuit, combined with a fixed
• Reference divider
• A 10-bit programmable divider
• Phase detector
• Charge pump
• Voltage Controlled Oscillator (VCO)
• Divide-by-two circuit.
pre-emphasis). These secondary carrier frequencies can
be in the range of 6.30 to 8.28 MHz.
The reference frequency circuit consists of a 4 MHz crystal
oscillator and a divider (by 200). The resulting reference
frequency of 20 kHz is fed to the phase detector.
The programmable divider consists of a series of cells
(divide by 2 or 3) connected as a ripple counter.
The minimum division ratio is 2n and the maximum division
ratio is 2n + 1 − 1.
For accurate tuning to the many sound carriers, an internal
frequency synthesizer and mixer are used to transfer the
sound carriers to intermediate frequencies of
10.7 and 10.52 MHz.
The TDA8745 contains all circuitry for the processing of
the main channel and secondary channels, from baseband
signal to line (SCART) output drivers. By means of
external band-pass filters the desired frequencies coming
from the synthesizer/mixer are routed to the IF
limiter/demodulator inputs.
The programmable divider output signal is also fed to the
phase detector. The charge pump provides output current
pulses in accordance with the signals from the phase
detector. The final tuning voltage for the VCO is provided
by the loop filter and a buffer amplifier.
Band-pass filter and mixer
The oscillator frequency range is from
29.04 to 40.94 MHz, depending on the setting of the
programmable divider (by the TUN signal). The tuning
voltage is clipped to limit the VCO frequency range.
The frequency of the oscillator is divided-by-two before it
is applied to the mixer (to obtain the desired 10 kHz
resolution).
Before the incoming baseband signal is applied to the
mixer, the signal is filtered. Related to the sound carriers,
the level of the video part of the baseband signal can be
much higher, so to avoid overload it is desirable to
attenuate the latter, this is also to avoid interference
(additional unwanted mix of signals after mixing).
The internal band-pass filter (pass band from
Left and right channel inputs
approximately 4 to 10 MHz) is completed by a simple
external notch filter. The external filter provides substantial
attenuation of the video colour carrier. The notch filter is
chosen to be external because the required notch
frequency is TV standard dependent and also because an
accurate on-chip notch filter requires a tuning mechanism
(consuming additional chip area).
A maximum of six inputs are available (pins 9, 11, 13, 15,
7 and 8). External ceramic band-pass filters, which are
tuned to the desired intermediate frequencies, route the
signals to the inputs.
For stereo purposes the TDA8745 contains two identical
secondary sound processing channels (secondary
channel 1 will also be referred to as ‘left’ or ‘language 1’
and secondary channel 2 as ‘right’ or ‘language 2’).
The mixer is a double-balanced mixer with degeneration,
this to accommodate the level of the filter output signal.
1996 Mar 11
8
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
With the input selection every input pin of the left and/or
right channel can be independently selected. Input
selection for the left channel is controlled by the IL signal
and for the right channel by the IR signal.
To adjust for different (main channel) modulation depths
used at some satellites the audio level is made adjustable,
the signal can be controlled in steps of 1 dB from
−12 dB to +3 dB by the LEV signal.
From the inputs, the signals are coupled to the
limiter/amplifier and to the PLL demodulator of each
channel. The output signal from the PLL is routed to both
the presence detector and audio level control.
Noise Reduction (NR)
To improve the quality of the secondary channels, the
audio signal is processed at the transmitter side before
modulation. For an overall flat audio response the inverse
processing must take place after demodulation. This is
achieved in the NR.
The inputs of pins 7 and 8 can be changed into digital
outputs for external switching purposes, set by the so
called Port Extension bit (PE). Not used inputs should be
connected to ground. Note that the inputs of pins 7 and 8
are also floating when not in Port Extension mode.
The NR can be regarded as an input level dependent
Low-Pass Filter (LPF) [adaptive de-emphasis system]
followed by a fixed de-emphasis. Figure 3 shows the
transfer characteristics as function of the input level
(normalized to input level, and without the fixed
de-emphasis).
Presence detector
The presence detector is used to determine if a carrier is
present on the channel of interest. It does so by measuring
the amount of high frequency noise (>20 kHz) in the audio
signal, which is directly related to the C/N (carrier-to-noise
ratio) at the IF input. If a carrier is present, these high
frequencies are fairly moderate, if no carrier is present,
strong noise components are present.
At maximum input level (50 kHz frequency deviation,
referred to as 0 dB) the frequency response of the first part
(i.e. without fixed de-emphasis) is nearly flat (note the
small dip around 3 kHz in Fig.3; this is a system attribute).
As the input level is X dB lowered, the higher output
frequencies will be reduced an extra X dB with respect to
the lower frequencies (1 : 2 expansion).
The audio signal, first high-pass filtered and then rectified,
is filtered by the components at pins 41 and 39
(PRES DET L and PRES DET R). The DC level at this pin
is then compared with an internal reference voltage. If the
level at pins 41 and 39 exceeds this voltage level, the
presence detector output goes HIGH (no carrier).
If a main carrier signal is received, the NR can be
bypassed at which the signal is fed directly to the
de-emphasis circuit. The noise reduction is active when
the NR signal (via I2C-bus) is logic 1.
This output signal can be used to drive the output mute (if
bit PDM = 1; see Section “Output selection”) and can be
monitored by reading bits PDL and PDR. The detection
level can be modified by changing the leakage resistor at
pins 41 and 39, a higher resistor value gives a ‘no carrier’
response ant C/N levels detected as ‘carrier present’ with
a lower resistor value.
De-emphasis
De-emphasis is realized by means of several internal
resistors and an external capacitor to ground. Via the
I2C-bus, the DEM signal can be switched between 50 µs,
75 µs, J17 and no de-emphasis. Figure 4 shows these
four different possibilities.
Audio level control
Output selection
Each demodulator output signal is amplified in a buffer
amplifier and DC decoupled by means of electrolytic
capacitors connected to pin 42 (left) and pin 1 (right).
With the output selector the output pins 23 and 22 can be
switched to the left and right satellite channels
(pins 33 and 31) or to the external inputs (pins 25 and 24)
for an other signal source or for connection of a decoder
box. the OS1 and OS0 bits determine this selection.
The output level of all channels is −6 dBV typical at a
frequency deviation of the FM signal of 54% of the
maximum deviation (i.e 0.54 × 85 kHz = 46 kHz for the
main channel and 0.54 × 50 kHz = 27 kHz for the
secondary channels) at 1 kHz modulation frequency
(reference level).
Pin 21 is a separate output which delivers the mono
channel. The mono signal is the sum of pin 23 (left) and
pin 22 (right) output signal [1⁄2(l + r)].
1996 Mar 11
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Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
Output pins 23 and 22 can be muted by setting the
OML and OMR signals to logic 1. In addition, automatic
muting is also possible, the presence detector (as
described in Section “Presence detector”) sets the PDL bit
(PDR for other channel). Absence of a carrier at the
selected frequency results in automatic muting. This
mechanism is enabled or inhibited by the PDM bit
(Presence Detector auto Mute).
fOM = carrier frequency of main Channel.
fOS1 = carrier frequency of secondary Channel 1.
fOS2 = carrier frequency of secondary Channel 2.
IF = Intermediate Frequency.
IL = Input Left.
IR = Input Right.
All outputs (pins 21, 22 and 23) are line drivers with
SCART level capability and are short-circuit protected by
means of 125 Ω output resistors. Pins 34 and 30 are also
line drivers at SCART level and can be used as signal
outputs before the IC’s output selection (i.e. for decoder
box use).
LPF = Low-Pass Filter.
NR = Noise Reduction.
OML = Output Mute Left.
OMR = Output Mute Right.
OS = Output Select.
ABBREVIATIONS
PDM = Presence Detector auto Mute.
PE = Port Extension.
BPF = Band-Pass Filter.
fmod = modulating frequency.
PLL = Phase-Locked Loop.
POR = Power-On Reset.
∆fM = frequency deviation of the main Channel.
∆fS1 = frequency deviation of secondary Channel 1 (left).
∆fS2 = frequency deviation of secondary Channel 2 (right).
S/N = Signal-to-Noise ratio.
VCO = Voltage Controlled Oscillator.
MBE284
MBE285
8
handbook, halfpage
transfer
0
handbook, halfpage
0 dB
transfer
(dB)
4
(dB)
4
flat
0
4
8
12
16
50 µs
8
J17
20 dB
12
20
16
10
75 µs
24
10
2
3
4
5
2
3
4
5
10
10
10
10
10
10
10
10
f (Hz)
f (Hz)
Fig.4 Noise reduction transfer as function of
input level.
Fig.5 LF de-emphasis curves.
1996 Mar 11
10
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
I2C-BUS PROTOCOL
Table 1 Slave receiver/transmitter address: D4 or D6 (HEX)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
1
1
0
1
0
1
AS(1)
R/W(2)
Notes
1. AS bit defined by level at address select (pin 12); 0 V = logic 0; 5 V = logic 1.
2. R/W = 0; TDA8745 is receiver (microcontroller is master transmitter).
R/W = 1; TDA8745 is transmitter (microcontroller is master receiver).
TDA8745 receiver use
In the receiver mode the device has four subaddresses with auto-increment, as shown in Tables 2 to 5.
Table 2 Input byte SA: 00; situation after POR
IL2
i7
IL1
i6
IL0
i5
IR2
i4
IR1
i3
IR0
i2
TUN9
i1
TUN8
i0
0
0
0
0
0
1
1
0
Table 3 Tuning byte SA: 01; situation after POR
TUN7
t7
TUN6
t6
TUN5
t5
TUN4
t4
TUN3
t3
TUN2
t2
TUN1
t1
TUN0
t0
1
1
1
0
1
1
0
0
Table 4 Select byte SA: 02; situation after POR
TEST
s7
BB
s6
OS1
s5
OS0
s4
PDM
s3
PE
s2
OML
s1
OMR
s0
0
0
0
0
0
0
1
1
Table 5 Audio byte SA: 03; situation after POR
LEV3
a7
LEV2
a6
LEV1
a5
LEV0
a4
NR
a3
DEM1
a2
DEM0
a1
BPFN
a0
1
1
0
0
1
1
1
0
TDA8745 transmitter use
No subaddress.
Table 6 Read byte
PDL
r7
PDR
r6
−
r5
−
r4
−
r3
−
r2
−
r1
POR
r0
0 or 1
0 or 1
1
1
1
1
1
0 or 1
1996 Mar 11
11
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
Slave receiver mode (bits transmitted from microcontroller to TDA8745)
Different IF inputs can be selected for the PLLs, for switching between different external BPFs and/or channels;
see Tables 7 and 8.
Table 7 IL2 to IL0; Input Left; note 1
IL2
i7
IL1
i6
IL0
i5
PE(2)
s2
MODE
0
0
0
0
1
1
1
1
X
X
X
X
0
1
0
0
1
1
0
0
1
1
0
0
1
1
X
X
0
1
0
1
0
1
0
1
0
1
0
1
X
X
0
0
0
0
0
0
0
0
1
1
1
1
1
1
IF input IN-1 selected for left PLL (after POR)
IF input IN-2 selected for left PLL
IF input IN-3 selected for left PLL
IF input IN-4 selected for left PLL
IF input IN-5 selected for left PLL
IF input IN-6 selected for left PLL
no selection
no selection
IF input IN-1 selected for left PLL
IF input IN-2 selected for left PLL
IF input IN-3 selected for left PLL
IF input IN-4 selected for left PLL
IF input IN-5 used as output; 0 = 0 V
IF input IN-5 used as output; 1 = 5 V
Notes
1. X = don’t care.
2. Bit PE (s2) can be set to logic 1 to change IF input 5 into digital output for external switching purposes.
1996 Mar 11
12
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
Table 8 IR2 to IR0; input right; note 1
IR2
i4
IR1
i3
IR0
i2
PE(2)
s2
MODE
0
0
0
0
1
1
1
1
X
X
X
X
0
1
0
0
1
1
0
0
1
1
0
0
1
1
X
X
0
1
0
1
0
1
0
1
0
1
0
1
X
X
0
0
0
0
0
0
0
0
1
1
1
1
1
1
IF input IN-1 selected for right PLL
IF input IN-2 selected for right PLL (after POR)
IF input IN-3 selected for right PLL.
IF input IN-4 selected for right PLL
IF input IN-5 selected for right PLL
IF input IN-6 selected for right PLL
no selection
no selection
IF input IN-1 selected for right PLL
IF input IN-2 selected for right PLL
IF input IN-3 selected for right PLL
IF input IN-4 selected for right PLL
IF input IN-6 used as output; 0 = 0 V
IF input IN-6 used as output; 1 = 5 V
Notes
1. X = don’t care.
2. Bit PE (s2) can be set to logic 1 to change IF input 6 into digital output for external switching purposes.
1996 Mar 11
13
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
Table 9 TUN9 to TUN0; tuning
TUN9 TUN8 TUN7 TUN6 TUN5 TUN4 TUN3 TUN2 TUN1 TUN0
10.7 IF
(MHz)
10.52 IF
(MHz)
i1
i0
t7
t6
t5
t4
t3
t2
t1
t0
0
0
0
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
1
1
1
0
0
1
0
1
0
3.82
3.83
3.84
4.00
4.01
4.02
0110101111 to 1001010011
3.85 to 5.49 4.03 to 5.67
5.50 5.68
5.51 to 5.99 5.69 to 6.17
6.00 6.18
6.01 to 6.49 6.19 to 6.67
6.50 6.68
6.51 to 7.01 6.69 to 7.19
7.02(1)
7.20(1)
7.03 to 7.37 7.21 to 7.55
7.38 7.56
7.39 to 7.73 7.57 to 7.91
7.74 7.92
7.75 to 9.74 7.93 to 9.92
1
1
1
1
1
1
0
0
0
0
1
1
0
1
1
1
0
0
1
0
1
0
1
1
0
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
1001010101 to 1010000101
0
0
0
0
1010000111 to 1010110111
0
1
1
1
1010111001 to 1011101011
1
1
0
1
1011101101 to 1100001111
0
0
1
0
1100010001 to 1100110011
0
1
1
0
1100110101 to 1111111100
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
0
1
9.75
9.76
9.77
9.93
9.94
9.95
Note
1. This is the situation after POR.
The frequency range of synthesizer is shown in Table 10.
Table 10 Frequency range of synthesizer
PARAMETER
RANGE
(MHz)
Synthesizer frequency range
Mixer input frequency range
Tuning range
29.04 to 40.94 (in 20 kHz grid); note 1
14.52 to 20.47 (in 10 kHz grid); note 2
3.82 to 9.77 (in 10 kHz grid; 10.7 MHz IF); note 3
Notes
1. Tuning the synthesizer below 29.04 MHz may be possible, but is not guaranteed.
2. The mixing frequency (fmix) can be calculated with equation:
fmix = (1024 + 512[TUN9] + 256[TUN8] + 128[TUN7] + 64[TUN6] + 32[TUN5] + 16[TUN4] + 8[TUN3] + 4[TUN2] +
2[TUN1] + [TUN0]) × 10 kHz.
3. Tuning frequency = mixer input frequency − 10.7 MHz.
1996 Mar 11
14
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
Table 11 Bit TEST
TEST
s7
MODE
DESCRIPTION
0
− (POR)
test
in applications this bit should always be logic 0, to avoid conflicts with other settings
setting TEST enables some special modes used for factory testing
1
Table 12 Bit BB; baseband; note 1
BB
MODE
s6
DESCRIPTION
0
1
synthesizer
baseband
synthesizer use (PLLs central frequency approximately 10.7 MHz) (after POR)
baseband use (PLLs central frequency approximately 6 MHz)
Note
1. The PLL demodulators can also be used for demodulating FM carriers (e.g. terrestrial TV sound) at baseband
frequencies, by changing the lock range of the PLLs.
Table 13 Bits OS1 and OS0; output select; note 1
OS1
s5
OS0
s4
MODE
DESCRIPTION
0
0
1
1
0
1
0
1
stereo (POR)
left
Left channel audio (pin 33) at OL; right channel audio (pin 31) at OR
Left channel audio (pin 33) at both OL and OR
right
Right channel audio (pin 31) at both OL and OR
external
External left at (pin 25) at OL; external right (pin 24) at OR
Note
1. The signal at both line outputs OL and OR (pins 23 and 22) can be selected with bits OS1 and OS0.
Table 14 Bit PDM; Presence Detector auto Mute; note 1
PDM
s3
MODE
DESCRIPTION
0
− (POR)
PDM
−
1
if this bit is set to logic 1, a channel for which no incoming carrier is found will be muted
Note
1. In both situations the status of the presence detector can be monitored by reading the bits PDL (r7) and PDR (r6)
back from the IC. Appropriate action (e.g. muting, channel selection or tuning) can then be taken by the
microcontroller. Note that this function also mutes the signal from the external inputs (pins 25 and 24). This may be
desirable when using these inputs for connecting a satellite descrambler box. If not, reset PDM (s3) to logic 0 when
selecting external [e.g. together with bits OS1 (s5) and OS0 (s4)].
1996 Mar 11
15
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
Table 15 Bit PE; Port Extension; note 1
PE
s2
DESCRIPTION
0
6 IF inputs; no digital output (after POR)
4 IF inputs; 2 digital outputs
1
Note
1. Two IF inputs (IN-5 and IN-6; pins 7 and 8) can be used as digital output instead. If no more than four IF inputs are
needed, two external functions can be controlled via the I2C-bus this way. The level at these pins is controlled by
bits IL2 (i7) and IR2 (i4); see Tables 7 and 8.
Table 16 Bits OML and OMR; Output Mute Left and Output Mute Right; note 1
BIT
LEVEL
MODE
DESCRIPTION
OML (s1)
0
1
0
1
−
−
mute
−
Left audio channel is muted
OMR (s0)
−
mute
Right audio channel is muted
Note
1. Left and right audio can be muted independently. Note that also the external input signals (pins 25 and 24) can be
muted this way.
1996 Mar 11
16
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
Table 17 Bits LEV3 to LEV0; level adjust; note 1
SECONDARY
CHANNELS(2)
(kHz)
LEV3
a7
LEV2
a6
LEV1
a5
LEV0
a4
MAIN CHANNEL(2)
(kHz)
MODE
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
−12 dB
−11 dB
−10 dB
−9 dB
−8 dB
−7 dB
−6 dB
−5 dB
−4 dB
−3 dB
−2 dB
−1 dB
0 dB
199
177
158
141
126
112
100
89
338
302
269
240
214
190
170
151
135
120
107
95
79
71
63
56
50(3)
85(3)
+1 dB
+2 dB
+3 dB
45
76
40
68
35
60
Notes
1. The audio level can be adjusted in steps of 1 dB, to adjust for different FM deviations used in main channel audio
carriers and/or spread in PLL output amplitude. With secondary carriers the Noise Reduction (NR) is to be used with
the 0 dB setting (note that the NR audio frequency response is level dependent, therefore another setting than 0 dB
is only to be used when making a fine-adjustment (+2 dB/−2 dB) for PLL spread. Typical setting for main channel
carriers is in most cases 85 kHz (0 dB) or 76 kHz (+1 dB).
2. Maximum deviation.
3. Situation after POR.
Table 18 Bit NR; Noise Reduction; note 1
NR
a3
MODE
DESCRIPTION
0
NR bypassed Noise Reduction bypassed (main channel)
NR active Noise Reduction active (secondary channels) (after POR)
1
Note
1. For reception of main channel carriers the NR circuit can be bypassed.
1996 Mar 11
17
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
Slave transmitter mode (bits transmitted from
TDA8745 to microcontroller)
Table 19 Bits DEM1 and DEM0; De-emphasis; note 1;
see Fig.5
Table 21 Bit PDL; Presence Detector Left; note 1
DEM1
a2
DEM0
a1
DE-EMPHASIS
PDL
DESCRIPTION
r7
0
0
1
1
0
1
0
1
no de-emphasis (flat)
J17
50 µs(2)
0
1
carrier detected at left channel
no carrier detected at left channel
75 µs [por](3)
Note
Notes
1. Bit PDL (r7) transmits the current status of the left
channel presence detector. When PDL = 1, no carrier
is found at the currently selected frequency. If bit
PDM (s3) = 0 the left channel audio is muted.
1. Different de-emphasis characteristics can be selected,
to adjust for different main channel audio carriers.
2. In most cases the de-emphasis needed for main
channel carriers is 50 µs.
Table 22 Bit PDR; Presence Detector Right; note 1
3. The NR is to be used with the 75 µs setting for
standard secondary channels.
PDR
DESCRIPTION
r6
Table 20 Bit BPFN; Band-Pass Filter Not; note 1
0
1
carrier detected at right channel
no carrier detected at right channel
BPFN
DESCRIPTION
a0
Note
0
mixer input signal filtered by BPF
(after POR)
1. Bit PDR (r6) transmits the current status of the right
channel presence detector. When PDR = 1, no carrier
is found at the currently selected frequency. If bit
PDM (s3) = 0 the right channel audio is muted.
1
mixer input signal is not filtered
Note
1. To avoid interference by the video signal, the incoming
baseband signal is filtered. If this filtering is not
required the filter can be switched off.
Table 23 Bit POR; Power-On Reset; note 1
POR
r0
DESCRIPTION
0
1
normal operation
POR generated; power dip detected since last read of POR bit
Note
1. At switching on, or after a power dip on the I2C-bus supply voltage (VP2), an internal signal is generated which resets
the I2C-bus registers to a pre-defined state. If bit POR (r0) = 1, such a situation has occurred since the last time the
read byte was read. After reading, the bit is reset to logic 0.
Table 24 Bits r5 to r1
−
r5
−
r4
−
r3
−
r2
−
r1
DESCRIPTION
1
1
1
1
1
These bits have no function. Although their state is fixed, the microcontroller
should not rely on this because of eventual future use.
1996 Mar 11
18
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VP1
PARAMETER
CONDITIONS
MIN.
MAX.
5.5
UNIT
synthesizer and mixer supply voltage
I2C-bus supply voltage
note 1
note 1
note 1
note 1
note 2
note 1
0
0
0
0
0
0
0
V
VP2
VP3
Vn
5.5
13.2
5.5
VP2
7.7
1
V
general supply voltage
V
voltage on pins 2, 3, 5 and 40
voltage on pins 7 and 8
V
V
voltage on pins 1 and 42
V
Vi
input voltage on pins 7, 8, 9, 11, 13 and 15 notes 1 and 3
storage temperature
V
Tstg
Tamb
−65
−20
+150
+70
°C
°C
operating ambient temperature
Notes
1. All voltages referenced to ground at pins 6, 10, 14 and 32.
2. Port Extension enabled (PE = 1; see Table 15).
3. IN-5 and IN-6 (pins 7 and 8) not being in the Port Extension mode.
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
PARAMETER
VALUE
UNIT
thermal resistance from junction to ambient in free air
SDIP42
QFP44
50
60
K/W
K/W
1996 Mar 11
19
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
DC CHARACTERISTICS
All voltages referenced to ground (pins 6, 10, 14 and 32). In accordance with the block diagram (see Fig.1);
P1 = VP2 = 5 V; VP3 = 12 V; Tamb = 25 °C; fOS1 = 10.7 MHz; fOS2 = 10.52 MHz (no modulation; see note 1); unless
V
otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
VP1
VP2
VP3
IP1
synthesizer and mixer supply voltage
I2C-bus supply voltage
4.5
5.0
5.5
V
4.5
8.0
−
5.0
12
5.5
13.2
48
V
general supply voltage
V
synthesizer and mixer supply current
I2C-bus supply current
37
mA
mA
mA
mW
IP2
−
0.6
35
−
IP3
general supply current
−
46
Ptot
total power dissipation
−
610
800
Pins
V21,22,23
V24,25,31,33
V31,33
V30,34
V27,37
V19
voltage on pins 21, 22 and 23
voltage on pins 24, 25, 31 and 33
voltage on pins 31 and 33
voltage on pins 30 and 34
voltage on pins 27 and 37
voltage on pin 19
−
3.8
3.8
3.8
3.8
3.8
3.8
0
−
V
V
V
V
V
V
V
V
V
V
V
V
V
−
−
−
−
−
−
−
−
3.7
−
3.9
−
V9,11,13,15
V42,1
voltage on pins 9, 11, 13 and 15
voltage on pins 42 and 1
voltage on pins 41 and 39
voltage on pin 5
note 2
−
3.4
2.6
1.8
2.4
2.6
1.3
−
V41,39
V5
−
−
−
−
V3
voltage on pin 3
−
−
V2
voltage on pin 2
−
−
V40
voltage on pin 40
−
−
Port extensions (pins 7 and 8; bit PE = 1)
VOH
VOL
HIGH level output voltage
LOW level output voltage
IOH = 0.5 mA
4.5
0
−
−
5
V
V
IOL = −0.5 mA
0.5
Notes
1. Presence of both carriers is required to achieve lock of the PLLs; otherwise not all pins will have a stable DC voltage.
2. Pin 7 and 8 functioning as normal inputs (bit PE = 0).
1996 Mar 11
20
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
AC CHARACTERISTICS
All voltages referenced to ground (pins 6, 10, 14 and 32); in accordance with the block diagram (see Fig.1);
P1 = VP2 = 5 V; VP3 = 12 V; Tamb = 25 °C; fmod = 1 kHz; ∆fM = 46 kHz; ∆fS1 = ∆fS2 = 27 kHz (reference levels);
V
fOM = 10.7 MHz; fOS1 = 10.7 MHz; fOS2 = 10.52 MHz; IF level at pins 9, 11, 13, 15, 7 and 8 = 20 mV (RMS value) and
SFE 10.7MJA (narrow), SFE 10.52MJA (narrow) and SFE 10.7MS3 (wide) ceramic filters; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX.
UNIT
Band-pass filter, mixer and buffer
Ri
input resistance
10
−
12.5
−
15
kΩ
Vi(rms)
V3
baseband input voltage (RMS value) note 1
200
−
mV
mV
dB
1 dB compression point (RMS value) ∆V3 − ∆V5 = 1 dB; note 2
−
180
−
Hl/Hh
filter transfer at 200 kHz
with respect to 7.3 MHz
−
−60
Hlm/Hh
filter transfer at 2 MHz
with respect to 7.3 MHz
−
−28
+2
−20
+4
dB
dB
dB
dB
Hmh/Hh
filter transfer at 5.3 MHz
with respect to 7.3 MHz
−2
15
10
Hh*A
Hh*C
filter transfer at 7.3 MHz and
mixer amplification
17
19
filter transfer at 7.3 MHz and
mixer conversion gain
note 3
12
14
Io(p)
Ro
mixer output current (peak)
mixer output resistance
5
7
−
mA
f = 10.7 MHz; note 4
−
12
30
Ω
Charge pump, buffer amplifier and VCO
t
repetition time of charge pump pulses
−
−
−
50
−
−
−
µs
SVCO
fVCO
VCO sensitivity
VCO frequency
note 5
−9
MHz/V
MHz
Vloopf = 2.6 V
35.4
Crystal oscillator (4 MHz)
fxtal
crystal oscillator frequency
−
4
−
MHz
Ω
Rxtal
Cxtal
Ii(p)
resonance resistance of crystal
parallel capacitance of crystal
−
−
60
10
−
−
4.5
−
pF
input current from external 4 MHz
source (peak)
note 6
50
µA
IF inputs (pins 9, 11, 13, 15, 7 and 8) and limiters
VIN-1 to IN-6(rms) input sensitivity (RMS value)
S/N(A) = 40 dB;
∆fS = 27 kHz; NR = on;
de-emphasis = 75 µs
−
−
−
0.3
0.8
−
1
mV
mV
mV
S/N(A) = 40 dB;
∆fM = 46 kHz; NR = off;
de-emphasis = 50 µs
2
Vi1 to Vi6
input signal
THD ≤ 0.5%
200
1996 Mar 11
21
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX.
UNIT
PLL FM demodulators
fCCO
free-running frequency
PLL left; BB = 0
−
10.6
10.6
6.9
6.9
−
−
MHz
PLL right; BB = 0
PLL left; BB = 1
PLL right; BB = 1
BB = 0; note 7
BB = 1; note 7
−
−
MHz
MHz
MHz
MHz
MHz
dBV
−
−
−
−
∆fCCO
lock range of PLLs
10
5.50
−
11.5
8.50
−
−
VOL; VOR
PLL output voltage (pins 23 and 22)
NR = off; DEEM = flat;
BB = 0
−5.6
NR = off; DEEM = flat;
BB = 1; note 8
−
−
−7.3
−
dBV
dB
∆VOL; ∆VOR
spread of PLL output voltage over
lock range (pins 23 and 22)
NR = off; DEEM = flat;
BB = 1; note 8
−
±1.5
Noise reduction
low-pass filter 50 kHz response
with respect to 1 kHz
note 9
−21
−1
−16
−11
dB
V37,27 (50 kHz)
---------------------------------
V37,27 (1 kHz)
Vo 23,22
output voltage (pins 23 and 22)
at 0 dB NR input level;
∆fS1 = ∆fS2 = 50 kHz;
DEEM = flat; note 10
+1
+3
dBV
at −20 dB NR input level;
∆fS1 = ∆fS2 = 5 kHz;
DEEM = flat
−29
−2
−26
−23
dBV
dB
15 kHz frequency response
with respect to 1 kHz
at 0 dB NR input level;
∆fS1 = ∆fS2 = 50 kHz;
DEEM = flat
0
+2
V 23,22 (15 kHz)
---------------------------------
V23,22 (1 kHz)
at −20 dB NR input level;
∆fS1 = ∆fS2 = 5 kHz;
DEEM = flat
−13
−11.5 −10
dB
Voffset(DC)
DC offset voltage on attack/recovery ∆f = 0 kHz; all PLLs locked 14
−
22
mV
capacitors (pins 38 and 26)
De-emphasis
15 kHz frequency response
with respect to 1 kHz flat
NR = off; DEEM = flat
−0.5
0.0
+0.5
dB
V 23,22 (15 kHz)
---------------------------------
V23,22 (1 kHz)
NR = off; DEEM = J17;
note 11
−13.9 −12.4 −10.9 dB
NR = off; DEEM = 50 µs
NR = off; DEEM = 75 µs
−15.2 −13.7 −12.2 dB
−18.6 −17.1 −15.6 dB
Ro
output resistance (pins 34 and 30)
100
125
150
Ω
1996 Mar 11
22
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX.
UNIT
Overall performance
Vi 3(rms)
baseband input sensitivity main
sound carrier (RMS value)
S/N(A) = 40 dB;
∆fS = 27 kHz; NR = on;
DEEM = 75 µs
−
0.5
1.5
−6
1.5
3
mV
S/N(A) = 40 dB;
∆fM = 46 kHz; NR = off;
DEEM = 50 µs
−
mV
Vo 23,22
output voltage
secondary channels;
∆fS = 27 kHz; NR = on;
DEEM = 75 µs
−8
−8
−4
−4
dBV
dBV
main channel;
−6
∆fS = 46 kHz; NR = off;
DEEM = 50 µs
UBS
THD
unbalance output voltage
total harmonic distortion
secondary channels;
NR = on; DEEM = 75 µs
−1
−1
−
−
+1
+1
0.5
dBV
dBV
%
main channel; NR = off;
DEEM = 50 µs
−
secondary channels;
NR = on; DEEM = 75 µs;
note 12
0.1
main channel; NR = off;
DEEM = 50 µs; note 12
−
0.1
77
0.5
%
S/N(A)
signal-to-noise ratio
A-weighted; secondary
channels (synthesizer
included); NR = on;
69
−
dB
DEEM = 75 µs; note 12
A-weighted; secondary
channels (synthesizer
excluded); NR = on;
72
80
62
70
−
−
−
dB
dB
dB
DEEM = 75 µs; note 12
A-weighted; main channel 54
(synthesizer included);
NR = off; DEEM = 50 µs;
note 12
A-weighted; main channel 62
(synthesizer excluded);
NR = off; DEEM = 50 µs;
note 12
MUTEatt
αct S/S
mute attenuation
output select left and right 74
muted
90
−
−
−
−
dB
dB
dB
dB
crosstalk attenuation between
secondary channels
−
74
SVRRP3
supply voltage ripple rejection
VRR = 100 mV; fi = 70 Hz;
NR = on; DEEM = 75 µs
−
−
14.3
15.6
VRR = 100 mV; fi = 1 kHz;
NR = on; DEEM = 75 µs
1996 Mar 11
23
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX.
UNIT
dB
SVRRP1-P2
supply voltage ripple rejection
VRR = 100 mV; fi = 70 Hz;
−
25
−
NR = on; DEEM = 75 µs
VRR = 100 mV; fi = 1 kHz;
−
4
−
dB
NR = on; DEEM = 75 µs
Output select
Vi 25,24
input voltage (pins 25 and 24)
−
−
8
dBV
Ri 25,24,33,31
input resistance at
100
150
200
kΩ
pins 25, 24, 33 and 31
Vo 23,22
Ro 23,22,21
THD
output voltage at pins 23 and 22
V24,25 = −6 dBV;
OS = external
−6.5
100
−
−6
−5.5
150
0.3
−
dBV
Ω
output resistance at
pins 23, 22 and 21
125
0.01
−
total harmonic distortion
V24,25 = −6 dBV;
%
OS = external; f = 1 kHz
S/N(A)
signal-to-noise ratio
A-weighted;
80
dB
V
24,25 = −6 dBV;
OS = external
αct L/R; αct R/L
crosstalk between channels
f = 1 kHz
−
80
−
dB
I2C-bus
Ci
input capacitance
SDA sink current
−
3
3
0
−
−
0
3
−
4
−
−
−
−
−
−
−
−
−
pF
mA
V
Isink
−
VIH
HIGH level input voltage
LOW level input voltage
HIGH level input current
LOW level input current
address D4H
5
VIL
1.5
10
10
1
V
IIH
µA
µA
V
IIL
Address D4H
Address D6H
fSCL
ADDsel = LOW
ADDsel = HIGH
address D6H
5
V
SCL frequency
100
kHz
Notes
1. Maximum of 0.5% THD at LF outputs.
2. When the increase of the output signal (pin 5 at 10.7 MHz) lags 1 dB behind the increase of the input signal
(pin 3; 7.02 MHz carrier), the so called 1 dB compression point is reached. For complex signals (more than one
sound carrier), this point will shift to a higher value.
3. The mixer performs both a mixing and amplifying action (normal operation). The synthesizer is tuned to the 7.3 MHz
incoming carrier.
4. The buffer output is sensitive to capacitive loading, therefore (capacitive) loads other than those present in the block
diagram (see Fig.1) should be avoided.
5. As present at the mixer output (pin 5) in ‘BPFTILT’ test mode the actual VCO sensitivity is two times the given value
because of the divide-by-two circuit between VCO output and mixer.
6. The required 4 MHz crystal can be omitted if this frequency is already available in the application. This signal source
should be connected to pin 40, via a capacitor in series with a resistor Rext. The minimum required AC current is
50 µA, determined by the resistors Rint and Rext and the level of the 4 MHz AC voltage. The value of Rint is 700 Ω
and the signal shape of the signal is not important.
1996 Mar 11
24
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
7. Maximum THD of 0.5%; 8 V < VP3 < 13.2 V; 0 °C < Tamb < 70 °C. Measured at pins 34 and 30; NR = off;
DEEM = flat.
8. Correction of output voltage is possible by correcting the volume level.
9. Measured at pins 37 and 27 with no electrolytic capacitors connected to these pins.
10. Input level of 0 dB; signal level in accordance with ∆fS1 = ∆fS2 = 50 kHz. At this input level, the NR response is equal
for high and low frequencies (see Fig.4).
11. J17 de-emphasis includes +6 dB amplification (see Fig.5).
12. Both PLLs locked.
INTERNAL CIRCUITRY
For description see Chapter “Pinning”.
SYMBOL
CDC R
PIN
EQUIVALENT CIRCUIT
1
20 Ω
20 Ω
1
1640 Ω
MLD094
SLF
2
2 kΩ
1 kΩ
275 Ω
2
2 kΩ
2 kΩ
MLD095
1996 Mar 11
25
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
SYMBOL
PIN
EQUIVALENT CIRCUIT
BASEBAND IN
3
3
12.5 kΩ
2.5 V
MLD096
VP1
4
5
4
V
P1
MLD060
IF OUT
5
MLD061
SYNGND
6
7
SYNGND
6
MLD062
IN-5
275 Ω
7
MLD063
1996 Mar 11
26
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
SYMBOL
IN-6
PIN
EQUIVALENT CIRCUIT
8
275 Ω
8
MLD097
IN-1
9
275 Ω
9
MLD064
HFGND
10
11
HFGND
10
MLD065
IN-2
275 Ω
11
MLD066
ADDsel
12
275 Ω
12
MLD067
1996 Mar 11
27
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
SYMBOL
IN-3
PIN
EQUIVALENT CIRCUIT
13
275 Ω
13
MLD114
I2CGND
14
15
2
I CGND
14
MLD068
IN-4
275 Ω
15
MLD098
VP2
16
17
V
16
P2
MLD069
SCL
275 Ω
17
MLD070
SDA
18
275 Ω
18
MLD071
1996 Mar 11
28
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
SYMBOL
PIN
EQUIVALENT CIRCUIT
Vref
19
25 Ω
40 kΩ
125 Ω
275 Ω
19
15.2 kΩ
MLD072
VP3
20
21
20
V
P3
MLD073
OM
125 Ω
21
MLD074
3.8 V
OR
22
125 Ω
22
MLD075
3.8 V
1996 Mar 11
29
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
SYMBOL
PIN
EQUIVALENT CIRCUIT
OL
23
125 Ω
23
MLD076
3.8 V
EXTR
24
25
26
transfer gate
I
O
20 Ω 103 kΩ
24
I
O
transfer gate
47 kΩ
3.8 V
3.8 V
MLD077
EXTL
transfer gate
I
O
20 Ω 103 kΩ
25
I
O
transfer gate
47 kΩ
3.8 V
3.8 V
MLD078
CATT/REC R
100 Ω
100 Ω
26
3.8 V
MLD079
1996 Mar 11
30
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
SYMBOL
RECTR
PIN
EQUIVALENT CIRCUIT
27
4.7 kΩ
27
MLD080
CNR D R
28
AC signal current
7.5 kΩ
275 Ω
28
MLD081
CD R
29
30
DEEM OUT R
transfer gate
I
O
125 Ω
30
29
I
O
transfer gate
3.8 V
MLD082
CCL R
31
transfer gate
I
O
20 Ω 103 kΩ
31
I
O
transfer gate
47 kΩ
3.8 V
3.8 V
MLD083
1996 Mar 11
31
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
SYMBOL
AFGND
PIN
EQUIVALENT CIRCUIT
32
substrate
AFGND
32
MLD084
CCL L
33
transfer gate
I
O
20 Ω 103 kΩ
33
I
O
transfer gate
47 kΩ
3.8 V
3.8 V
MLD085
DEEM OUT L
CD L
34
35
transfer gate
I
O
125 Ω
34
35
I
O
transfer gate
3.8 V
MLD086
CNR D L
36
AC signal current
7.5 kΩ
275 Ω
36
MLD224
1996 Mar 11
32
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
SYMBOL
RECTL
PIN
EQUIVALENT CIRCUIT
37
4.7 kΩ
37
MLD088
CATT/REC L
38
100 Ω
100 Ω
38
3.8 V
MLD089
PRES DET R
39
100 Ω
100 Ω
39
MLD090
XTAL
40
40
MLD091
1996 Mar 11
33
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
SYMBOL
PIN
EQUIVALENT CIRCUIT
PRES DET L
41
100 Ω
100 Ω
41
MLD092
CDC L
42
20 Ω
20 Ω
42
1640 Ω
MLD093
1996 Mar 11
34
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
PACKAGE OUTLINES
SDIP42: plastic shrink dual in-line package; 42 leads (600 mil)
SOT270-1
D
M
E
A
2
A
L
A
1
c
e
(e )
1
w M
Z
b
1
M
H
b
42
22
pin 1 index
E
1
21
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
max.
A
A
2
max.
(1)
(1)
Z
1
w
UNIT
b
b
c
D
E
e
e
L
M
M
H
1
1
E
min.
max.
1.3
0.8
0.53
0.40
0.32
0.23
38.9
38.4
14.0
13.7
3.2
2.9
15.80
15.24
17.15
15.90
mm
5.08
0.51
4.0
1.778
15.24
0.18
1.73
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
90-02-13
95-02-04
SOT270-1
1996 Mar 11
35
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 x 10 x 1.75 mm
SOT307-2
y
X
A
33
23
34
22
Z
E
e
H
E
E
A
2
A
(A )
3
A
1
w M
θ
b
p
L
p
pin 1 index
L
12
44
detail X
1
11
w M
Z
v
M
A
D
b
p
e
D
B
H
v
M
B
D
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
D
H
L
L
v
w
y
Z
Z
θ
1
2
3
p
E
p
D
E
max.
10o
0o
0.25 1.85
0.05 1.65
0.40 0.25 10.1 10.1
0.20 0.14 9.9 9.9
12.9 12.9
12.3 12.3
0.95
0.55
1.2
0.8
1.2
0.8
mm
2.10
0.25
0.8
1.3
0.15 0.15 0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-02-04
97-08-01
SOT307-2
1996 Mar 11
36
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary from
50 to 300 seconds depending on heating method. Typical
reflow temperatures range from 215 to 250 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheat for 45 minutes at 45 °C.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
WAVE SOLDERING
Wave soldering is not recommended for QFP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.
SDIP
SOLDERING BY DIPPING OR BY WAVE
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
If wave soldering cannot be avoided, the following
conditions must be observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
• The footprint must be at an angle of 45° to the board
direction and must incorporate solder thieves
downstream and at the side corners.
Even with these conditions, do not consider wave
soldering the following packages: QFP52 (SOT379-1),
QFP100 (SOT317-1), QFP100 (SOT317-2),
QFP100 (SOT382-1) or QFP160 (SOT322-1).
REPAIRING SOLDERED JOINTS
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured. Maximum permissible solder
temperature is 260 °C, and maximum duration of package
immersion in solder is 10 seconds, if cooled to less than
150 °C within 6 seconds. Typical dwell time is 4 seconds
at 250 °C.
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
QFP
REFLOW SOLDERING
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Reflow soldering techniques are suitable for all QFP
packages.
REPAIRING SOLDERED JOINTS
The choice of heating method may be influenced by larger
plastic QFP packages (44 leads, or more). If infrared or
vapour phase heating is used and the large packages are
not absolutely dry (less than 0.1% moisture content by
weight), vaporization of the small amount of moisture in
them can cause cracking of the plastic body. For more
information, refer to the Drypack chapter in our “Quality
Reference Handbook” (order code 9397 750 00192).
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
1996 Mar 11
37
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
1996 Mar 11
38
Philips Semiconductors
Preliminary specification
Satellite sound receiver with I2C-bus control
TDA8745
NOTES
1996 Mar 11
39
Philips Semiconductors – a worldwide company
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P.O. Box 4252, JAKARTA 12950,
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Internet: http://www.semiconductors.philips.com/ps/
For all other countries apply to: Philips Semiconductors,
International Marketing and Sales, Building BE-p,
P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands,
Telex 35000 phtcnl, Fax. +31-40-2724825
Yongsan-ku, SEOUL, Tel. (02)709-1412, Fax. (02)709-1415
SCDS47
© Philips Electronics N.V. 1996
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA,
SELANGOR, Tel. (03)750 5214, Fax. (03)757 4880
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Tel. 9-5(800)234-7381, Fax. (708)296-8556
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Tel. (040)2783749, Fax. (040)2788399
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All rights are reserved. Reproduction in whole or in part is prohibited without the
prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation
or contract, is believed to be accurate and reliable and may be changed without
notice. No liability will be accepted by the publisher for any consequence of its
use. Publication thereof does not convey nor imply any license under patent- or
other industrial or intellectual property rights.
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Exchange Bldg. ST-2/A, Block 9, KDA Scheme 5, Clifton,
KARACHI 75600, Tel. (021)587 4641-49,
Fax. (021)577035/5874546
537021/1100/02/pp40
Date of release: 1996 Mar 11
9397 750 00723
Document order number:
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