TDA8754H [NXP]
Triple high speed ADC for LCD drive; 三重高速ADC的LCD驱动器
| 型号： | TDA8754H |
| 厂家： | 
NXP |
| 描述： | Triple high speed ADC for LCD drive |
| 文件： | 总8页 (文件大小：81K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA8754
Triple high speed ADC for LCD
drive
1998 Sep 30
Objective specification
File under Integrated Circuits, IC02
Philips Semiconductors
Objective specification
Triple high speed ADC for LCD drive
TDA8754
FEATURES
• Triple 8-bit Analog-to-Digital Converter (ADC)
• Sampling rate up to 170 MHz
• IC controllable via a serial interface, which can be either
I2C-bus or 3-wire, selected via a TTL input pin
• IC analog input 0.5 to 1.1 V (peak-to-peak value) to
have full-scale ADC input
GENERAL DESCRIPTION
The TDA8754 is a triple 8-bit ADC with controllable gain
and clamps for the digitizing of large bandwidth
R, G, B signals. Clamp level, gain, and all the other
settings are controlled via a serial interface (either I2C-bus
or 3-wire, selected through a logic input). The gain is
optimized for stability versus temperature variations.
• Clamps for programming a clamp level through a
clamping code between −63 and +64 by steps of 1 LSB
• Controllable gain stages: gain controlled independently
on the 3 channels via the serial interface to have a
full-scale resolution to 1%
• Low gain variation at different temperatures
• Analog bandwidth of 400 MHz
The IC also includes a PLL that generates the ADC clock
which can be locked to the horizontal line frequency.
The PLL jitter is minimized for high resolution PC graphics
applications. An external clock can also be used to clock
the ADC.
• Controllable PLL via the serial interface generates the
ADC clock. It can be locked on line frequencies from
15 kHz up to 280 kHz.
The clamp pulse is generated on-chip, it can be adjusted
in position (with respect to HSYNC) and duration through
the serial interface.
• Integrated PLL divider
• Integrated clamp pulse and H and V LCD control pulses
generation (independently adjustable in position and
duration). Also a data enable signal can be generated,
independently adjustable in position and duration with
respect to HSYNC.
The horizontal and vertical control pulses for the LCD can
be adjusted in duration through the serial interface. Also a
data enable signal can be generated, independently
adjustable in position (with respect to HSYNC) and
duration through the serial interface.
• The pixel clock is available at half the clock frequency
• Programmable phase clock adjustment cells
• Internal voltage regulators
Outputs: one port output up to 140 MHz or demultiplexed
2-port outputs on the full speed range. Operating mode
selectable through the serial interface.
• TTL compatible digital inputs
• 3.3 V CMOS compatible digital outputs
• Outputs: one port output up to 140 MHz or 2-port
demultiplexed outputs on the full speed range.
Operating mode selectable through the serial interface.
• Chip enable: high-impedance ADC output
• Power-down mode.
ORDERING INFORMATION
PACKAGE
TYPE
NUMBER
NAME
DESCRIPTION
VERSION
TDA8754H
LQFP144 plastic low profile quad flat package; 144 leads; body 20 × 20 × 1.4 mm
SOT486-1
1998 Sep 30
2
Philips Semiconductors
Objective specification
Triple high speed ADC for LCD drive
TDA8754
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
4.75
TYP.
5.0
MAX.
UNIT
VCCA
analog supply voltage for
R, G, B channels
5.25
V
VDD
logic supply voltage for I2C-bus and
3-wire interface
3.0
5.0
5.25
V
VCCD
digital supply voltage
4.75
3.0
5.0
3.3
5.25
3.6
V
V
VCC(O)
output stages supply voltage for
R, G, B channels
VCCA(PLL)
analog PLL supply voltage
4.75
4.75
−
5.0
5.0
tbf
5.25
5.25
−
V
VCC(O)(PLL) output PLL supply voltage
V
ICCA
analog supply current for
R, G, B channels
mA
IDD
logic supply current for I2C-bus and
3-wire interface
−
tbf
−
mA
ICCD
digital supply current
−
−
tbf
tbf
−
−
mA
mA
ICC(O)
output stages supply current for
R, G, B channels
ICCA(PLL)
ICC(O)(PLL)
INL
analog PLL supply current
output PLL supply current
DC integral non-linearity
−
−
−
−
−
tbf
tbf
±1
±0.5
−
−
mA
−
mA
±1.5
±0.8
200
LSB
LSB
ppm/K
DNL
DC differential non-linearity
gain stability versus temperature
∆Gamp
Vref = 2.5 V with
100 ppm/K variation
tset
setting time of the block ADC + AGC input signal setting time
−
2.5
3.5
ns
<1 ns; setting to 1%;
fi = 85 MHz
fclk(max)
fref
maximum conversion rate
PLL reference clock frequency
output clock frequency
170
15
12
−
−
−
MHz
kHz
MHz
ns
−
120
170
−
fPLL
−
jPLL(rms)
maximum PLL phase jitter
(RMS value)
0.2
D/DPLL
Ptot
PLL divider ratio
512
−
4095
1.2
total power consumption
fclk = 170 MHz; ramp input
−
tbf
W
1998 Sep 30
3
Philips Semiconductors
Objective specification
Triple high speed ADC for LCD drive
TDA8754
BLOCK DIAGRAM
RBOT
CLAMP
9
8
RED CHANNEL
OUTPUTS
RIN
RDEC
RA0 to RA7
and ROR
MUX
ADC
RB0 to RB7
V
ref
RGAINC
GGAINC
GIN
GBOT
9
8
GA0 to GA7
and GOR
GREEN CHANNEL
GDEC
GB0 to GB7
OEN
CLP
BCLP
BBOT
BGAINC
BIN
9
8
BA0 to BA7
and BOR
BLUE CHANNEL
BDEC
BB0 to BB7
CKADCO
CKBO
CKAO
DEN
TDA8754
2
CLP
I C:1-bit
(Hlevel) VSYNC
CKEXT
SEN
PLL
SERIAL
REGULATOR
CZ
SCL
SDA
INTERFACE
2
I C-BUS
CP
AND 3-WIRE
HSYNCO
VSYNCO
2
I C-3W
2
I C:1-bit
(Hlevel)
HSYNC
PWOFF
DEC1 DEC2
FCE045
CKA/2, CKA/2
Fig.1 Block diagram.
4
1998 Sep 30
Philips Semiconductors
Objective specification
Triple high speed ADC for LCD drive
TDA8754
PACKAGE OUTLINE
LQFP144: plastic low profile quad flat package; 144 leads; body 20 x 20 x 1.4 mm
SOT486-1
y
X
A
108
109
73
72
Z
E
e
H
A
E
2
A
E
(A )
3
A
1
θ
w M
p
L
p
b
L
pin 1 index
detail X
37
144
1
36
v
M
A
Z
w M
D
b
p
e
D
B
H
v
M
B
D
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
D
H
L
L
v
w
y
Z
Z
E
θ
1
2
3
p
E
p
D
max.
7o
0o
0.15 1.45
0.05 1.35
0.27 0.20 20.1 20.1
0.17 0.09 19.9 19.9
22.15 22.15
21.85 21.85
0.75
0.45
1.40 1.40
1.10 1.10
mm
1.6
0.25
1.0
0.2
0.1
0.1
0.50
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
SOT486-1
97-08-04
1998 Sep 30
5
Philips Semiconductors
Objective specification
Triple high speed ADC for LCD drive
TDA8754
If wave soldering cannot be avoided, for LQFP
packages with a pitch (e) larger than 0.5 mm, the
following conditions must be observed:
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.
• The footprint must be at an angle of 45° to the board
direction and must incorporate solder thieves
downstream and at the side corners.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(order code 9398 652 90011).
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
Reflow soldering
Reflow soldering techniques are suitable for all LQFP
packages.
6 seconds. Typical dwell time is 4 seconds at 250 °C.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Repairing soldered joints
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 50 and 300 seconds depending on heating
method. Typical reflow peak temperatures range from
215 to 250 °C.
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
Wave soldering
Wave soldering is not recommended for LQFP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.
CAUTION
Wave soldering is NOT applicable for all LQFP
packages with a pitch (e) equal or less than 0.5 mm.
1998 Sep 30
6
Philips Semiconductors
Objective specification
Triple high speed ADC for LCD drive
TDA8754
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
1998 Sep 30
7
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© Philips Electronics N.V. 1998
SCA60
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545104/750/01/pp8
Date of release: 1998 Sep 30
Document order number: 9397 750 04134
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