TDA8762AM8DB [NXP]
IC 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28, PLASTIC, SOT-341-1, SSOP-28, Analog to Digital Converter;
| 型号： | TDA8762AM8DB |
| 厂家： | 
NXP |
| 描述： | IC 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28, PLASTIC, SOT-341-1, SSOP-28, Analog to Digital Converter 光电二极管 转换器 |
| 文件： | 总29页 (文件大小：218K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA8762A
10-bit high-speed low-power
analog-to-digital converter
1996 Mar 21
Product specification
Supersedes data of 1995 April 27
File under Integrated Circuits, IC02
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
FEATURES
APPLICATIONS
• 10-bit resolution
High-speed analog-to-digital conversion for:
• Video data digitizing
• Sampling rate up to 80 MHz
• DC sampling allowed
• Radar pulse analysis
• One clock cycle conversion only
• Transient signal analysis
• High energy physics research
• Σ∆ modulators
• High signal-to-noise ratio over a large analog input
frequency range (9.3 effective bits at 4.43 MHz
full-scale input at fclk = 80 MHz)
• Medical imaging.
• No missing codes guaranteed
• In range (IR) TTL output
GENERAL DESCRIPTION
• TTL compatible digital inputs and outputs
• Low-level AC clock input signal allowed
• External reference voltage regulator
• Power dissipation only 380 mW (typical)
The TDA8762A is a 10-bit high-speed analog-to-digital
converter (ADC) for professional video and other
applications. It converts the analog input signal into 10-bit
binary-coded digital words at a maximum sampling rate of
80 MHz. All digital inputs and outputs are TTL compatible,
although a low-level sine wave clock input signal is
allowed.
• Low analog input capacitance, no buffer amplifier
required
• No sample-and-hold circuit required.
QUICK REFERENCE DATA
SYMBOL
VCCA
PARAMETER
CONDITIONS
MIN.
4.75
4.75
4.4
−
TYP. MAX. UNIT
analog supply voltage
digital supply voltage
output stages supply voltage
analog supply current
digital supply current
output stages supply current
integral non-linearity
differential non-linearity
maximum clock frequency
TDA8762AM/6
5.0
5.0
5.0
29
5.25
5.25
5.25
36
V
VCCD
VCCO
ICCA
V
V
mA
mA
mA
LSB
LSB
ICCD
−
24
30
ICCO
INL
CL = 15 pF; ramp input
−
23
30
f
clk = 80 MHz; ramp input
−
±0.75 ±1.5
DNL
fclk(max)
fclk = 80 MHz; ramp input
−
±0.3
±0.7
60
80
−
−
−
MHz
MHz
mW
TDA8762AM/8
−
−
Ptot
total power dissipation
380
500
ORDERING INFORMATION
TYPE
PACKAGE
SAMPLING
NUMBER
FREQUENCY (MHz)
NAME
DESCRIPTION
VERSION
TDA8762AM/6 SSOP28
TDA8762AM/8 SSOP28
SOT341-1
SOT341-1
60
80
plastic shrink small outline package; 28 leads;
body width 5.3 mm
1996 Mar 21
2
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
BLOCK DIAGRAM
V
CLK
1
V
CCD
OE
10
CCA
3
11
2
CLOCK DRIVER
TC
TDA8762A
V
RT
9
25 D9
24 D8
23 D7
22 D6
21 D5
20 D4
19 D3
18 D2
17 D1
MSB
R
LAD
V
I
8
7
ANALOG -TO - DIGITAL
CONVERTER
analog
voltage input
LATCHES
TTL OUTPUTS
data outputs
V
RM
16 D0
V
LSB
CCO1
13
V
RB
6
28
26
V
CCO2
IR
IN RANGE LATCH
TTL OUTPUT
output
12
AGND1 AGND2 DGND
27
4
5
14
OGND1 OGND2
MBE560
analog grounds
digital ground
output grounds
Fig.1 Block diagram.
1996 Mar 21
3
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
PINNING
SYMBOL PIN
DESCRIPTION
CLK
TC
1
2
3
4
5
6
7
8
9
clock input
two’s complement input (active LOW)
analog supply voltage (5 V)
analog ground 1
VCCA
AGND1
AGND2
VRB
analog ground 2
handbook, halfpage
reference voltage BOTTOM input
reference voltage MIDDLE
analog input voltage
V
CLK
TC
1
2
28
CCO2
VRM
VI
27 OGND2
IR
V
3
26
CCA
VRT
reference voltage TOP input
AGND1
AGND2
4
25 D9
24 D8
23 D7
22 D6
OE
10 output enable input
(TTL level input, active LOW)
5
VCCD
11 digital supply voltage (5 V)
12 digital ground
V
6
RB
DGND
VCCO1
V
7
RM
TDA8762A
13 supply voltage for output stages 1
(5 V)
V
I
D5
8
21
20 D4
D3
V
9
RT
OGND1
n.c.
D0
14 output ground 1
15 not connected
OE
10
11
19
V
16 data output; bit 0 (LSB)
17 data output; bit 1
18 data output; bit 2
19 data output; bit 3
20 data output; bit 4
21 data output; bit 5
22 data output; bit 6
23 data output; bit 7
24 data output; bit 8
25 data output; bit 9 (MSB)
26 in range data output
27 output ground 2
18 D2
17 D1
16 D0
15 n.c.
CCD
D1
DGND 12
D2
V
13
CCO1
D3
OGND1 14
D4
MBE561
D5
D6
D7
D8
D9
IR
OGND2
VCCO2
28 supply voltage for output stages 2
(5 V)
Fig.2 Pin configuration.
1996 Mar 21
4
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VCCA
PARAMETER
analog supply voltage
CONDITIONS
MIN.
−0.3
MAX.
+7.0
UNIT
note 1
note 1
note 1
V
V
V
VCCD
VCCO
∆VCC
digital supply voltage
−0.3
−0.3
+7.0
+7.0
output stages supply voltage
supply voltage difference
V
V
V
CCA − VCCD
CCA − VCCO
CCD − VCCO
−1.0
−1.0
−1.0
−0.3
−
+1.0
+1.0
+1.0
+7.0
VCCD
V
V
V
V
V
VI
input voltage
referenced to AGND
referenced to DGND
Vclk(p-p)
AC input voltage for switching
(peak-to-peak value)
IO
output current
−
10
mA
°C
°C
°C
Tstg
Tamb
Tj
storage temperature
operating ambient temperature
junction temperature
−55
0
+150
+70
+150
−
Note
1. The supply voltages VCCA, VCCD and VCCO may have any value between −0.3 and +7.0 V provided that the supply
voltage differences ∆VCC are respected.
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
PARAMETER
VALUE
UNIT
thermal resistance from junction to ambient in free air
110
K/W
1996 Mar 21
5
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
CHARACTERISTICS
VCCA = V3 to V4 and V5 = 4.75 to 5.25 V; VCCD = V11 to V12 = 4.75 to 5.25 V; VCCO = V13 and V28 to V14 and
V27 = 4.4 to 5.25 V; AGND and DGND shorted together; Tamb = 0 to +70 °C; typical values measured at
VCCA = VCCD = VCCO = 5 V; VI(p-p) = 2.0 V; CL = 15 pF and Tamb = 25 °C; unless otherwise specified.
SYMBOL
Supply
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VCCA
VCCD
VCCO
∆VCC
analog supply voltage
digital supply voltage
output stages supply voltage
voltage difference
4.75
4.75
4.4
5.0
5.25
V
5.0
5.0
5.25
5.25
V
V
V
V
V
CCA − VCCD
CCA − VCCO
CCD − VCCO
−0.25
−0.4
−0.4
−
−
+0.25
+0.4
+0.4
36
V
−
V
−
V
ICCA
ICCD
ICCO
analog supply current
digital supply current
29
24
23
mA
mA
mA
−
30
output stages supply current
CL = 15 pF; ramp input
−
30
Inputs
CLOCK INPUT CLK (REFERENCED TO DGND); note 1
VIL
VIH
IIL
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
input impedance
0
−
−
0
−
2
2
0.8
VCCD
+1
20
−
V
2.0
−1
−
V
Vclk = 0.4 V
Vclk = 2.7 V
fclk = 80 MHz
fclk = 80 MHz
µA
µA
kΩ
pF
IIH
ZI
−
CI
input capacitance
−
−
INPUTS OE AND TC (REFERENCED TO DGND); see Table 2
VIL
VIH
IIL
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
0
−
−
−
−
0.8
VCCD
−
V
2.0
−400
−
V
VIL = 0.4 V
VIH = 2.7 V
µA
µA
IIH
20
VI (ANALOG INPUT VOLTAGE REFERENCED TO AGND)
IIL
IIH
ZI
LOW level input current
HIGH level input current
input impedance
VI = 1.3 V
−
−
−
−
0
−
−
−
−
µA
µA
kΩ
pF
VI = 3.8 V
70
5
fi = 4.43 MHz
fi = 4.43 MHz
CI
input capacitance
8
1996 Mar 21
6
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Reference voltages for the resistor ladder; see Table 1
VRB
VRT
Vdiff
reference voltage BOTTOM
reference voltage TOP
1.2
1.3
−
V
−
3.8
2.5
V
CCA − 0.8 V V
differential reference voltage
1.8
3.0
V
V
RT − VRB
Iref
reference current
resistor ladder
−
−
−
28
−
−
−
mA
Ω
RLAD
TCRLAD
90
temperature coefficient of the
resistor ladder
1860
167
220
220
2.06
ppm
mΩ/K
mV
mV
V
VosB
VosT
offset voltage BOTTOM
offset voltage TOP
note 2
note 2
note 3
−
−
−
−
VI(p-p)
analog input voltage
(peak-to-peak value)
1.5
2.5
Outputs
DIGITAL OUTPUTS D9 TO D0 AND IR (REFERENCED TO OGND)
VOL
VOH
LOW level output voltage
HIGH level output voltage
IO = 1 mA
0
−
−
−
−
−
0.4
V
IO = 0 mA
2.7
2.7
2.4
−20
V
V
V
CCO − 0.5
V
IO = −0.4 mA
IO = −1 mA
CCO − 1.3
CCO − 1.4
V
V
IOZ
output current in 3-state mode
0.4 V < VO < VCCO
+20
µA
Switching characteristics
CLOCK INPUT CLK; see Fig.4; note 1
fclk(max)
maximum clock frequency
TDA8762A/6
60
80
5
−
−
−
−
−
−
−
−
MHz
MHz
ns
TDA8762A/8
tCPH
tCPL
clock pulse width HIGH
clock pulse width LOW
5
ns
Analog signal processing
LINEARITY
INL
integral non-linearity
differential non-linearity
offset error
fclk = 80 MHz; ramp input
−
−
−
±0.75 ±1.5
LSB
LSB
LSB
DNL
OFER
fclk = 80 MHz; ramp input
±0.3
±1
±0.7
middle code; VRB = 1.3 V;
VRT = 3.8 V
−
GER
gain error (from device to device)
VRB = 1.3 V; VRT = 3.8 V;
note 4
−
±0.1
−
%
1996 Mar 21
7
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
BANDWIDTH (fclk = 80 MHz)
B
analog bandwidth
full-scale sine wave; note 5
−
40
−
−
MHz
75% full-scale sine wave;
note 5
−
55
MHz
small signal at mid-scale;
VI = ±10 LSB at code 512;
note 5
−
700
−
MHz
tSTLH
tSTHL
analog input settling time
LOW-to-HIGH
full-scale square wave;
see Fig.6; note 6
−
−
2.0
2.5
3
ns
ns
analog input settling time
HIGH-to-LOW
full-scale square wave;
see Fig.6; note 6
3.5
HARMONICS (fclk = 80 MHZ)
h1
fundamental harmonics (full scale) fi = 4.43 MHz
−
−
0
dB
hall
harmonics (full scale);
all components
fi = 4.43 MHz
second harmonics
third harmonics
−
−
−
−70
−75
−68
62
67
−
dB
dB
dB
THD
total harmonic distortion
fi = 4.43 MHz
SIGNAL-TO-NOISE RATIO; see Fig.8; note 7
S/N signal-to-noise ratio (full scale)
without harmonics;
56
58
−
dB
f
clk = 80 MHz;
fi = 4.43 MHz
EFFECTIVE BITS; see Figs 7, 8 and 9; note 7
EB
effective bits
TDA8762AM/6
f
clk = 60 MHz
fi = 4.43 MHz
fi = 10 MHz
fi = 20 MHz
clk = 80 MHz
fi = 4.43 MHz
fi = 10 MHz
fi = 20 MHz
−
−
−
9.35
9.0
−
−
−
bits
bits
bits
8.1
TDA8762AM/8
f
−
−
−
9.3
8.9
8.0
−
−
−
bits
bits
bits
TWO-TONE; note 8
TTIR
two-tone intermodulation rejection
f
clk = 80 MHz
−
−
−68
−
−
dB
BIT ERROR RATE
BER
bit error rate
fclk = 80 MHz;
10−13
times/
fi = 4.43 MHz;
sample
VI = ±16 LSB at code 512
1996 Mar 21
8
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
DIFFERENTIAL GAIN; note 9
Gdiff
differential gain
fclk = 80 MHz;
PAL modulated ramp
−
0.5
−
−
%
DIFFERENTIAL PHASE; note 9
ϕdiff
differential phase
fclk = 80 MHz;
−
0.5
deg
PAL modulated ramp
Timing (fclk = 80 MHz; CL = 15 pF); see Fig.4; note 10
tds
th
sampling delay time
output hold time
−
5
−
−
−
2
ns
ns
ns
pF
−
−
td
output delay time
9
13
20
CL
digital output load capacitance
15
3-state output delay times; see Fig.5
tdZH
tdZL
tdHZ
tdLZ
enable HIGH
enable LOW
disable HIGH
disable LOW
−
−
−
−
45
25
12
12
50
35
15
15
ns
ns
ns
ns
Notes
1. In addition to a good layout of the digital and analog ground, it is recommended that the rise and fall times of the clock
must not be less than 0.5 ns.
2. Analog input voltages producing code 0 up to and including code 1023:
a) VosB (voltage offset BOTTOM) is the difference between the analog input which produces data equal to 00 and
the reference voltage BOTTOM (VRB) at Tamb = 25 °C.
b) VosT (voltage offset TOP) is the difference between VRT (reference voltage TOP) and the analog input which
produces data outputs equal to code 1023 at Tamb = 25 °C.
3. In order to ensure the optimum linearity performance of such converter architecture the lower and upper extremities
of the converter reference resistor ladder (corresponding to output codes 0 and 1023 respectively) are connected to
pins VRB and VRT via offset resistors ROB and ROT as shown in Fig.3.
V
RT – VRB
a) The current flowing into the resistor ladder is IL =
and the full-scale input range at the converter,
-----------------------------------------
R
OB + RL + ROT
R L
to cover code 0 to code 1023, is .V I = R L × I L =
× (V RT – VRB) = 0.824 × (VRT – VRB)
-----------------------------------------
R
OB + RL + ROT
b) Since RL, ROB and ROT have similar behaviour with respect to process and temperature variation, the ratio
RL
will be kept reasonably constant from part to part. Consequently variation of the output codes
-----------------------------------------
OB + RL + ROT
R
at a given input voltage depends mainly on the difference VRT − VRB and its variation with temperature and supply
voltage. When several ADCs are connected in parallel and fed with the same reference source, the matching
between each of them is then optimized.
(V1023 – V0) – 2 V
4. GER =
× 100
------------------------------------------------
2 V
1996 Mar 21
9
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
5. The analog bandwidth is defined as the maximum input sine wave frequency which can be applied to the device.
No glitches greater than 2 LSBs, neither any significant attenuation are observed in the reconstructed signal.
6. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale
input (square-wave signal) in order to sample the signal and obtain correct output data.
7. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8K acquisition points per equivalent
fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency
(NYQUIST frequency). Conversion to signal-to-noise ratio: S/N = EB × 6.02 + 1.76 dB.
8. Intermodulation measured relative to either tone with analog input frequencies of 4.43 MHz and 4.53 MHz. The two
input signals have the same amplitude and the total amplitude of both signals provides full scale to the converter.
9. Measurement carried out using video analyser VM700A, where the video analog signal is reconstructed through a
digital-to-analog converter.
10. Output data acquisition: the output data is available after the maximum delay time of td. In the event of a 80 MHz
clock operation, the hardware design must take into account the td and th limits with respect to the input
characteristics of the acquisition circuit; an external latch will ease the design if output data lines cannot be short to
minimize capacitance.
handbook, halfpage
9
V
RT
R
OT
code 1023
R
L
7
V
I
L
RM
R
LAD
code 0
R
OB
6
V
RB
MGD281
Fig.3 Explanation of note 3.
1996 Mar 21
10
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
Table 1 Output coding and input voltage (typical values; referenced to AGND, VRB = 1.3 V, VRT = 3.8 V)
BINARY OUTPUT BITS TWO’S COMPLEMENT OUTPUT BITS
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
STEP VI(p-p) IR
U/F
<1.52
0
1
1
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
1
.
1
1
1
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
1
.
0
1.52
1
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
1022
1023
O/F
.
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
3.58
>3.58
Table 2 Mode selection
TC
OE
D9 TO D0
IR
X
0
1
1
0
0
high impedance
high impedance
active
active; two’s complement
active; binary
active
t
CPL
t
CPH
1.4 V
CLK
sample N
sample N + 1
sample N + 2
V
l
t
t
ds
h
2.4 V
1.4 V
0.4 V
DATA
D0 to D9
DATA
N - 2
DATA
N - 1
DATA
N
DATA
N + 1
t
d
MGC037
Fig.4 Timing diagram.
1996 Mar 21
11
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
V
CCD
OE
50%
dZH
t
t
dHZ
HIGH
90%
output
data
50%
LOW
t
t
dZL
dLZ
HIGH
output
data
50%
LOW
10%
TEST
S1
V
CCD
t
t
t
t
V
CCD
dLZ
dZL
dHZ
dZH
3.3 kΩ
15 pF
V
CCD
GND
GND
S1
TDA8762A
OE
MBE562
fOE = 100 kHz.
Fig.5 Timing diagram and test conditions of 3-state output delay time.
1996 Mar 21
12
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
t
t
STLH
STHL
50%
code 1023
V
I
50%
code 0
2 ns
2 ns
CLK
50%
50%
MBE566
0.5 ns
0.5 ns
Fig.6 Analog input settling-time diagram.
MBE567
0
A
(dB)
−20
−40
−60
−80
−100
−120
0
4.96
9.93
14.9
19.9
24.8
29.8
34.7
39.7
f (MHz)
Effective bits: 9.35; THD = −71.18 dB;
Harmonic levels (dB): 2nd = −73.61; 3rd = −76.14; 4th = −83.82; 5th = −87.36; 6th = −86.33.
Fig.7 Fast Fourier Transform (fclk = 80 MHz; fi = 4.43 MHz).
13
1996 Mar 21
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
MBE568
0
A
(dB)
−20
−40
−60
−80
−100
−120
0
5.01
10.0
15.0
20.1
25.1
30.1
35.1
40.1
f (MHz)
Effective bits: 9.12; THD = −65.45 dB;
Harmonic levels (dB): 2nd = −79.52; 3rd = −66.03; 4th = −81.60; 5th = −77.47; 6th = −104.43.
Fig.8 Fast Fourier Transform (fclk = 80 MHz; fi = 10 MHz).
MBE569
0
A
(dB)
−20
−40
−60
−80
−100
−120
0
5.02
10.0
15.1
20.1
25.1
30.1
35.2
40.2
f (MHz)
Effective bits: 8.08; THD = −52.60 dB;
Harmonic levels (dB): 2nd = −58.35; 3rd = −54.22; 4th = −76.61; 5th = −66.90; 6th = −76.80.
Fig.9 Fast Fourier Transform (fclk = 80 MHz; fi = 20 MHz).
1996 Mar 21
14
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
INTERNAL PIN CONFIGURATIONS
V
CCO2
handbook, halfpage
V
V
CCA
CCO1
D9 to D0
IR
V
I
AGND
OGND1
MGC040 - 1
MBE563
Fig.10 TTL data and in-range outputs.
Fig.11 Analog inputs.
handbook, halfpage
V
CCO1
V
CCA
RT
V
V
OE
(TC)
R
LAD
RM
V
RB
MBE565
AGND
OGND2
MGD344
Fig.12 OE (TC) input.
Fig.13 VRB, VRM and VRT.
1996 Mar 21
15
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
handbook, halfpage
V
CCD
V
(1.3 V)
CLK
ref
DGND
MGC042 - 1
Fig.14 CLK input.
1996 Mar 21
16
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
APPLICATION INFORMATION
V
CCO2
CLK
TC
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
OGND2
IR
V
CCA
3
D9
AGND1
AGND2
4
D8
5
(1)
V
RB
D7
6
100 nF
AGND
100 nF
(3) (1)
V
RM
D6
7
TDA8762A
(4)
V
I
D5
8
(1)
V
RT
D4
9
AGND
100 nF
OE
D3
10
11
12
13
14
AGND
V
D2
CCD
DGND
D1
V
CCO1
D0
(2)
OGND1
n.c.
MBE564
The analog and digital supplies should be separated and decoupled.
The external voltage reference generator must be built such that a good supply voltage ripple rejection is achieved with respect to the LSB value.
Eventually, the reference ladder voltages can be derived from a well regulated VCCA supply through a resistor bridge and a decoupled capacitor.
(1) VRB, VRM and VRT are decoupled to AGND.
(2) Pin 15 should be connected to DGND in order to prevent noise influence.
(3) When VRM is not used, pin 7 can be left open, avoiding the decoupling capacitor. In any case, this pin must not be grounded.
(4) When analog input signal is AC coupled, an input bias or a clamping level must be applied to VI input (pin 8).
Fig.15 Application diagram.
1996 Mar 21
17
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
PACKAGE OUTLINE
SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm
SOT341-1
D
E
A
X
c
H
v
M
A
y
E
Z
28
15
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
14
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
10.4
10.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
1.1
0.7
mm
2.0
0.25
0.65
1.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
93-09-08
95-02-04
SOT341-1
MO-150AH
1996 Mar 21
18
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
If wave soldering cannot be avoided, the following
conditions must be observed:
SOLDERING
Introduction
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
• The longitudinal axis of the package footprint must
be parallel to the solder flow and must incorporate
solder thieves at the downstream end.
Even with these conditions, only consider wave
soldering SSOP packages that have a body width of
4.4 mm, that is SSOP16 (SOT369-1) or
SSOP20 (SOT266-1).
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Reflow soldering
Reflow soldering techniques are suitable for all SSOP
packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Repairing soldered joints
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
Wave soldering
Wave soldering is not recommended for SSOP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.
1996 Mar 21
19
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1996 Mar 21
20
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
NOTES
1996 Mar 21
21
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
NOTES
1996 Mar 21
22
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762A
NOTES
1996 Mar 21
23
Philips Semiconductors – a worldwide company
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Uruguay: see South America
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Italy: PHILIPS SEMICONDUCTORS,
Piazza IV Novembre 3, 20124 MILANO,
Tel. (0039) 2 6752 2531, Fax. (0039) 2 6752 2557
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108, Tel. (03) 3740 5130, Fax. (03) 3740 5077
Korea: Philips House, 260-199 Itaewon-dong,
Yongsan-ku, SEOUL, Tel. (02) 709-1412, Fax. (02) 709-1415
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA,
SELANGOR, Tel. (03) 750 5214, Fax. (03) 757 4880
Mexico: 5900 Gateway East, Suite 200, EL PASO,
TEXAS 79905, Tel. 9-5(800) 234-7831, Fax. (708) 296-8556
Middle East: see Italy
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,
Tel. (040) 2783749, Fax. (040) 2788399
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,
Tel. (09) 849-4160, Fax. (09) 849-7811
Internet: http://www.semiconductors.philips.com/ps/
For all other countries apply to: Philips Semiconductors,
Marketing & Sales Communications, Building BE-p,
P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands,
Fax. +31-40-2724825
SCDS48
© Philips Electronics N.V. 1996
All rights are reserved. Reproduction in whole or in part is prohibited without the
prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation
or contract, is believed to be accurate and reliable and may be changed without
notice. No liability will be accepted by the publisher for any consequence of its
use. Publication thereof does not convey nor imply any license under patent- or
other industrial or intellectual property rights.
Norway: Box 1, Manglerud 0612, OSLO,
Tel. (022) 74 8000, Fax. (022) 74 8341
Philippines: PHILIPS SEMICONDUCTORS PHILIPPINES Inc.,
106 Valero St. Salcedo Village, P.O. Box 2108 MCC,
MAKATI, Metro MANILA,
Printed in The Netherlands
Tel. (63) 2 816 6380, Fax. (63) 2 817 3474
Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. (022) 612 2831, Fax. (022) 612 2327
537021/1100/02/pp24
Date of release: 1996 Mar 21
9397 750 00751
Document order number:
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The TDA8762A is a 10-bit high-speed analog-to-digital converter (ADC) for professional video and ot
It converts the analog input signal into 10-bit binary-coded digital words at a maximum sampling rate
digital inputs and outputs are TTL compatible, although a low-level sine wave clock input signal is allo
PC/PC-peripherals
Cross reference
Models
Features
Packages
Application notes
Selection guides
Other technical documentation
End of Life information
Datahandbook system
l 10-bit resolution
l Sampling rate up to 80 MHz
l DC sampling allowed
l One clock cycle conversion only
l High signal-to-noise ratio over a large analog input frequency range (9.3 effective bits at 4.43 M
input at fclk = 80 MHz)
Relevant Links
l No missing codes guaranteed
l In range (IR) TTL output
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l TTL compatible digital inputs and outputs
l Low-level AC clock input signal allowed
l External reference voltage regulator
l Power dissipation only 380 mW (typical)
l Low analog input capacitance, no buffer amplifier required
l No sample-and-hold circuit required.
TDA8762A
TDA8762A
Applications
High-speed analog-to-digital conversion for:
l Video data digitizing
l Radar pulse analysis
l Transient signal analysis
l High energy physics research
l SD modulators
l Medical imaging.
Datasheet
File
size
Publication
Page
Type nr.
Title
release date Datasheet status count (kB)
TDA8762A 10-bit high-speed low-power
analog-to-digital converter
21-Mar-96
Product
Specification
24
150
Products, packages, availability and ordering
North American Order code
Partnumber
marking/packing package device status
Partnumber
(12nc)
Standard
TDA8762AM/8/C1
9352 015 00112
SOT341 Full production
Marking * Tube
Standard
9352 015 00118 Marking * Reel SOT341 Full production
Pack, SMD, 13"
Standard
TDA8762AM8DB 9352 015 00512 Marking * Tube SOT341 Full production
Dry Pack
Standard
TDA8762AM8DB-
T
Marking * Reel
Dry Pack, SMD,
13"
9352 015 00518
SOT341 Full production
Please read information about some discontinued variants of this product.
Find similar products:
TDA8762A links to the similar products page containing an overview of products that are simila
related to the part number(s) as listed on this page. The similar products page includes products from
catalog tree(s) , relevant selection guides and products from the same functional category.
Copyright © 2000
Royal Philips Electronics
All rights reserved.
Terms and conditions.
Go to Philips Semiconductors' home page
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Catalog by Function
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TDA8762A; 10-bit high-speed low-power analog-to-digital converter
Clocks and Watches
Data communications
Microcontrollers
Peripherals
Standard analog
Video
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•
Wired communications
Wireless communications
Catalog by System
Automotive
Description
Consumer Multimedia
Systems
Communications
The TDA8762A is a 10-bit high-speed analog-to-digital converter (ADC) for professional video and other applications. It converts the analog
input signal into 10-bit binary-coded digital words at a maximum sampling rate of 80 MHz. All digital inputs and outputs are TTL compatible,
although a low-level sine wave clock input signal is allowed.
PC/PC-peripherals
Cross reference
Models
Features
Packages
Application notes
Selection guides
Other technical documentation
End of Life information
Datahandbook system
l 10-bit resolution
l Sampling rate up to 80 MHz
l DC sampling allowed
l One clock cycle conversion only
l High signal-to-noise ratio over a large analog input frequency range (9.3 effective bits at 4.43 MHz full-scale input at fclk = 80 MHz)
l No missing codes guaranteed
Relevant Links
l In range (IR) TTL output
About catalog tree
About search
About this site
Subscribe to eNews
Catalog & Datasheets
Search
l TTL compatible digital inputs and outputs
l Low-level AC clock input signal allowed
l External reference voltage regulator
l Power dissipation only 380 mW (typical)
l Low analog input capacitance, no buffer amplifier required
l No sample-and-hold circuit required.
TDA8762A
TDA8762A
Applications
High-speed analog-to-digital conversion for:
l Video data digitizing
l Radar pulse analysis
l Transient signal analysis
l High energy physics research
l SD modulators
l Medical imaging.
Datasheet
File
size
(kB)
Publication
release date Datasheet status
Page
count
Type nr.
Title
Datasheet
Download
TDA8762A 10-bit high-speed low-power analog-to- 21-Mar-96
digital converter
Product
Specification
24
150
Products, packages, availability and ordering
North American
Partnumber
Order code
(12nc)
Partnumber
marking/packing
package device status buy online
TDA8762AM/8/C1
9352 015 00112 Standard Marking * Tube
SOT341 Full production
SOT341 Full production
-
-
Standard Marking * Reel Pack,
SMD, 13"
9352 015 00118
9352 015 00512
9352 015 00518
Standard Marking * Tube Dry
Pack
TDA8762AM8DB
SOT341 Full production
SOT341 Full production
Standard Marking * Reel Dry
Pack, SMD, 13"
TDA8762AM8DB-T
Please read information about some discontinued variants of this product.
Find similar products:
TDA8762A links to the similar products page containing an overview of products that are similar in function or related to the part
number(s) as listed on this page. The similar products page includes products from the same catalog tree(s) , relevant selection guides and
products from the same functional category.
Copyright © 2000
Royal Philips Electronics
All rights reserved.
Terms and conditions.
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