TDA8763AM/4/C4,118 [NXP]
IC 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28, PLASTIC, SOT-341-1, SSOP-28, Analog to Digital Converter;型号: | TDA8763AM/4/C4,118 |
厂家: | NXP |
描述: | IC 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28, PLASTIC, SOT-341-1, SSOP-28, Analog to Digital Converter 光电二极管 |
文件: | 总29页 (文件大小:241K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA8763A
10-bit high-speed low-power ADC
1999 Jan 06
Product specification
Supersedes data of 1997 Feb 07
File under Integrated Circuits, IC02
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
FEATURES
APPLICATIONS
• 10-bit resolution
High-speed analog-to-digital conversion for:
• Video data digitizing
• Sampling rate up to 50 MHz
• DC sampling allowed
• Radar pulse analysis
• One clock cycle conversion only
• Transient signal analysis
• High energy physics research
• Σ∆ modulators
• High signal-to-noise ratio over a large analog input
frequency range (9.4 effective bits at 4.43 MHz
full-scale input at fclk = 40 MHz)
• Medical imaging.
• No missing codes guaranteed
• In-Range (IR) CMOS output
GENERAL DESCRIPTION
• Levels TTL and CMOS compatible digital inputs
• 3 to 5 V CMOS digital outputs
The TDA8763A is a 10-bit high-speed low-power
analog-to-digital converter (ADC) for professional video
and other applications. It converts the analog input signal
into 10-bit binary-coded digital words at a maximum
sampling rate of 50 MHz. All digital inputs and outputs are
TTL and CMOS compatible, although a low-level sine
wave clock input signal is allowed.
• Low-level AC clock input signal allowed
• External reference voltage regulator
• Power dissipation only 175 mW (typical)
• Low analog input capacitance, no buffer amplifier
required
The device requires an external source to drive its
reference ladder. If the application requires that the
reference is driven via internal sources the
recommendation is to use the TDA8763.
• No sample-and-hold circuit required.
ORDERING INFORMATION
TYPE NUMBER
PACKAGE
DESCRIPTION
SAMPLING
FREQUENCY (MHz)
NAME
VERSION
TDA8763AM/3
TDA8763AM/4
TDA8763AM/5
SSOP28
SSOP28
SSOP28
SOT341-1
SOT341-1
SOT341-1
30
40
50
plastic shrink small outline package; 28 leads;
body width 5.3 mm
1999 Jan 06
2
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
QUICK REFERENCE DATA
SYMBOL
PARAMETER
analog supply voltage
CONDITIONS
MIN.
TYP. MAX. UNIT
VCCA
VCCD
VCCO
ICCA
4.75
4.75
3.0
−
5.0
5.0
3.3
18
5.25
5.25
5.25
24
V
digital supply voltage
output stages supply voltage
analog supply current
digital supply current
output stages supply current
integral non-linearity
differential non-linearity
maximum clock frequency
TDA8763AM/3
V
V
mA
mA
mA
LSB
LSB
ICCD
−
16
21
ICCO
fclk = 40 MHz; ramp input
−
1
2
INL
f
clk = 40 MHz; ramp input
clk = 40 MHz; ramp input
−
±0.8
±0.5
±2.0
±0.9
DNL
fclk(max)
f
−
30
40
50
−
−
−
MHz
MHz
MHz
mW
TDA8763AM/4
−
−
TDA8763AM/5
−
−
Ptot
total power dissipation
fclk = 40 MHz; ramp input
175
247
1999 Jan 06
3
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
BLOCK DIAGRAM
V
3
CLK
1
V
CCD2
OE
10
CCA
11
2
CLOCK DRIVER
TC
TDA8763A
V
RT
9
25 D9
24 D8
23 D7
22 D6
21 D5
20 D4
19 D3
18 D2
17 D1
MSB
R
LAD
V
I
8
7
ANALOG -TO - DIGITAL
CONVERTER
analog
voltage input
CMOS
OUTPUTS
LATCHES
data outputs
V
RM
16 D0
V
LSB
CCO
13
V
RB
6
26
28
IR
output
IN-RANGE LATCH
CMOS OUTPUT
V
CCD1
12
27
DGND1
4
14
MBG913
AGND
DGND2
OGND
analog ground
digital ground
output ground digital ground
Fig.1 Block diagram.
1999 Jan 06
4
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
PINNING
SYMBOL PIN
DESCRIPTION
CLK
TC
1
2
3
4
5
6
7
8
9
clock input
twos complement input (active LOW)
analog supply voltage (+5 V)
analog ground
VCCA
AGND
n.c.
VRB
VRM
VI
not connected
reference voltage BOTTOM input
reference voltage MIDDLE input
analog input voltage
handbook, halfpage
ha
V
CLK
TC
1
2
28
CCD1
27 DGND1
IR
VRT
OE
reference voltage TOP input
V
3
26
CCA
10 output enable input (CMOS level
input, active LOW)
AGND
n.c.
4
25 D9
24 D8
23 D7
22 D6
VCCD2
DGND2
VCCO
11 digital supply voltage 2 (+5 V)
12 digital ground 2
5
V
6
RB
13 supply voltage for output stages
(3 to 5 V)
V
7
RM
TDA8763A
V
I
D5
8
21
20 D4
D3
OGND
n.c.
D0
14 output ground
V
9
RT
15 not connected
OE
10
11
19
16 data output; bit 0 (LSB)
17 data output; bit 1
18 data output; bit 2
19 data output; bit 3
20 data output; bit 4
21 data output; bit 5
22 data output; bit 6
23 data output; bit 7
24 data output; bit 8
25 data output; bit 9 (MSB)
26 in range data output
27 digital ground 1
D1
V
CCD2
18 D2
17 D1
16 D0
15 n.c.
D2
DGND2 12
D3
V
13
CCO
D4
OGND 14
D5
MBG914
D6
D7
D8
D9
IR
DGND1
VCCD1
Fig.2 Pin configuration.
28 digital supply voltage 1 (+5 V)
1999 Jan 06
5
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
analog supply voltage
CONDITIONS
note 1
MIN.
−0.3
MAX.
+7.0
UNIT
VCCA
VCCD
VCCO
∆VCC
V
V
V
digital supply voltage
note 1
note 1
−0.3
−0.3
+7.0
+7.0
output stages supply voltage
supply voltage difference
V
V
V
CCA − VCCD
CCA − VCCO
CCD − VCCO
−1.0
−1.0
−1.0
+1.0
+4.0
+4.0
+7.0
VCCD
10
V
V
V
V
V
VI
input voltage
referenced to AGND −0.3
Vi(sw)(p-p)
IO
AC input voltage for switching (peak-to-peak value) referenced to DGND
−
output current
−
mA
°C
°C
°C
Tstg
Tamb
Tj
storage temperature
operating ambient temperature
junction temperature
−55
−40
−
+150
+85
150
Note
1. The supply voltages VCCA, VCCD and VCCO may have any value between −0.3 V and +7.0 V provided that the supply
voltage differences ∆VCC are respected.
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
in free air
VALUE
UNIT
Rth(j-a)
thermal resistance from junction to ambient
110
K/W
1999 Jan 06
6
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
CHARACTERISTICS
VCCA = V3 to V4 = 4.75 to 5.25 V; VCCD = V11 to V12 and V28 to V27 = 4.75 to 5.25 V; VCCO = V13 to V14 = 3.0 to 5.25 V;
AGND and DGND shorted together; Tamb = 0 to +70 °C; typical values measured at VCCA = VCCD = 5 V and
VCCO = 3.3 V; Vi(p-p) = 2.0 V; CL = 15 pF and Tamb = 25 °C; unless otherwise specified.
SYMBOL
Supply
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VCCA
VCCD1
VCCD2
VCCO
∆VCC
analog supply voltage
4.75
5.0
5.25
V
V
V
V
digital supply voltage 1
digital supply voltage 2
output stages supply voltage
supply voltage difference
4.75
4.75
3.0
5.0
5.0
3.3
5.25
5.25
5.25
V
V
V
CCA − VCCD
CCA − VCCO
CCD − VCCO
−0.20
−0.20
−0.20
−
−
+0.20
+2.25
+2.25
24
V
V
V
−
−
ICCA
ICCD
ICCO
analog supply current
digital supply current
18
16
1
mA
mA
mA
−
21
output stages supply current
fclk = 40 MHz; ramp input
−
2
Inputs
CLOCK INPUT CLK (REFERENCED TO DGND); note 1
VIL
VIH
IIL
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
input impedance
0
−
−
0
2
2
2
0.8
VCCD
+1
10
−
V
2.0
−1
−
V
Vclk = 0.8 V
Vclk = 2.0 V
fclk = 40 MHz
µA
µA
kΩ
pF
IIH
Zi
−
Ci
input capacitance
−
−
INPUTS OE AND TC (REFERENCED TO DGND); see Table 2
VIL
VIH
IIL
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
0
−
−
−
−
0.8
VCCD
−
V
2.0
−1
−
V
VIL = 0.8 V
VIH = 2.0 V
µA
µA
IIH
1
VI (ANALOG INPUT VOLTAGE REFERENCED TO AGND)
IIL
IIH
Zi
LOW-level input current
HIGH-level input current
input impedance
VI = VRB = 1.3 V
VI = VRT = 3.67 V
fi = 4.43 MHz
−
−
−
−
0
−
−
−
−
µA
µA
kΩ
pF
35
8
Ci
input capacitance
5
Reference voltages for the resistor ladder see Table 1
VRB
VRT
Vdiff
reference voltage BOTTOM
reference voltage TOP
1.2
3.2
2.0
1.3
2.45
V
3.67
2.37
VCCA − 0.8 V
differential reference voltage
3.0
V
VRT − VRB
Iref
reference current
VRT − VRB = 2.37 V
−
9.7
−
mA
1999 Jan 06
7
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
SYMBOL
PARAMETER
resistor ladder
CONDITIONS
MIN.
TYP.
245
MAX.
UNIT
Rlad
−
−
−
−
−
−
−
−
−
−
Ω
TCRlad
temperature coefficient of the
resistor ladder
1860
456
ppm
mΩ/K
mV
mV
V
Voffset(B)
Voffset(T)
Vi(p-p)
offset voltage BOTTOM
offset voltage TOP
V
RT − VRB = 2.37 V; note 2
RT − VRB = 2.37 V; note 2
175
V
175
analog input voltage
(peak-to-peak value)
note 3
1.70
2.02
2.55
Outputs
DIGITAL OUTPUTS D9 TO D0 AND IR (REFERENCED TO OGND)
VOL
VOH
IOZ
LOW-level output voltage
HIGH-level output voltage
IOL = 1 mA
0
−
−
0.5
V
IOH = −1 mA
V
CCO − 0.5 −
VCCO
+20
V
output current in 3-state mode 0.5 V < Vo < VCCO
−20
µA
Switching characteristics
CLOCK INPUT CLK; see Fig.4; note 1
fclk(max)
maximum clock frequency
TDA8763AM/3
30
40
50
8.5
5.5
−
−
−
−
−
−
−
−
−
−
MHz
MHz
MHz
ns
TDA8763AM/4
TDA8763AM/5
tCPH
tCPL
clock pulse width HIGH
clock pulse width LOW
full effective bandwidth
full effective bandwidth
ns
Analog signal processing
LINEARITY
INL
integral non-linearity
differential non-linearity
offset error
fclk = 40 MHz; ramp input
−
−
−
±0.8
±0.5
±1
±2.0
±0.9
−
LSB
LSB
LSB
DNL
Eoffset
fclk = 40 MHz; ramp input
middle code; VRB = 1.3 V;
VRT = 3.67 V
EG
gain error (from device to
device) using external
reference voltage
VRB = 1.3 V; VRT = 3.67 V;
note 4
−
±0.1
−
%
1999 Jan 06
8
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
BANDWIDTH (fclk = 40 MHz)
B
analog bandwidth
full-scale sine wave;
note 5
−
−
−
15
−
−
−
MHz
75% full-scale sine wave;
note 5
20
MHz
MHz
small signal at mid-scale;
VI = ±10 LSB at code 512;
note 5
350
tstLH
tstHL
analog input settling time
LOW-to-HIGH
full-scale square wave;
see Fig.6; note 6
−
−
1.5
1.5
3.0
3.0
ns
ns
analog input settling time
HIGH-to-LOW
full-scale square wave;
see Fig.6; note 6
HARMONICS (fclk = 40 MHZ); see Figs 7 and 8
Hfund(FS)
fundamental harmonics
(full-scale)
fi = 4.43 MHz
fi = 4.43 MHz
−
−
0
dB
Hall(FS)
harmonics (full-scale); all
components
second harmonics
third harmonics
−
−
−
−75
−72
−64
−65
−65
−
dB
dB
dB
THD
total harmonic distortion
fi = 4.43 MHz
SIGNAL-TO-NOISE RATIO; see Figs 7 and 8; note 7
SNRFS
signal-to-noise ratio (full-scale) without harmonics;
55
58
−
dB
fclk = 40 MHz;
fi = 4.43 MHz
EFFECTIVE BITS; see Figs 7 and 8; note 7
EB
effective bits
TDA8763AM/3;
f
clk = 30 MHz
fi = 4.43 MHz
fi = 7.5 MHz
−
−
9.4
9.1
−
−
bits
bits
TDA8763AM/4;
f
clk = 40 MHz
fi = 4.43 MHz
fi = 7.5 MHz
fi = 10 MHz
fi = 15 MHz
−
−
−
−
9.4
9.0
8.9
8.1
−
−
−
−
bits
bits
bits
bits
TDA8763AM/5;
fclk = 50 MHz
fi = 4.43 MHz
fi = 7.5 MHz
fi = 10 MHz
fi = 15 MHz
−
−
−
−
9.3
8.9
8.8
8.0
−
−
−
−
bits
bits
bits
bits
1999 Jan 06
9
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
TWO-TONE; note 8
TTIR
two-tone intermodulation
rejection
fclk = 40 MHz
−
−
−69
−
−
dB
BIT ERROR RATE
BER
bit error rate
fclk = 50 MHz;
10−13
times/
fi = 4.43 MHz;
sample
VI = ±16 LSB at code 512
DIFFERENTIAL GAIN; note 9
Gdiff
differential gain
fclk = 40 MHz;
PAL modulated ramp
−
−
0.8
0.4
−
−
%
DIFFERENTIAL PHASE; note 9
ϕdiff
differential phase
fclk = 40 MHz;
deg
PAL modulated ramp
Timing (fclk = 40 MHz; CL = 15 pF); see Fig.4; note 10
tds
th
sampling delay time
output hold time
−
4
−
−
−
3
−
ns
ns
ns
ns
pF
−
−
td
output delay time
VCCO = 4.75 V
CCO = 3.15 V
10
12
−
13
15
15
V
CL
digital output load capacitance
3-state output delay times; see Fig.5
tdZH
tdZL
tdHZ
tdLZ
enable HIGH
enable LOW
disable HIGH
disable LOW
−
−
−
−
5.5
12
19
12
8.5
15
24
15
ns
ns
ns
ns
Notes
1. In addition to a good layout of the digital and analog ground, it is recommended that the rise and fall times of the clock
must not be less than 0.5 ns.
2. Analog input voltages producing code 0 up to and including code 1023:
a) Voffset(B) (voltage offset BOTTOM) is the difference between the analog input which produces data equal to 00
and the reference voltage BOTTOM (VRB) at Tamb = 25 °C.
b) Voffset(T) (voltage offset TOP) is the difference between reference voltage TOP (VRT) and the analog input which
produces data outputs equal to code 1023 at Tamb = 25 °C.
1999 Jan 06
10
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
3. In order to ensure the optimum linearity performance of such converter architecture the lower and upper extremities
of the converter reference resistor ladder (corresponding to output codes 0 and 1023 respectively) are connected to
pins VRB and VRT via offset resistors ROB and ROT as shown in Fig.3.
V
RT – VRB
a) The current flowing into the resistor ladder is IL
=
and the full-scale input range at the converter,
˙
-----------------------------------------
R
OB + RL + ROT
R L
to cover code 0 to code 1023, is V = R × I =
× (V RT + –VRB ) = 0.852 × (V RT – VRB )
-----------------------------------------
I
L
L
R
OB + RL + ROT
b) Since RL, ROB and ROT have similar behaviour with respect to process and temperature variation, the ratio
RL
will be kept reasonably constant from device to device. Consequently variation of the output
------------------------------------------------
ROB + RL + ROT
codes at a given input voltage depends mainly on the difference VRT − VRB and its variation with temperature and
supply voltage. When several ADCs are connected in parallel and fed with the same reference source, the
matching between each of them is then optimized.
(V 1023 – V0) – Vi (p – p)
4. E G
=
× 100
-----------------------------------------------------------
Vi (p – p)
5. The analog bandwidth is defined as the maximum input sine wave frequency which can be applied to the device.
No glitches greater than 2 LSBs, neither any significant attenuation are observed in the reconstructed signal.
6. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale
input (square wave signal) in order to sample the signal and obtain correct output data.
7. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8K acquisition points per equivalent
fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency
(NYQUIST frequency). Conversion to signal-to-noise ratio: SINAD = ENOB × 6.02 + 1.76 dB.
8. Intermodulation measured relative to either tone with analog input frequencies of 4.43 MHz and 4.53 MHz. The two
input signals have the same amplitude and the total amplitude of both signals provides full-scale to the converter.
9. Measurement carried out using video analyser VM700A, where the video analog signal is reconstructed through a
digital-to-analog converter.
10. Output data acquisition: the output data is available after the maximum delay time of td(max). For 50 MHz version it is
recommended to have the lowest possible output load.
handbook, halfpage
V
RT
R
OT
code 1023
R
L
V
I
L
RM
R
LAD
code 0
R
OB
V
RB
MGD281
Fig.3 Explanation of note 3.
11
1999 Jan 06
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
Table 1 Output coding and input voltage (typical values; referenced to AGND, VRB = 1.3 V, VRT = 3.67 V)
BINARY OUTPUT BITS TWO’S COMPLEMENT OUTPUT BITS
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
STEP Vi(p-p) IR
U/F <1.475
0
1
1
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
1
.
1
1
1
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
1
.
0
1.475
1
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
1022
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1023 3.495
O/F >3.495
Table 2 Mode selection
TC
OE
D9 to D0
IR
X
0
1
1
0
0
high impedance
high impedance
active
active; twos complement
active; binary
active
t
CPL
t
CPH
V
CCO
50%
CLK
0 V
sample N
sample N + 1
sample N + 2
V
l
t
t
ds
h
V
CCO
DATA
D0 to D9
DATA
N - 2
DATA
N - 1
DATA
N
DATA
N + 1
50%
0 V
t
d
MBG916
Fig.4 Timing diagram.
1999 Jan 06
12
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
V
CCD
OE
50%
t
t
dZH
dHZ
HIGH
90%
output
data
50%
LOW
t
t
dZL
dLZ
HIGH
output
data
50%
LOW
10%
TEST
S1
V
CCD
t
t
t
t
V
CCD
dLZ
dZL
dHZ
dZH
3.3 kΩ
15 pF
V
CCD
S1
TDA8763A
OE
DGND
DGND
MGD262
fOE = 100 kHz.
Fig.5 Timing diagram and test conditions of 3-state output delay time.
t
t
STLH
STHL
50%
code 1023
V
I
50%
code 0
2 ns
2 ns
CLK
50%
50%
MBE566
0.5 ns
0.5 ns
Fig.6 Analog input settling time diagram.
13
1999 Jan 06
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
MGD862
0
amplitude
(dB)
−20
−40
−60
−80
−100
−120
−140
0
2.50
5.00
7.50
10.0
12.5
15.0
17.5
20.0
f (MHz)
Effective bits: 9.42; THD = −71.8 dB.
Harmonic levels (dB): 2nd = −83.19; 3rd = −78.09; 4th = −78.72; 5th = −78.33; 6th = −77.55.
Fig.7 Typical Fast Fourier Transform (fclk = 40 MHz; fi = 4.43 MHz).
MGD863
0
amplitude
(dB)
−20
−40
−60
−80
−100
−120
−140
0
2.50
5.00
7.50
10.0
12.5
15.0
17.5
20.0
22.5
25.0
f (MHz)
Effective bits: 8.91; THD = −62.96 dB.
Harmonic levels (dB): 2nd = −71.38; 3rd = −71.54; 4th = −74.14; 5th = −65.15; 6th = −77.16.
Fig.8 Typical Fast Fourier Transform (fclk = 50 MHz; fi = 10 MHz).
14
1999 Jan 06
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
INTERNAL PIN CONFIGURATIONS
handbook, halfpage
handbook, halfpage
V
V
CCA
CCO
D9 to D0
IR
V
I
AGND
OGND
MGC040 - 1
MBG915
Fig.9 CMOS data and in range outputs.
Fig.10 Analog inputs.
handbook, halfpage
V
CCA
handbook, halfpage
V
CCO
V
V
RT
R
LAD
RM
OE
TC
V
RB
OGND
AGND
MBE557
MGD232
Fig.11 OE and TC input.
Fig.12 VRB, VRM and VRT.
1999 Jan 06
15
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
handbook, halfpage
V
CCD
1.5 V
CLK
DGND
MBE559 - 1
Fig.13 CLK input.
1999 Jan 06
16
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
APPLICATION INFORMATION
V
CLK
CCD1
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
100 nF
(3)
TC
DGND1
V
IR
CCA
3
100 nF
(3)
AGND
n.c.
D9
4
D8
5
(1)
V
RB
D7
6
(1)
100 nF
AGND
100 nF
V
RM
D6
7
TDA8763A
V
I
D5
8
(1)
V
RT
D4
9
AGND
100 nF
OE
D3
10
11
12
13
14
AGND
V
D2
CCD2
100 nF
DGND2
(3)
(3)
D1
V
CCO
100 nF
OGND
D0
(2)
n.c.
MBG918
The analog and digital supplies should be separated and well decoupled.
An application note is available and describes the design and the realization of a demonstration board that uses the version TDA8768AM with an
application environment.
(1) VRB, VRM and VRT are decoupled to AGND.
(2) Pin 15 may be connected to DGND in order to prevent noise influence.
(3) Decoupling capacitor for supplies; must be placed close to the device.
Fig.14 Application diagram.
1999 Jan 06
17
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
PACKAGE OUTLINE
SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm
SOT341-1
D
E
A
X
c
H
v
M
A
y
E
Z
28
15
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
14
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
10.4
10.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
1.1
0.7
mm
2.0
0.65
1.25
0.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
93-09-08
95-02-04
SOT341-1
MO-150AH
1999 Jan 06
18
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
SOLDERING
Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
Wave soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
1999 Jan 06
19
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE
WAVE
REFLOW(1)
BGA, SQFP
not suitable
suitable
suitable
suitable
suitable
suitable
HLQFP, HSQFP, HSOP, HTSSOP, SMS not suitable(2)
PLCC(3), SO, SOJ
LQFP, QFP, TQFP
SSOP, TSSOP, VSO
suitable
not recommended(3)(4)
not recommended(5)
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1999 Jan 06
20
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
NOTES
1999 Jan 06
21
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
NOTES
1999 Jan 06
22
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8763A
NOTES
1999 Jan 06
23
Philips Semiconductors – a worldwide company
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Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080
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TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874
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Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
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Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
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Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421
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Uruguay: see South America
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Tel. +381 11 62 5344, Fax.+381 11 63 5777
For all other countries apply to: Philips Semiconductors,
Internet: http://www.semiconductors.philips.com
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
© Philips Electronics N.V. 1999
SCA61
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545004/750/03/pp24
Date of release: 1999 Jan 06
Document order number: 9397 750 04693
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Description
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Systems
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The TDA8763A is a 10-bit high-speed low-power analog-to-digital converter (ADC) for professional v
applications. It converts the analog input signal into 10-bit binary-coded digital words at a maximum s
50 MHz. All digital inputs and outputs are TTL and CMOS compatible, although a low-level sine wave
signal is allowed.
PC/PC-peripherals
Cross reference
Models
The device requires an external source to drive its reference ladder. If the application requires that th
driven via internal sources the recommendation is to use the TDA8763.
Packages
Application notes
Selection guides
Other technical documentation
End of Life information
Datahandbook system
Features
l 10-bit resolution
l Sampling rate up to 50 MHz
l DC sampling allowed
l One clock cycle conversion only
l High signal-to-noise ratio over a large analog input frequency range (9.4 effective bits at 4.43 M
input at fclk = 40 MHz)
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l No missing codes guaranteed
l In-Range (IR) CMOS output
TDA8763A
TDA8763A
l Levels TTL and CMOS compatible digital inputs
l 3 to 5 V CMOS digital outputs
l Low-level AC clock input signal allowed
l External reference voltage regulator
l Power dissipation only 175 mW (typical)
l Low analog input capacitance, no buffer amplifier required
l No sample-and-hold circuit required.
Datasheet
File
size
(kB)
Publication
release date Datasheet status count
Page
Type nr.
Title
TDA8763A 10-bit high-speed low-power ADC 06-Jan-99
Product
Specification
24
172
Products, packages, availability and ordering
North American Order code
Partnumber
marking/packing package device status
Partnumber
(12nc)
Standard
TDA8763AM/3/C4
9352 611 20112
SOT341 Full production
Marking * Tube
Standard
9352 611 20118 Marking * Reel SOT341 Full production
Pack, SMD, 13"
Standard
TDA8763AM3DB 9352 611 20512 Marking * Tube SOT341 Full production
Dry Pack
Standard
TDA8763AM3DB-
T
Marking * Reel
Dry Pack, SMD,
13"
9352 611 20518
9352 611 21112
SOT341 Full production
SOT341 Full production
Standard
Marking * Tube
TDA8763AM/4/C4
Standard
9352 611 21118 Marking * Reel SOT341 Full production
Pack, SMD, 13"
Standard
TDA8763AM4DB 9352 611 21512 Marking * Tube SOT341 Full production
Dry Pack
Standard
TDA8763AM4DB-
T
Marking * Reel
Dry Pack, SMD,
13"
9352 611 21518
9352 611 22112
SOT341 Full production
SOT341 Full production
Standard
Marking * Tube
TDA8763AM/5/C4
Standard
9352 611 22118 Marking * Reel SOT341 Full production
Pack, SMD, 13"
Standard
TDA8763AM5DB 9352 611 22512 Marking * Tube SOT341 Full production
Dry Pack
Standard
TDA8763AM5DB-
T
Marking * Reel
Dry Pack, SMD,
13"
9352 611 22518
SOT341 Full production
Please read information about some discontinued variants of this product.
Find similar products:
TDA8763A links to the similar products page containing an overview of products that are simila
related to the part number(s) as listed on this page. The similar products page includes products from
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Copyright © 2000
Royal Philips Electronics
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Description
Catalog by System
Automotive
Consumer Multimedia
Systems
Communications
The TDA8763A is a 10-bit high-speed low-power analog-to-digital converter (ADC) for professional video and other applications. It converts
the analog input signal into 10-bit binary-coded digital words at a maximum sampling rate of 50 MHz. All digital inputs and outputs are TTL
and CMOS compatible, although a low-level sine wave clock input signal is allowed.
PC/PC-peripherals
Cross reference
The device requires an external source to drive its reference ladder. If the application requires that the reference is driven via internal
sources the recommendation is to use the TDA8763.
Models
Packages
Application notes
Selection guides
Other technical documentation
End of Life information
Datahandbook system
Features
l 10-bit resolution
l Sampling rate up to 50 MHz
l DC sampling allowed
l One clock cycle conversion only
Relevant Links
l High signal-to-noise ratio over a large analog input frequency range (9.4 effective bits at 4.43 MHz full-scale input at fclk = 40 MHz)
About catalog tree
About search
About this site
Subscribe to eNews
Catalog & Datasheets
Search
l No missing codes guaranteed
l In-Range (IR) CMOS output
l Levels TTL and CMOS compatible digital inputs
l 3 to 5 V CMOS digital outputs
TDA8763A
l Low-level AC clock input signal allowed
l External reference voltage regulator
l Power dissipation only 175 mW (typical)
l Low analog input capacitance, no buffer amplifier required
l No sample-and-hold circuit required.
TDA8763A
Datasheet
File
size
(kB)
Publication
release date Datasheet status
Page
count
Type nr.
Title
Datasheet
Download
TDA8763A 10-bit high-speed low-power ADC
06-Jan-99
Product
24
172
Specification
Products, packages, availability and ordering
North American
Partnumber
Order code
(12nc)
Partnumber
marking/packing
package device status buy online
TDA8763AM/3/C4
9352 611 20112 Standard Marking * Tube
SOT341 Full production
SOT341 Full production
-
-
Standard Marking * Reel Pack,
SMD, 13"
9352 611 20118
9352 611 20512
9352 611 20518
Standard Marking * Tube Dry
Pack
TDA8763AM3DB
SOT341 Full production
Standard Marking * Reel Dry
Pack, SMD, 13"
TDA8763AM3DB-T
SOT341 Full production
SOT341 Full production
SOT341 Full production
TDA8763AM/4/C4
TDA8763AM/5/C4
9352 611 21112 Standard Marking * Tube
-
-
Standard Marking * Reel Pack,
9352 611 21118
SMD, 13"
Standard Marking * Tube Dry
TDA8763AM4DB
9352 611 21512
Pack
SOT341 Full production
Standard Marking * Reel Dry
9352 611 21518
TDA8763AM4DB-T
SOT341 Full production
SOT341 Full production
SOT341 Full production
Pack, SMD, 13"
9352 611 22112 Standard Marking * Tube
-
-
Standard Marking * Reel Pack,
9352 611 22118
SMD, 13"
Standard Marking * Tube Dry
TDA8763AM5DB
9352 611 22512
Pack
SOT341 Full production
SOT341 Full production
Standard Marking * Reel Dry
9352 611 22518
TDA8763AM5DB-T
Pack, SMD, 13"
Please read information about some discontinued variants of this product.
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相关型号:
TDA8763AM/5/C4
IC 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28, PLASTIC, SOT-341-1, SSOP-28, Analog to Digital Converter
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TDA8763AM/5/C4,112
IC 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28, PLASTIC, SOT-341-1, SSOP-28, Analog to Digital Converter
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TDA8763AM/5/C4,118
IC 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28, PLASTIC, SOT-341-1, SSOP-28, Analog to Digital Converter
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TDA8763AM3DB-T
IC 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28, PLASTIC, SOT-341-1, SSOP-28, Analog to Digital Converter
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TDA8763AM4DB
IC 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28, PLASTIC, SOT-341-1, SSOP-28, Analog to Digital Converter
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TDA8763AM4DB-T
IC 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28, PLASTIC, SOT-341-1, SSOP-28, Analog to Digital Converter
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TDA8763AM5DB
IC 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28, PLASTIC, SOT-341-1, SSOP-28, Analog to Digital Converter
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TDA8763M/3/C4,112
IC 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28, Analog to Digital Converter
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