TEA1110A [NXP]

Low voltage versatile telephone transmission circuit with dialler interface; 低压多功能电话传输线路与拨号器界面
TEA1110A
型号: TEA1110A
厂家: NXP    NXP
描述:

Low voltage versatile telephone transmission circuit with dialler interface
低压多功能电话传输线路与拨号器界面

电话
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中文:  中文翻译
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INTEGRATED CIRCUITS  
DATA SHEET  
TEA1110A  
Low voltage versatile telephone  
transmission circuit with dialler  
interface  
1997 Apr 22  
Product specification  
Supersedes data of 1996 Nov 26  
File under Integrated Circuits, IC03  
Philips Semiconductors  
Product specification  
Low voltage versatile telephone  
transmission circuit with dialler interface  
TEA1110A  
FEATURES  
APPLICATION  
Low DC line voltage; operates down to 1.6 V (excluding  
Line powered telephone sets, cordless telephones, fax  
voltage drop over external polarity guard)  
machines, answering machines.  
Voltage regulator with adjustable DC voltage  
Provides a supply for external circuits  
GENERAL DESCRIPTION  
Symmetrical high impedance inputs (64 k) for  
dynamic, magnetic or piezo-electric microphones  
The TEA1110A is a bipolar integrated circuit that performs  
all speech and line interface functions required in fully  
electronic telephone sets. It performs electronic switching  
between speech and dialling. The IC operates at a line  
voltage down to 1.6 V DC (with reduced performance) to  
facilitate the use of telephone sets connected in parallel.  
Asymmetrical high impedance input (32 k) for electret  
microphones  
DTMF input with confidence tone  
MUTE input for pulse or DTMF dialling  
All statements and values refer to all versions unless  
otherwise specified.  
Receiving amplifier for dynamic, magnetic or  
piezo-electric earpieces  
AGC line loss compensation for microphone and  
earpiece amplifiers.  
QUICK REFERENCE DATA  
Iline = 15 mA; VEE = 0 V; RSLPE = 20 ; AGC pin connected to VEE; Zline = 600 ; f = 1 kHz; Tamb = 25 °C;  
unless otherwise specified.  
SYMBOL  
PARAMETER  
CONDITIONS  
normal operation  
MIN.  
11  
TYP. MAX. UNIT  
Iline  
line current operating range  
140  
11  
mA  
mA  
V
with reduced performance  
1
VLN  
ICC  
DC line voltage  
3.35  
3.65  
1.1  
2.9  
3.95  
1.4  
internal current consumption  
supply voltage for peripherals  
typical voltage gain  
VCC = 2.9 V  
IP = 0 mA  
mA  
V
VCC  
Gvtrx  
microphone amplifier (not adjustable) VMIC = 4 mV (RMS)  
43.7  
dB  
dB  
dB  
receiving amplifier range  
VIR = 4 mV (RMS)  
Iline = 85 mA  
19  
33  
Gvtrx  
gain control range for microphone and  
receiving amplifiers with respect to  
5.9  
Iline = 15 mA  
Gvtrxm  
gain reduction for microphone and  
receiving amplifiers  
MUTE = LOW  
80  
dB  
ORDERING INFORMATION  
TYPE  
PACKAGE  
NUMBER  
NAME  
DESCRIPTION  
VERSION  
SOT27-1  
SOT108-1  
TEA1110A  
DIP14  
SO14  
plastic dual in-line package; 14 leads (300 mil)  
TEA1110AT  
plastic small outline package; 14 leads; body width 3.9 mm  
1997 Apr 22  
2
Philips Semiconductors  
Product specification  
Low voltage versatile telephone  
transmission circuit with dialler interface  
TEA1110A  
BLOCK DIAGRAM  
GAR  
13  
QR  
12  
MUTE  
6
7
5
IR  
V
V
V
I
I
I
V
14  
1
CC  
LN  
ATT.  
DTMF  
CURRENT  
REFERENCE  
MIC+ 10  
3
REG  
V
I
9
MIC−  
AGC  
CIRCUIT  
LOW VOLTAGE  
CIRCUIT  
TEA1110A(T)  
11  
8
2
SLPE  
AGC  
V
EE  
MGG736  
Fig.1 Block diagram.  
3
1997 Apr 22  
Philips Semiconductors  
Product specification  
Low voltage versatile telephone  
transmission circuit with dialler interface  
TEA1110A  
PINNING  
SYMBOL PIN  
DESCRIPTION  
positive line terminal  
LN  
1
2
3
4
5
6
SLPE  
REG  
n.c.  
slope (DC resistance) adjustment  
line voltage regulator decoupling  
not connected  
handbook, halfpage  
LN  
SLPE  
REG  
n.c.  
1
2
3
4
5
6
7
14  
V
CC  
13  
12  
11  
10  
9
GAR  
QR  
DTMF  
MUTE  
dual-tone multi-frequency input  
mute input to select speech or  
dialling mode (active LOW)  
V
TEA1110A(T)  
EE  
IR  
7
8
receiving amplifier input  
DTMF  
MUTE  
IR  
MIC+  
MIC−  
AGC  
AGC  
automatic gain control/  
line loss compensation  
8
MIC−  
9
inverting microphone amplifier input  
MGG735  
MIC+  
10 non-inverting microphone amplifier  
input  
VEE  
QR  
11 negative line terminal  
12 receiving amplifier output  
13 receive gain adjustment  
GAR  
VCC  
14 supply voltage for speech circuit and  
peripherals  
Fig.2 Pin configuration.  
The voltage at pin LN is:  
VLN = Vref + RSLPE × ISLPE  
ISLPE = Iline ICC IP I  
FUNCTIONAL DESCRIPTION  
All data given in this chapter are typical values, except  
when otherwise specified.  
Supply (pins LN, SLPE, VCC and REG)  
Where:  
The supply for the TEA1110A and its peripherals is  
obtained from the telephone line. See Fig.3.  
Iline = line current  
ICC = current consumption of the IC  
IP = supply current for peripheral circuits  
I* = current consumed between LN and VEE  
The IC generates a stabilized reference voltage (Vref)  
between pins LN and SLPE. Vref is temperature  
compensated and can be adjusted by means of an  
external resistor (RVA). Vref equals 3.35 V and can be  
increased by connecting RVA between pins REG  
and SLPE (see Fig.4), or decreased by connecting RVA  
between pins REG and LN. The voltage at pin REG is  
used by the internal regulator to generate Vref and is  
decoupled by CREG, which is connected to VEE. This  
capacitor, converted into an equivalent inductance  
(see Section “Set impedance”), realizes the set  
impedance conversion from its DC value (RSLPE) to its AC  
value (RCC in the audio-frequency range). The voltage at  
pin SLPE is proportional to the line current.  
.
The preferred value for RSLPE is 20 . Changing RSLPE will  
affect more than the DC characteristics; it also influences  
the microphone and DTMF gains, the gain control  
characteristics, the sidetone level and the maximum  
output swing on the line.  
1997 Apr 22  
4
Philips Semiconductors  
Product specification  
Low voltage versatile telephone  
transmission circuit with dialler interface  
TEA1110A  
R
I
R
line  
CC  
619 Ω  
line  
V
LN  
1
CC  
14  
I
P
from pre amp  
I
R
CC  
I
exch  
sh  
I*  
C
peripheral  
circuits  
VCC  
100 µF  
V
d
V
exch  
TEA1110A  
2
3
11  
V
SLPE  
R
REG  
C
EE  
REG  
SLPE  
I
SLPE  
20 Ω  
4.7 µF  
MGG737  
Fig.3 Supply configuration.  
The internal circuitry of the TEA1110A is supplied from  
pin VCC. This voltage supply is derived from the line  
voltage by means of a resistor (RCC) and must be  
decoupled by a capacitor CVCC. It may also be used to  
supply peripheral circuits such as dialling or control  
circuits. The VCC voltage depends on the current  
consumed by the IC and the peripheral circuits as shown  
by the formula:  
MGD176  
6.0  
handbook, halfpage  
V
ref  
(V)  
5.0  
VCC = VCC0 RCCint × (IP Irec  
)
VCC0 = VLN RCC × ICC (see also Figs 5 and 6).  
4.0  
3.0  
R
CCint is the internal equivalent resistance of the voltage  
supply, and Irec is the current consumed by the output  
stage of the earpiece amplifier.  
(1)  
(2)  
The DC line current flowing into the set is determined by  
the exchange supply voltage (Vexch), the feeding bridge  
resistance (Rexch), the DC resistance of the telephone line  
(Rline) and the reference voltage (Vref). With line currents  
below 7.5 mA, the internal reference voltage (generating  
Vref) is automatically adjusted to a lower value. This means  
that more sets can operate in parallel with DC line voltages  
(excluding the polarity guard) down to an absolute  
minimum voltage of 1.6 V. At currents below 7.5 mA, the  
circuit has limited sending and receiving levels. This is  
called the low voltage area.  
4
5
6
7
10  
10  
10  
10  
R
()  
VA  
(1) Influence of RVA on Vref  
.
(2) Vref without influence of RVA  
.
Fig.4 Reference voltage adjustment by RVA  
.
1997 Apr 22  
5
Philips Semiconductors  
Product specification  
Low voltage versatile telephone  
transmission circuit with dialler interface  
TEA1110A  
and VEE. This resistor enables the Istart and Istop line  
Set impedance  
currents to be increased (the ratio between Istart and Istop is  
not affected by the resistor). The AGC function is disabled  
when pin AGC is left open-circuit.  
In the audio frequency range, the dynamic impedance is  
mainly determined by the RCC resistor. The equivalent  
impedance of the circuit is illustrated in Fig.7.  
Mute function (pin MUTE)  
Microphone amplifier (pins MIC+ and MIC)  
The mute function performs the switching between the  
speech mode and the dialling mode. When MUTE is LOW,  
the DTMF input is enabled and the microphone and  
receiving amplifiers inputs are disabled. When MUTE is  
HIGH, the microphone and receiving amplifiers inputs are  
enabled while the DTMF input is disabled. A pull-up  
resistor is included at the input.  
The TEA1110A has symmetrical microphone inputs.  
The input impedance between pins MIC+ and MICis  
64 k(2 × 32 k). The voltage gain from pins MIC+/MIC−  
to pin LN is set at 43.7 dB (typ).  
Automatic gain control is provided on this amplifier for line  
loss compensation.  
DTMF amplifier (pin DTMF)  
Receiving amplifier (pins IR, GAR and QR)  
When the DTMF amplifier is enabled, dialling tones may  
be sent on line. These tones can be heard in the earpiece  
at a low level (confidence tone).  
The receiving amplifier has one input (IR) and one output  
(QR). The input impedance between pin IR and pin VEE is  
20 k. The voltage gain from pin IR to pin QR is set at  
33 dB (typ). The gain can be decreased by connecting an  
external resistor RGAR between pins GAR and QR; the  
adjustment range is 14 dB. Two external capacitors CGAR  
(connected between GAR and QR) and CGARS (connected  
between GAR and VEE) ensure stability. The CGAR  
capacitor provides a first-order low-pass filter. The cut-off  
frequency corresponds to the time constant  
The TEA1110A has an asymmetrical DTMF input.  
The input impedance between DTMF and VEE is 20 k.  
The voltage gain from pin DTMF to pin LN is 25.3 dB.  
The automatic gain control has no effect on the DTMF  
amplifier.  
CGAR × (RGARint // RGAR). RGARint is the internal resistor  
which sets the gain with a typical value of 125 k.  
The condition CGARS = 10 × CGAR must be fulfilled to  
ensure stability.  
MBE783  
2.5  
handbook, halfpage  
I
P
The output voltage of the receiving amplifier is specified for  
continuous wave drive. The maximum output swing  
depends on the DC line voltage, the RCC resistor, the ICC  
current consumption of the circuit, the IP current  
consumption of the peripheral circuits and the load  
impedance.  
(mA)  
2
1.5  
1
Automatic gain control is provided on this amplifier for line  
loss compensation.  
(2)  
(1)  
0.5  
0
Automatic gain control (pin AGC)  
The TEA1110A performs automatic line loss  
compensation. The automatic gain control varies the gain  
of the microphone amplifier and the gain of the receiving  
amplifier in accordance with the DC line current.  
The control range is 5.9 dB (which corresponds  
0
1
2
3
4
V
(V)  
CC  
approximately to a line length of 5 km for a 0.5 mm  
diameter twisted-pair copper cable with a DC resistance of  
176 /km and an average attenuation of 1.2 dB/km).  
The IC can be used with different configurations of feeding  
bridge (supply voltage and bridge resistance) by  
connecting an external resistor RAGC between pins AGC  
(1) With RVA resistor.  
(2) Without RVA resistor.  
Fig.5 Typical current IP available from VCC for  
peripheral circuits at Iline = 15 mA.  
1997 Apr 22  
6
Philips Semiconductors  
Product specification  
Low voltage versatile telephone  
transmission circuit with dialler interface  
TEA1110A  
SIDETONE SUPPRESSION  
The TEA1110A anti-sidetone network comprising  
RCC//Zline, Rast1, Rast2, Rast3, RSLPE and Zbal (see Fig.8 )  
suppresses the transmitted signal in the earpiece.  
Maximum compensation is obtained when the following  
conditions are fulfilled:  
handbook, halfpage  
R
V
CC  
CCint  
R
SLPE × Rast1 = RCC × (Rast2 + Rast3  
(Rast2 × (Rast3 + RSLPE) )  
)
I
PERIPHERAL  
CIRCUIT  
V
rec  
I
P
CCO  
k =  
-----------------------------------------------------------------------  
(Rast1 × RSLPE  
Z bal = k × Zline  
)
MBE792  
V
EE  
The scale factor k is chosen to meet the compatibility with  
a standard capacitor from the E6 or E12 range for Zbal  
.
In practice, Zline varies considerably with the line type and  
the line length. Therefore, the value of Zbal should be for an  
average line length which gives satisfactory sidetone  
suppression with short and long lines. The suppression  
also depends on the accuracy of the match between Zbal  
and the impedance of the average line.  
Fig.6 VCC supply voltage for peripherals.  
The anti-sidetone network for the TEA1110A (as shown in  
Fig.12) attenuates the receiving signal from the line by  
32 dB before it enters the receiving amplifier.  
The attenuation is almost constant over the whole audio  
frequency range.  
LN  
handbook, halfpage  
R
CC  
619 Ω  
R
L
P
EQ  
V
REG  
V
CC  
A Wheatstone bridge configuration (see Fig.9) may also  
be used.  
ref  
SLPE  
R
C
C
SLPE  
20 Ω  
REG  
VCC  
More information on the balancing of an anti-sidetone  
bridge can be obtained in our publication “Applications  
Handbook for Wired Telecom Systems, IC03b”, order  
number 9397 750 00811.  
4.7 µF  
100 µF  
V
EE  
MBE788  
Leq = CREG × RSLPE × RP.  
RP = internal resistance.  
RP = 15.5 k.  
Fig.7 Equivalent impedance between LN and VEE  
.
1997 Apr 22  
7
Philips Semiconductors  
Product specification  
Low voltage versatile telephone  
transmission circuit with dialler interface  
TEA1110A  
LN  
R
R
CC  
ast1  
Z
line  
IR  
I
V
m
EE  
Z
ir  
R
ast2  
R
SLPE  
R
ast3  
Z
bal  
SLPE  
MBE787  
Fig.8 Equivalent circuit of TEA1110A family anti-sidetone bridge.  
LN  
R
Z
CC  
bal  
Z
line  
IR  
I
V
m
EE  
Z
ir  
R
SLPE  
R
R
A
ast1  
SLPE  
MBE786  
Fig.9 Equivalent circuit of an anti-sidetone network in a Wheatstone bridge configuration.  
8
1997 Apr 22  
Philips Semiconductors  
Product specification  
Low voltage versatile telephone  
transmission circuit with dialler interface  
TEA1110A  
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 134).  
SYMBOL  
VLN  
PARAMETER  
CONDITIONS  
MIN.  
MAX.  
UNIT  
positive continuous line voltage  
V
EE 0.4 12  
V
V
repetitive line voltage during switch-on or  
line interruption  
V
EE 0.4 13.2  
Vn(max)  
Iline  
maximum voltage on all pins  
line current  
V
EE 0.4 VCC + 0.4  
V
RSLPE = 20 ;  
140  
mA  
see Figs 10 and 11  
Ptot  
total power dissipation  
TEA1110A  
Tamb = 75 °C;  
see Figs 10 and 11  
588  
384  
mW  
mW  
°C  
TEA1110AT  
Tstg  
storage temperature  
operating ambient temperature  
40  
25  
+125  
+75  
Tamb  
°C  
HANDLING  
This device meets class 2 ESD test requirements [Human Body Model (HBM)], in accordance with  
“MIL STD 883C - method 3015”.  
THERMAL CHARACTERISTICS  
SYMBOL  
Rth j-a  
PARAMETER  
VALUE  
UNIT  
thermal resistance from junction to ambient in free air;  
85  
K/W  
mounted on epoxy board 40.1 × 19.1 × 1.5 mm (TEA1110A)  
thermal resistance from junction to ambient in free air;  
130  
K/W  
mounted on epoxy board 40.1 × 19.1 × 1.5 mm (TEA1110AT)  
1997 Apr 22  
9
Philips Semiconductors  
Product specification  
Low voltage versatile telephone  
transmission circuit with dialler interface  
TEA1110A  
MBH275  
MGD859  
150  
150  
line  
handbook, halfpage  
handbook, halfpage  
I
I
line  
(mA)  
(mA)  
130  
130  
(1)  
110  
110  
90  
(2)  
(3)  
(1)  
(2)  
90  
(4)  
(5)  
(3)  
70  
70  
(4)  
50  
30  
50  
30  
2
2
4
6
8
10  
12  
4
6
8
10  
12  
_
V
(V)  
V
V
(V)  
V
LN SLPE  
LN  
SLPE  
(1) Tamb = 35 °C; Ptot = 1.058 W.  
(2) Tamb = 45 °C; Ptot = 0.941 W.  
(3) Tamb = 55 °C; Ptot = 0.823 W.  
(1) Tamb = 45 °C; Ptot = 0.615 W.  
(2) amb = 55 °C; Ptot = 0.538 W.  
T
(4)  
Tamb = 65 °C; Ptot = 0.705 W.  
(3) Tamb = 65 °C; Ptot = 0.461 W.  
(4) Tamb = 75 °C; Ptot = 0.384 W.  
(5) Tamb = 75 °C; Ptot = 0.588 W.  
Fig.10 SO14 Safe operating area (TEA1110AT).  
Fig.11 DIP14 Safe operating area (TEA1110A).  
1997 Apr 22  
10  
Philips Semiconductors  
Product specification  
Low voltage versatile telephone  
transmission circuit with dialler interface  
TEA1110A  
CHARACTERISTICS  
Iline = 15 mA; VEE = 0 V; RSLPE = 20 ; AGC pin connected to VEE; Zline = 600 ; f = 1 kHz; Tamb = 25 °C;  
unless otherwise specified.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
Supplies (pins VLN, VCC, SLPE and REG)  
Vref  
stabilized voltage between LN and  
SLPE  
3.1  
3.35 3.6  
V
VLN  
DC line voltage  
Iline = 1 mA  
1.6  
2.3  
V
V
V
V
V
Iline = 4 mA  
Iline = 15 mA  
3.35  
3.65 3.95  
Iline = 140 mA  
RVA(SLPEREG) = 27 kΩ  
6.9  
VLN(exR)  
DC line voltage with an external  
resistor RVA  
4.4  
VLN(T)  
DC line voltage variation with  
Tamb = 25 to +75 °C  
±30  
mV  
temperature referred to 25 °C  
ICC  
internal current consumption  
supply voltage for peripherals  
VCC = 2.9 V  
IP = 0 mA  
1.1  
2.9  
550  
1.4  
mA  
V
VCC  
RCCint  
equivalent supply voltage resistance IP = 0.5 mA  
620  
Microphone amplifier (pins MIC+ and MIC)  
Zi  
input impedance  
differential between pins  
MIC+ and MIC−  
64  
32  
kΩ  
kΩ  
single-ended between pins  
MIC+/MICand VEE  
Gvtx  
voltage gain from MIC+/MICto LN VMIC = 4 mV (RMS)  
42.7  
43.7 44.7  
dB  
dB  
Gvtx(f)  
gain variation with frequency  
referred to 1 kHz  
f = 300 to 3400 Hz  
±0.2  
Gvtx(T)  
gain variation with temperature  
Tamb = 25 to +75 °C  
±0.3  
dB  
referred to 25 °C  
CMRR  
common mode rejection ratio  
80  
dB  
V
VLN(max)(rms) maximum sending signal  
(RMS value)  
Iline = 15 mA; THD = 2%  
1.4  
1.7  
Iline = 4 mA, THD = 10%  
0.8  
V
Vnotx  
noise output voltage at pin LN; pins psophometrically  
78.5  
dBmp  
MIC+/MICshorted through 200 Ω  
weighted (P53 curve)  
Receiving amplifier (pins IR, QR and GAR)  
Zi  
input impedance  
20  
kΩ  
dB  
dB  
Gvrx  
voltage gain from IR to QR  
VIR = 4 mV (RMS)  
f = 300 to 3400 Hz  
32  
33  
34  
Gvrx(f)  
gain variation with frequency  
referred to 1 kHz  
±0.2  
Gvrx(T)  
gain variation with temperature  
Tamb = 25 to +75 °C  
±0.3  
dB  
referred to 25 °C  
1997 Apr 22  
11  
Philips Semiconductors  
Product specification  
Low voltage versatile telephone  
transmission circuit with dialler interface  
TEA1110A  
SYMBOL  
PARAMETER  
CONDITIONS  
external resistor  
connected between  
GAR and QR  
MIN.  
TYP.  
MAX.  
14  
UNIT  
Gvrxr  
gain voltage reduction range  
dB  
Vo(rms)  
maximum receiving signal (RMS  
value)  
IP = 0 mA sine wave  
drive; RL = 150 ;  
THD = 2%  
0.25  
0.35  
87  
V
IP = 0 mA sine wave  
drive; RL = 450 ;  
THD = 2%  
V
Vnorx(rms)  
noise output voltage at pin QR  
(RMS value)  
Gvrx = 33 dB;  
IR open-circuit;  
RL = 150 ;  
dBVp  
psophometrically  
weighted (P53 curve)  
Automatic gain control (pin AGC)  
Gvtrx  
gain control range for microphone  
Iline = 85 mA  
5.9  
dB  
and receiving amplifiers with respect  
to Iline = 15 mA  
Istart  
Istop  
highest line current for maximum  
gain  
23  
56  
mA  
mA  
lowest line current for minimum gain  
DTMF amplifier (pin DTMF)  
Zi  
input impedance  
20  
kΩ  
Gvdtmf  
voltage gain from DTMF to LN  
VDTMF = 20 mV (RMS);  
MUTE = LOW  
24.1  
25.3 26.5  
dB  
Gvdtmf(f)  
Gvdtmf(T)  
Gvct  
gain variation with frequency  
referred to 1 kHz  
f = 300 to 3400 Hz  
±0.2  
±0.4  
15  
dB  
dB  
dB  
gain variation with temperature  
referred to 25 °C  
Tamb = 25 to +75 °C  
voltage gain from DTMF to QR  
(confidence tone)  
VDTMF = 20 mV (RMS);  
RL = 150 Ω  
Mute function (pin MUTE)  
VIL  
LOW level input voltage  
V
EE 0.4  
VEE + 0.3  
VCC + 0.4  
V
VIH  
HIGH level input voltage  
input current  
VEE + 1.5  
V
IMUTE  
Gvtrxm  
1.5  
80  
µA  
dB  
gain reduction for microphone and  
receiving amplifiers  
MUTE = LOW  
1997 Apr 22  
12  
Philips Semiconductors  
Product specification  
Low voltage versatile telephone  
transmission circuit with dialler interface  
TEA1110A  
APPLICATION INFORMATION  
GM378  
a
1997 Apr 22  
13  
Philips Semiconductors  
Product specification  
Low voltage versatile telephone  
transmission circuit with dialler interface  
TEA1110A  
PACKAGE OUTLINES  
SO14: plastic small outline package; 14 leads; body width 3.9 mm  
SOT108-1  
D
E
A
X
c
y
H
v
M
A
E
Z
8
14  
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
7
e
detail X  
w
M
b
p
0
2.5  
scale  
5 mm  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
A
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.  
0.25  
0.10  
1.45  
1.25  
0.49  
0.36  
0.25  
0.19  
8.75  
8.55  
4.0  
3.8  
6.2  
5.8  
1.0  
0.4  
0.7  
0.6  
0.7  
0.3  
mm  
1.75  
1.27  
0.050  
1.05  
0.25  
0.01  
0.25  
0.1  
0.25  
0.01  
8o  
0o  
0.0098 0.057  
0.0039 0.049  
0.019 0.0098 0.35  
0.014 0.0075 0.34  
0.16  
0.15  
0.24  
0.23  
0.039 0.028  
0.016 0.024  
0.028  
0.012  
inches  
0.041  
0.01 0.004  
0.069  
Note  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
EIAJ  
91-08-13  
95-01-23  
SOT108-1  
076E06S  
MS-012AB  
1997 Apr 22  
14  
Philips Semiconductors  
Product specification  
Low voltage versatile telephone  
transmission circuit with dialler interface  
TEA1110A  
DIP14: plastic dual in-line package; 14 leads (300 mil)  
SOT27-1  
D
M
E
A
2
A
A
1
L
c
e
w M  
Z
b
1
(e )  
1
b
M
H
14  
8
pin 1 index  
E
1
7
0
5
10 mm  
scale  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
(1)  
Z
A
A
A
2
(1)  
(1)  
1
UNIT  
mm  
b
b
c
D
E
e
e
L
M
M
H
w
1
1
E
max.  
min.  
max.  
max.  
1.73  
1.13  
0.53  
0.38  
0.36  
0.23  
19.50  
18.55  
6.48  
6.20  
3.60  
3.05  
8.25  
7.80  
10.0  
8.3  
4.2  
0.51  
3.2  
2.54  
0.10  
7.62  
0.30  
0.254  
0.01  
2.2  
0.068  
0.044  
0.021  
0.015  
0.014  
0.009  
0.77  
0.73  
0.26  
0.24  
0.14  
0.12  
0.32  
0.31  
0.39  
0.33  
inches  
0.17  
0.020  
0.13  
0.087  
Note  
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
EIAJ  
92-11-17  
95-03-11  
SOT27-1  
050G04  
MO-001AA  
1997 Apr 22  
15  
Philips Semiconductors  
Product specification  
Low voltage versatile telephone  
transmission circuit with dialler interface  
TEA1110A  
Several techniques exist for reflowing; for example,  
SOLDERING  
Introduction  
thermal conduction by heated belt. Dwell times vary  
between 50 and 300 seconds depending on heating  
method. Typical reflow temperatures range from  
215 to 250 °C.  
There is no soldering method that is ideal for all IC  
packages. Wave soldering is often preferred when  
through-hole and surface mounted components are mixed  
on one printed-circuit board. However, wave soldering is  
not always suitable for surface mounted ICs, or for  
printed-circuits with high population densities. In these  
situations reflow soldering is often used.  
Preheating is necessary to dry the paste and evaporate  
the binding agent. Preheating duration: 45 minutes at  
45 °C.  
WAVE SOLDERING  
This text gives a very brief insight to a complex technology.  
A more in-depth account of soldering ICs can be found in  
our “IC Package Databook” (order code 9398 652 90011).  
Wave soldering techniques can be used for all SO  
packages if the following conditions are observed:  
A double-wave (a turbulent wave with high upward  
pressure followed by a smooth laminar wave) soldering  
technique should be used.  
DIP  
SOLDERING BY DIPPING OR BY WAVE  
The longitudinal axis of the package footprint must be  
parallel to the solder flow.  
The maximum permissible temperature of the solder is  
260 °C; solder at this temperature must not be in contact  
with the joint for more than 5 seconds. The total contact  
time of successive solder waves must not exceed  
5 seconds.  
The package footprint must incorporate solder thieves at  
the downstream end.  
During placement and before soldering, the package must  
be fixed with a droplet of adhesive. The adhesive can be  
applied by screen printing, pin transfer or syringe  
dispensing. The package can be soldered after the  
adhesive is cured.  
The device may be mounted up to the seating plane, but  
the temperature of the plastic body must not exceed the  
specified maximum storage temperature (Tstg max). If the  
printed-circuit board has been pre-heated, forced cooling  
may be necessary immediately after soldering to keep the  
temperature within the permissible limit.  
Maximum permissible solder temperature is 260 °C, and  
maximum duration of package immersion in solder is  
10 seconds, if cooled to less than 150 °C within  
6 seconds. Typical dwell time is 4 seconds at 250 °C.  
REPAIRING SOLDERED JOINTS  
A mildly-activated flux will eliminate the need for removal  
of corrosive residues in most applications.  
Apply a low voltage soldering iron (less than 24 V) to the  
lead(s) of the package, below the seating plane or not  
more than 2 mm above it. If the temperature of the  
soldering iron bit is less than 300 °C it may remain in  
contact for up to 10 seconds. If the bit temperature is  
between 300 and 400 °C, contact may be up to 5 seconds.  
REPAIRING SOLDERED JOINTS  
Fix the component by first soldering two diagonally-  
opposite end leads. Use only a low voltage soldering iron  
(less than 24 V) applied to the flat part of the lead. Contact  
time must be limited to 10 seconds at up to 300 °C. When  
using a dedicated tool, all other leads can be soldered in  
one operation within 2 to 5 seconds between  
270 and 320 °C.  
SO  
REFLOW SOLDERING  
Reflow soldering techniques are suitable for all SO  
packages.  
Reflow soldering requires solder paste (a suspension of  
fine solder particles, flux and binding agent) to be applied  
to the printed-circuit board by screen printing, stencilling or  
pressure-syringe dispensing before package placement.  
1997 Apr 22  
16  
Philips Semiconductors  
Product specification  
Low voltage versatile telephone  
transmission circuit with dialler interface  
TEA1110A  
DEFINITIONS  
Data sheet status  
Objective specification  
Preliminary specification  
Product specification  
This data sheet contains target or goal specifications for product development.  
This data sheet contains preliminary data; supplementary data may be published later.  
This data sheet contains final product specifications.  
Limiting values  
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or  
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation  
of the device at these or at any other conditions above those given in the Characteristics sections of the specification  
is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information  
Where application information is given, it is advisory and does not form part of the specification.  
LIFE SUPPORT APPLICATIONS  
These products are not designed for use in life support appliances, devices, or systems where malfunction of these  
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for  
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such  
improper use or sale.  
1997 Apr 22  
17  
Philips Semiconductors  
Product specification  
Low voltage versatile telephone  
transmission circuit with dialler interface  
TEA1110A  
NOTES  
1997 Apr 22  
18  
Philips Semiconductors  
Product specification  
Low voltage versatile telephone  
transmission circuit with dialler interface  
TEA1110A  
NOTES  
1997 Apr 22  
19  
Philips Semiconductors – a worldwide company  
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For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,  
Internet: http://www.semiconductors.philips.com  
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825  
© Philips Electronics N.V. 1997  
SCA54  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed  
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license  
under patent- or other industrial or intellectual property rights.  
Printed in The Netherlands  
417027/1200/02/pp20  
Date of release: 1997 Apr 22  
Document order number: 9397 750 02077  

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