TEA1742T/N1,118 [NXP]
IC CTRLR GREENCHIP PFC 8-SOIC;
| 型号： | TEA1742T/N1,118 |
| 厂家： | 
NXP |
| 描述： | IC CTRLR GREENCHIP PFC 8-SOIC 功率因数校正 |
| 文件： | 总17页 (文件大小：89K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TEA1742T
GreenChip PFC controller
Rev. 01 — 10 February 2009
Objective data sheet
1. General description
The TEA1742T is a controller for Power Factor Correction (PFC). Its high level of
integration allows the design of a cost-effective power supply with a very low number of
external components.
The special built-in green functions provide high efficiency at all power levels. This applies
to quasi-resonant operation at high power levels and quasi-resonant operation with valley
skipping.
The TEA1742T enables highly efficient and reliable supplies with power requirements of
up to 500 W, to be designed easily and with the minimum number of external components.
2. Features
2.1 Distinctive features
I Universal mains supply operation (70 V (AC) to 276 V (AC))
I Dual boost PFC with accurate output voltage (NXP patented)
I High level of integration, resulting in a very low external component count and a
cost-effective design
I Low start-up supply voltage
2.2 Green features
I Valley/zero voltage switching for minimum switching losses (NXP patented)
I Frequency limitation to reduce switching losses
I High ohmic resistive dividers possible to minimize losses
2.3 Protection features
I Safe restart mode for system fault conditions
I Continuous mode protection by means of demagnetization detection (NXP patented)
I Accurate OverVoltage Protection (OVP)
I Open control loop protection
I IC OverTemperature Protection (OTP)
I Low and adjustable OverCurrent Protection (OCP) trip level
TEA1742T
NXP Semiconductors
GreenChip PFC controller
3. Applications
I The device can be used in all applications that require an efficient and cost-effective
PFC solution up to 500 W. PC power supplies in particular can benefit from the high
level of integration and high efficiency
4. Ordering information
Table 1.
Ordering information
Type number
Package
Name
Description
Version
TEA1742T
SO8
plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
TEA1742T_1
© NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 — 10 February 2009
2 of 17
TEA1742T
NXP Semiconductors
GreenChip PFC controller
5. Block diagram
PFCDRIVER
7
PFC DRIVER
PFC GATE
1.12 V
3.5 V
DRV
LOW
VIN
VINSENSE
PFCCOMP
2
3
R
S
PFC PROT
PROT
ENABLE PFC
MAX
3.7 V
BOOST
Q
1.25 V
PFC
OSC
2.50 V
VOSENSE
5
8 µA
V
V
START
UVLO
START STOP
PFC
SMPS
CONTROL
BOOST
LOW VIN
VoOVP
PFC
PROT
OTP
S
R
LATCHED
PROTECTION
VoSHORT
OCP
Vcc<4V
PROT
S
R
VoSHORT
SAFE
RESTART
PROTECTION
PFC DRIVER
ENABLE PFC
BLANK
500 mV
V
UVLO
PFCSENSE
6
60 µA
SOFT START
START STOP PFC
TEMP
OTP
TIMER 4 µs
VALLEY
DETECT
INTERNAL
SUPPLY
PFCAUX
4
PFCGATE
ZCS
V
START
UVLO
TIMER 50 µs
V
100 mV
1
8
GND
014aaa734
V
CC
Fig 1. Block diagram
TEA1742T_1
© NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 — 10 February 2009
3 of 17
TEA1742T
NXP Semiconductors
GreenChip PFC controller
6. Pinning information
6.1 Pinning
1
2
3
4
8
7
6
5
GND
VINSENSE
PFCCOMP
PFCAUX
V
CC
PFCDRIVER
PFCSENSE
VOSENSE
TEA1742T
014aaa735
Fig 2. Pin configuration: TEA1742T (SOT96-1)
6.2 Pin description
Table 2.
Pin description
Symbol
Pin
1
Description
GND
ground
VINSENSE
PFCCOMP
PFCAUX
VOSENSE
PFCSENSE
PFCDRIVER
VCC
2
sense input for mains voltage
3
frequency compensation pin for PFC
input from auxiliary winding for demagnetization timing for PFC
sense input for PFC output voltage
programmable current sense input for PFC
gate driver output for PFC
4
5
6
7
8
supply voltage
TEA1742T_1
© NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 — 10 February 2009
4 of 17
TEA1742T
NXP Semiconductors
GreenChip PFC controller
7. Functional description
7.1 General control
The TEA1742T contains a controller for a power factor correction circuit. A typical
configuration is shown in Figure 3.
7
6
5
4
3
8
V
CC
TEA1742T
2
1
014aaa736
Fig 3. Typical configuration
7.1.1 Start-up and UnderVoltage LockOut (UVLO)
The control logic activates the internal circuitry when the voltage on pin VCC passes the
Vstartup level. First, the soft start capacitor on the PFCSENSE pin is charged. When the
soft start capacitor on the PFCSENSE pin is charged, the PFC circuit is activated. See
Figure 4.
When one of the protection functions is activated, the converter stops switching. For a
restart protection the VCC has to be pulled below Vth(UVLO) to reset the protection. For a
latched protection (OTP), the VCC has to drop below about 4 V (typ).
TEA1742T_1
© NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 — 10 February 2009
5 of 17
TEA1742T
NXP Semiconductors
GreenChip PFC controller
V
V
START
UVLO
V
CC
V
V
start(VINSENSE)
stop(VINSENSE)
VINSENSE
soft start
PFCSENSE
PFCDRIVER
VOSENSE
apply
mains
and VCC
restart
starting
converter
normal
operation
protection
014aaa737
Fig 4. Start-up sequence, normal operation and restart sequence
7.1.2 Supply management
All internal reference voltages are derived from a temperature compensated and trimmed
on-chip band gap circuit. Internal reference currents are derived from a temperature
compensated and trimmed on-chip current reference circuit.
7.1.3 OverTemperature Protection (OTP)
An accurate internal temperature protection is provided in the circuit. When the junction
temperature exceeds the thermal shut-down temperature, the IC stops switching.
OTP is a latched protection. It can be reset by removing the voltage on pin VCC
.
7.2 Power factor correction circuit
The power factor correction circuit operates in quasi-resonant or discontinuous conduction
mode with valley switching. The next primary stroke is only started when the previous
secondary stroke has ended and the voltage across the PFC MOSFET has reached a
minimum value. The voltage on the PFCAUX pin is used to detect transformer
demagnetization and the minimum voltage across the external PFC MOSFET switch.
7.2.1 ton control
The power factor correction circuit is operated in ton control. The resulting mains harmonic
reduction of a typical application is well within the class-D requirements.
TEA1742T_1
© NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 — 10 February 2009
6 of 17
TEA1742T
NXP Semiconductors
GreenChip PFC controller
7.2.2 Valley switching and demagnetization (PFCAUX pin)
The PFC MOSFET is switched on after the transformer is demagnetized. Internal circuitry
connected to the PFCAUX pin detects the end of the secondary stroke. It also detects the
voltage across the PFC MOSFET. The next stroke is started if the voltage across the PFC
MOSFET is at its minimum in order to reduce switching losses and ElectroMagnetic
Interference (EMI) (valley switching).
If no demagnetization signal is detected on the PFCAUX pin, the controller generates a
Zero Current Signal (ZCS), 50 ms (typ) after the last PFCGATE signal.
If no valley signal is detected on the PFCAUX pin, the controller generates a valley signal
4 ms (typ) after demagnetization was detected.
To protect the internal circuitry, for example during lightning events, it is advisable to add a
5 kΩ series resistor to this pin. To prevent incorrect switching due to external disturbance,
the resistor should be placed close to the IC on the printed circuit board.
7.2.3 Frequency limitation
To optimize the transformer and minimize switching losses, the switching frequency is
limited to fsw(PFC)max. If the frequency for quasi-resonant operation is above the fsw(PFC)max
limit, the system switches over to discontinuous conduction mode. Also here, the PFC
MOSFET is only switched on at a minimum voltage across the switch (valley switching).
7.2.4 Mains voltage compensation (VINSENSE pin)
The mathematical equation for the transfer function of a power factor corrector contains
the square of the mains input voltage. In a typical application this results in a low
bandwidth for low mains input voltages, while at high mains input voltages the Mains
Harmonic Reduction (MHR) requirements may be hard to meet.
To compensate for the mains input voltage influence, the TEA1742T contains a correction
circuit. Via the VINSENSE pin the average input voltage is measured and the information
is fed to an internal compensation circuit. With this compensation it is possible to keep the
regulation loop bandwidth constant over the full mains input range, yielding a fast transient
response on load steps, while still complying with class-D MHR requirements.
In a typical application, the bandwidth of the regulation loop is set by a resistor and two
capacitors on the PFCCOMP pin.
7.2.5 Soft start-up (pin PFCSENSE)
To prevent audible transformer noise at start-up or during hiccup, the transformer peak
current, IDM, is increased slowly by the soft start function. This can be achieved by
inserting RSS1 and CSS1 between pin PFCSENSE and current sense resistor RSENSE1
An internal current source charges the capacitor to VPFCSENSE = Istart(soft)PFC × RSS1. The
voltage is limited to Vstart(soft)PFC
.
.
The start level and the time constant of the increasing primary current level can be
adjusted externally by changing the values of RSS1 and CSS1
.
τsoftstart = 3 × R
× C
SS1
SS1
TEA1742T_1
© NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 — 10 February 2009
7 of 17
TEA1742T
NXP Semiconductors
GreenChip PFC controller
The charging current Istart(soft)PFC flows as long as the voltage on pin PFCSENSE is below
0.5 V (typ). If the voltage on pin PFCSENSE exceeds 0.5 V, the soft start current source
starts limiting the current Istart(soft)PFC. As soon as the PFC starts switching, the
Istart(soft)PFC current source is switched off; see Figure 5.
I
≤ 60 µA
S1
startup(soft)PFC
SOFT START
CONTROL
R
C
SS1
11
OCP
PFCSENSE
SS1
0.5 V
R
SENSE1
014aaa157
Fig 5. Soft start-up of PFC
7.2.6 Dual boost PFC
The PFC output voltage is modulated by the mains input voltage. The mains input voltage
is measured via the VINSENSE pin. The current is sourced from the VOSENSE pin if the
voltage on the VINSENSE pin drops below 2.2 V (typ). To ensure the stability of the
switch-over 200 mV is inserted around the 2.2 V, see Figure 6.
For low VINSENSE input voltages, the output current is 8 mA (typ). This output current, in
combination with the resistors on the VOSENSE pin, sets the lower PFC output voltage
level at low mains voltages. At high mains input voltages the current is switched to zero.
The PFC output voltage will then be at its maximum. As this current is zero in this
situation, it does not effect the accuracy of the PFC output voltage.
For proper switch-off behavior, the VOSENSE current is switched to its maximum value,
8 mA (typ), as soon as the voltage on pin VOSENSE drops below 2.1 V (typ).
2.2 V
V
VINSENSE
−8 µA
I
I(VOSENSE)
014aaa738
Fig 6. Voltage to current transfer function for dual boost PFC
TEA1742T_1
© NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 — 10 February 2009
8 of 17
TEA1742T
NXP Semiconductors
GreenChip PFC controller
7.2.7 Overcurrent protection (PFCSENSE pin)
The maximum peak current is limited cycle-by-cycle by sensing the voltage across an
external sense resistor, RSENSE1, on the source of the external MOSFET. The voltage is
measured via the PFCSENSE pin.
7.2.8 Mains undervoltage lockout / brownout protection (VINSENSE pin)
To prevent the PFC from operating at very low mains input voltages, the voltage on the
VINSENSE pin is sensed continuously. As soon as the voltage on this pin drops below the
Vstop(VINSENSE) level, switching of the PFC is stopped.
The voltage on pin VINSENSE is clamped to a minimum value,
Vstart(VINSENSE) + ∆Vpu(VINSENSE), for a fast restart as soon as the mains input voltage is
restored after a mains dropout.
7.2.9 Overvoltage protection (VOSENSE pin)
To prevent output overvoltage during load steps and mains transients, an overvoltage
protection circuit is built in.
As soon as the voltage on the VOSENSE pin exceeds the Vovp(VOSENSE) level, switching of
the power factor correction circuit is inhibited. Switching of the PFC recommences as
soon as the VOSENSE pin voltage drops below the VOVP(VOSENSE) level again.
When the resistor between pin VOSENSE and ground is open, the overvoltage protection
is also triggered.
7.2.10 PFC open-loop protection (VOSENSE pin)
The power factor correction circuit does not start switching until the voltage on the
VOSENSE pin is above the Vth(ol)(VOSENSE) level. This protects the circuit from open-loop
and VOSENSE short situations.
7.2.11 Driver (pin PFCDRIVER)
The driver circuit to the gate of the power MOSFET has a current sourcing capability of
typically −500 (TBF) mA and a current sink capability of typically 1.2 (TBF) A. This permits
fast turn-on and turn-off of the power MOSFET for efficient operation.
8. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Voltages
VCC
Parameter
Conditions
Min
Max
Unit
supply voltage
−0.4
−0.4
−0.4
−0.4
−25
+38
+5
V
V
V
V
V
V
VPFCCOMP voltage on pin PFCCOMP
VVINSENSE voltage on pin VINSENSE
VVOSENSE voltage on pin VOSENSE
+5
+5
VPFCAUX
voltage on pin PFCAUX
+25
+5
VPFCSENSE voltage on pin PFCSENSE
current limited
−0.4
TEA1742T_1
© NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 — 10 February 2009
9 of 17
TEA1742T
NXP Semiconductors
GreenChip PFC controller
Table 3.
Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
Currents
IPFCSENSE current on pin PFCSENSE
−1
+10
+2
mA
A
IPFCDRIVER current on pin PFCDRIVER duty cycle < 10 %
−0.8
General
Ptot
Tstg
Tj
total power dissipation
storage temperature
junction temperature
Tamb < 75 °C
-
0.45
W
−55
−20
+150
+150
°C
°C
ESD
VESD
electrostatic discharge
voltage
class 1
[1]
[2]
human body model
machine model
-
-
-
2000
200
V
V
V
charged device model
500
[1] Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor.
[2] Equivalent to discharging a 200 pF capacitor through a 0.75 µH coil and a 10 Ω resistor.
9. Thermal characteristics
Table 4.
Symbol
Rth(j-a)
Thermal characteristics
Parameter
Conditions
Typ
Unit
K/W
thermal resistance from
junction to ambient
in free air; JEDEC test board
150
10. Characteristics
Table 5.
Characteristics
Tamb = 25 °C; VCC = 20 V; all voltages are measured with respect to ground (pin 2); currents are positive when flowing into
the IC; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Supply voltage management (pin VCC
)
Vstartup
start-up voltage
10.6
10.3
V
V
Vth(UVLO)
undervoltage lockout threshold
voltage
Vhys
hysteresis voltage
V
startup − Vth(UVLO)
0.3
<tbd>
4
V
ICC(oper)
Vrst(latch)
operating supply current
latched reset voltage
no load on pin PFCDRIVER
-
-
mA
V
Input Voltage Sensing PFC (pin VINSENSE)
Vstop(VINSENSE)
Vstart(VINSENSE)
∆Vpu(VINSENSE)
stop voltage on pin VINSENSE
start voltage on pin VINSENSE
0.86
1.11
-
0.89
1.15
−100
0.92
1.19
-
V
V
pull-up voltage difference on
pin VINSENSE
active after Vstop(VINSENSE) is
detected
mV
TEA1742T_1
© NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 — 10 February 2009
10 of 17
TEA1742T
NXP Semiconductors
GreenChip PFC controller
Table 5.
Characteristics …continued
Tamb = 25 °C; VCC = 20 V; all voltages are measured with respect to ground (pin 2); currents are positive when flowing into
the IC; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Ipu(VINSENSE)
pull-up current on pin
VINSENSE
active after Vstop(VINSENSE) is
detected
−55
−47
−40
µA
Vmvc(VINSENSE)max maximum mains voltage
compensation voltage on pin
VINSENSE
4.0
5
-
-
V
II(VINSENSE)
input current on pin VINSENSE VINSENSE > Vstop(VINSENSE) after
start(VINSENSE) is detected
33
100
nA
V
Vbst(dual)
dual boost voltage
current switch-over point
switch-over region
-
-
2.2
-
-
V
200
mV
Loop compensation PFC (pin PFCCOMP)
gm
transconductance
VVOSENSE to IO(PFCCOMP)
VVOSENSE = 2.0V
60
80
100
45
µA/V
µA
µA
V
IO(PFCCOMP)
output current on pin
PFCCOMP
33
39
VVOSENSE = 3.3V
−45
2.5
−39
2.7
−33
2.9
[1]
[1]
Vclamp(PFCCOMP)
clamp voltage on pin
PFCCOMP
Low power mode, PFC off, lower
clamp voltage
Upper clamp voltage
-
3.9
3.5
-
V
V
Vton(PFCCOMP)zero zero on-time voltage on pin
PFCCOMP
3.4
3.6
Vton(PFCCOMP)max maximum on-time voltage on
pin PFCCOMP
1.20
1.25
1.30
V
Pulse width modulator PFC
ton(PFC)
PFC on-time
VVINSENSE = 3.3 V, VPFCCOMP
Vton(PFCCOMP)max
=
=
3.6
30
4.5
40
5.0
53
µs
µs
VVINSENSE = 0.9 V, VPFCCOMP
Vton(PFCCOMP)max
Output voltage sensing PFC (pin VOSENSE)
Vth(ol)(VOSENSE)
Vreg(VOSENSE)
Vovp(VOSENSE)
Ibst(dual)
open-loop threshold voltage on
pin VOSENSE
-
1.15
-
V
regulation voltage on pin
VOSENSE
for IO(PFCCOMP) = 0
2.475 2.500 2.525
V
overvoltage protection voltage
on pin VOSENSE
2.60
2.63
-8
2.67
V
dual boost current
VVINSENSE < Vbst(dual) or VVOSENSE
< 2.1 V
-
-
-
-
µA
nA
VVINSENSE > Vbst(dual)
-30
Overcurrent protection PFC (pin PFCSENSE)
Vsense(PFC)max
maximum PFC sense voltage
∆V/∆t = 50 mV/µs
∆V/∆t = 200 mV/µs
0.49
0.51
250
0.52
0.54
310
0.55
0.57
370
V
V
tleb(PFC)
PFC leading edge blanking
time
ns
Iprot(PFCSENSE)
protection current on pin
PFCSENSE
−50
-
−5
nA
TEA1742T_1
© NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 — 10 February 2009
11 of 17
TEA1742T
NXP Semiconductors
GreenChip PFC controller
Table 5.
Characteristics …continued
Tamb = 25 °C; VCC = 20 V; all voltages are measured with respect to ground (pin 2); currents are positive when flowing into
the IC; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Soft start PFC (pin PFCSENSE)
Istart(soft)PFC
Vstart(soft)PFC
Rstart(soft)PFC
Oscillator PFC
fsw(PFC)max
PFC soft start current
−75
0.46
12
−60
0.50
-
−45
0.54
-
µA
V
PFC soft start voltage
enabling voltage
PFC soft start resistance
kΩ
maximum PFC switching
frequency
100
1.1
125
1.4
150
1.7
kHz
toff(PFC)min
minimum PFC off-time
µs
Valley switching PFC (pin PFCAUX)
(∆V/∆t)vrec(PFC)
PFC valley recognition voltage
-
-
1.7
V/µs
change with time
[2]
tvrec(PFC)
PFC valley recognition time
VPFCAUX = 1 V peak-peak
-
-
50
6
ns
tto(vrec)PFC
PFC valley recognition time-out
time
3
4
µs
Demagnetization management PFC (pin PFCAUX)
Vth(comp)PFCAUX
tto(demag)PFC
Iprot(PFCAUX)
comparator threshold voltage
on pin PFCAUX
−150 −100 −50
mV
µs
PFC demagnetization time-out
time
40
50
-
60
protection current on pin
PFCAUX
VPFCAUX = 50 mV
−75
−5
nA
Driver (pin PFCDRIVER)
Isrc(PFCDRIVER) source current on pin
VPFCDRIVER = 2 V
VPFCDRIVER = 2 V
VPFCDRIVER = 10 V
-
-
-
-
−0.5
TBF
-
A
A
A
V
PFCDRIVER
Isink(PFCDRIVER)
sink current on pin
PFCDRIVER
0.7
TBF
-
1.2
TBF
-
VO(PFCDRIVER)max maximum output voltage on pin
PFCDRIVER
11
12
Temperature protection
Tpl(IC)
IC protection level temperature
130
-
140
10
150
-
°C
°C
Tpl(IC)hys
hysteresis of IC protection level
temperature
[1] For a typical application with a compensation network on pin PFCCOMP, like the example in Figure 3.
[2] Minimum required voltage change time for valley recognition on pin PFCAUX.
TEA1742T_1
© NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 — 10 February 2009
12 of 17
TEA1742T
NXP Semiconductors
GreenChip PFC controller
11. Application information
Capacitor CVCC buffers the IC supply voltage, which has to be supplied by external
means. Sense resistor RSENSE1 converts the current through the MOSFET S1 into a
voltage at pin PFCSENSE. The value of RSENSE1 defines the maximum primary peak
current in MOSFETS S1.
RS1 is added to prevent the soft start capacitor from being charged during normal
operation due to negative voltage spikes across the sense resistor.
Resistor RAUX1 is added to protect the IC from damage during lightning events.
D1
C BUS
S1
CSS1
RSS1
RSENSE1
RS1
RAUX1
7
6
5
8
4
COMPENSATION
CVCC
3
TEA1742T
2
1
014aaa739
Fig 7. Typical application diagram TEA1742T
TEA1742T_1
© NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 — 10 February 2009
13 of 17
TEA1742T
NXP Semiconductors
GreenChip PFC controller
12. Package outline
SO8: plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
D
E
A
X
c
y
H
v
M
A
E
Z
5
8
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
4
e
w
M
detail X
b
p
0
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(2)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
5.0
4.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.01
0.25
0.1
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.20
0.014 0.0075 0.19
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.024
0.028
0.012
inches 0.069
0.01 0.004
Notes
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT96-1
076E03
MS-012
Fig 8. Package outline SOT96-1 (SO8)
TEA1742T_1
© NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 — 10 February 2009
14 of 17
TEA1742T
NXP Semiconductors
GreenChip PFC controller
13. Revision history
Table 6.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
TEA1742T_1
20090210
Objective data sheet
-
-
TEA1742T_1
© NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 — 10 February 2009
15 of 17
TEA1742T
NXP Semiconductors
GreenChip PFC controller
14. Legal information
14.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
to result in personal injury, death or severe property or environmental
14.2 Definitions
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
14.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
14.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
GreenChip — is a trademark of NXP B.V.
15. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
TEA1742T_1
© NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 — 10 February 2009
16 of 17
TEA1742T
NXP Semiconductors
GreenChip PFC controller
16. Contents
1
General description . . . . . . . . . . . . . . . . . . . . . . 1
2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Distinctive features . . . . . . . . . . . . . . . . . . . . . . 1
Green features . . . . . . . . . . . . . . . . . . . . . . . . . 1
Protection features . . . . . . . . . . . . . . . . . . . . . . 1
2.1
2.2
2.3
3
4
5
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7
7.1
7.1.1
7.1.2
7.1.3
7.2
Functional description . . . . . . . . . . . . . . . . . . . 5
General control . . . . . . . . . . . . . . . . . . . . . . . . . 5
Start-up and UnderVoltage LockOut (UVLO) . . 5
Supply management. . . . . . . . . . . . . . . . . . . . . 6
OverTemperature Protection (OTP) . . . . . . . . . 6
Power factor correction circuit. . . . . . . . . . . . . . 6
7.2.1
7.2.2
ton control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Valley switching and demagnetization
(PFCAUX pin) . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Frequency limitation . . . . . . . . . . . . . . . . . . . . . 7
Mains voltage compensation (VINSENSE pin). 7
Soft start-up (pin PFCSENSE) . . . . . . . . . . . . . 7
Dual boost PFC . . . . . . . . . . . . . . . . . . . . . . . . 8
Overcurrent protection (PFCSENSE pin) . . . . . 9
Mains undervoltage lockout / brownout
7.2.3
7.2.4
7.2.5
7.2.6
7.2.7
7.2.8
protection (VINSENSE pin). . . . . . . . . . . . . . . . 9
Overvoltage protection (VOSENSE pin) . . . . . . 9
PFC open-loop protection (VOSENSE pin) . . . 9
Driver (pin PFCDRIVER) . . . . . . . . . . . . . . . . . 9
7.2.9
7.2.10
7.2.11
8
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9
Thermal characteristics. . . . . . . . . . . . . . . . . . 10
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 10
Application information. . . . . . . . . . . . . . . . . . 13
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 15
9
10
11
12
13
14
Legal information. . . . . . . . . . . . . . . . . . . . . . . 16
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16
14.1
14.2
14.3
14.4
15
16
Contact information. . . . . . . . . . . . . . . . . . . . . 16
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 10 February 2009
Document identifier: TEA1742T_1
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