TEA18362T/2J [NXP]
TEA18362T - GreenChip SMPS control IC SOIC 8-Pin;型号: | TEA18362T/2J |
厂家: | NXP |
描述: | TEA18362T - GreenChip SMPS control IC SOIC 8-Pin 开关 |
文件: | 总29页 (文件大小:262K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TEA18362T
GreenChip SMPS control IC
Rev. 2 — 12 December 2013
Product data sheet
1. General description
The TEA18362T is a controller IC for low-cost Switched Mode Power Supplies (SMPS). It
is intended for flyback topologies. The built-in green functions provide high efficiency at all
power levels.
At high power levels the flyback operates in Quasi-Resonant (QR) mode. At lower power
levels, the controller switches to Frequency Reduction (FR) or Discontinuous Conduction
Mode (DCM) and limits the peak current to approximately 25 % of the maximum peak
current. Valley switching is used in all operating modes.
At low power levels, when the flyback switching frequency drops below 25 kHz, the
flyback converter switches to burst mode. A special burst mode has been integrated
which reduces the opto current to a minimum level, ensuring high efficiency at low power
and excellent no load power performance. As the switching frequency in this mode has a
minimum value of 25 kHz while the burst frequency is below 800 Hz, the frequencies are
outside the audible range. During the non-switching phase of the burst mode, the internal
IC supply current is minimized for further efficiency optimization.
The TEA18362T includes an accurate OverPower Protection (OPP). The OPP enables
the controller to operate in overpower situations for a limited amount of time. If the output
is shorted, the system switches to low-power mode where the output power is limited to a
lower level.
The TEA18362T is manufactured in a high-voltage Silicon-On-Insulator (SOI) process.
The SOI process combines the advantages of a low-voltage process (accuracy,
high-speed protection, functions, and control), while maintaining the high-voltage
capabilities (high-voltage start-up, low standby power, and an integrated X-capacitor
discharge function).
The TEA18362T enables low-cost, highly efficient and reliable supplies for power
requirements up to 75 W to be designed with a minimum number of external components.
All values mentioned in this data sheet are typical values, unless otherwise specified.
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
2. Features and benefits
2.1 General features
SMPS controller IC for low-cost applications
Large supply voltage range (up to 30 V)
Integrated high-voltage start-up
Continuous VCC regulation during start-up and protection via the HV pin, allowing a
minimum VCC capacitor value
Reduced opto current in burst mode enabling low no load power consumption
Operating frequencies in all operating modes are outside the audible area
Integrated X-capacitor discharge; NXP Semiconductors patented
(Patent reference: 81512184EP01 (Patent pending))
Adjustable soft start
Power-down mode via the PROTECT pin
2.2 Green features
Low supply current during normal operation (0.6 mA without load)
Low supply current during non-switching state in burst mode (0.2 mA)
Valley switching for minimum switching losses
Frequency reduction with fixed minimum peak current to maintain high efficiency at
low output power levels
2.3 Protection features
Mains voltage independent OverPower Protection (OPP)
OverTemperature Protection (OTP)
Integrated overpower time-out
Integrated restart timer for system fault conditions
Continuous mode protection using demagnetization detection
Accurate OverVoltage Protection (OVP)
General-purpose input for latched protection; for use with system OverTemperature
Protection (OTP)
Driver maximum on-time protection
3. Applications
Applications requiring efficient and cost-effective power supply solutions up to 75 W
4. Ordering information
Table 1.
Ordering information
Type number
Package
Name
Description
Version
TEA18362T/1
SO8
plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
2 of 29
xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx
xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx
xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x
$8;
*DWH
'5,9(5
23OLPLW
ꢌꢊꢊꢀQ$
ꢄꢀ9
9 IꢈODX[ꢉ
ODX[
ꢏꢄꢀ$
+9
6WDUW23&QWU
'HPDJ
9$//(<
%/$1.
ꢍꢄꢀP9
,VHQVH
VRIWVWDUW
+9MIHW
'(7(&7
,6(16(
2&3
,SHDN
YDOOH\
9LQ0HDVXUH
;FDS'LVFKDUJH
9
ꢀ&KDUJH
&&
',*,7$/
%URZQ2XW
*DWH
9&&ꢀFKDUJHGꢀYLD
+9ꢀFXUUHQWꢀVRXUFH
&21752/
ꢁꢂꢌꢄꢀP$
9FF!9FFVWRS
9FF!9FFVWDUW
$ꢋ'
&219(56,21
$
9
ꢀ'LVFKDUJH
,SURWHFWꢀ ꢀRQ
9FWUOꢀ ꢀRQ
&&
7RQ0D[
7RQꢀ!ꢀꢄꢄꢀV
9SURWHFW!ꢊꢂꢄ9
9FWUO!ꢄ9
9FFꢐ9FFUHVHW
9RXW5HJXODWHG
9&&
,VRIWVWDUWꢀ ꢀRQ
,VHQVH!ꢊꢂꢏꢆꢄ9
1RUPDOꢀPRGH
9
9
9
9
ꢀ5HVHW
&&
&&
&&
&&
6WDUW23&QWU
23OLPLW
ꢅꢂꢆꢄꢀ9
ꢇꢂꢇꢀ9
ꢁꢁꢀ9
2&3
VDIHꢎUHVWDUWꢀSURWHFWLRQꢀPRGH
9&&ꢀUHJXODWHGꢀWRꢀ9FFVWDUW
,YFFꢀ ꢀꢌꢌꢊꢀ$
3URWHFWLRQ
%URZQ2XW
ꢀ6WRS
ꢀ/RZ
ꢀ6WDUW
U
JDWH
T
,YFFꢀ ꢀꢆꢊꢊꢀ$
QUꢀRIꢀJDWHꢀSXOVHVꢀ!ꢀꢃꢊ 9FWUO!ꢊꢂꢄ9
6WDQGE\ꢀPRGH
SURWHFWLRQ
ꢊꢊꢀPV
ꢑ
V
9DOOH\
'HPDJ
9FFꢐ9FFUHVHW
1RUPDOꢀPRGH
6WDQGE\ꢀPRGH
%XUVW2Q
/DWFKHGꢀSURWHFWLRQꢀPRGH
9&&ꢀUHJXODWHGꢀWRꢀ9FFVWDUW
,YFFꢀ ꢀꢌꢌꢊꢀ$
7(03(5$785(
3527(&7,21
273
,YFFꢀ ꢀꢌꢍꢄꢀ$
9FF'LVFKDUJH
ꢁꢃꢂꢅꢀ9
9RXW5HJXODWHG
ꢁꢂꢃꢄꢀ9
ꢃꢏꢀ$
ꢃꢊꢀPV
26&,//$725
$1'
3HULRG&RXQWHU
7SHULRG
23
6WDUW23&QWU
HQDEOH
ꢅꢊꢊꢀPV
23GHWHFWLRQ
ꢏꢃꢀ$
&2817(5
ꢌꢊꢊꢀPV
7,0,1*ꢀ6,*1$/6
*DWH
9LQ0HDVXUH
'(/$<ꢀ7,0(56
1QHZ Iꢈ1SUHYꢒ7SHULRGꢉ
1SUHY
5HJLVWHU
6DIH5HVWDUW
&2817(5
5HVWDUW
HQDEOH
7RQ0D[
3527(&7
3RZHUꢎGRZQ
ꢊꢂꢌꢀ9
ꢊꢂꢄꢀ9
ꢄꢀ9
293ꢑ3URWHFW
*DWH&RXQWHU
ꢏꢀ9
ꢁꢍꢌꢂꢄꢀ.+]
ꢋꢃ
)UHT
$
%
FS
ꢏꢆꢄꢀP9
ꢁꢌꢀNȍ
ꢁꢊꢊꢀ$
$X[293
$8;
9RXW5HJXODWHG
ꢍꢀ9
$ %
3XOVHꢀꢁꢀPV
%XUVWPRGH
ꢌꢄꢀ.+]
U
9 ꢀVWRS
&&
T
*1'
V
ꢌꢊꢏꢀP9
U
%XUVW2Q
T
ꢄꢀ9
6WDUW%XUVW
ꢊꢂꢄꢀ9
&75/
V
ꢊꢂꢄꢀ9
ꢌꢂꢄꢀ9
ꢄꢂꢌꢄꢀ9
9FWUO
DDDꢀꢁꢁꢂꢂꢃꢃ
&75/
Fig 1. Block diagram
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
6. Pinning information
6.1 Pinning
9&&
*1'
ꢁ
ꢌ
ꢍ
ꢃ
ꢅ
ꢏ
ꢆ
ꢄ
+9
3527(&7
&75/
,&
'5,9(5
,6(16(
$8;
DDDꢀꢁꢁꢂꢄꢅꢂ
Fig 2. TEA18362T pinning diagram
6.2 Pin description
Table 2.
Pin description
Pin
Pin number
Description
VCC
1
2
3
4
5
supply voltage
ground
GND
DRIVER
ISENSE
AUX
gate driver output
current sense input
auxiliary winding input for demagnetization timing, valley
detect, overpower correction, and OVP
CTRL
6
7
8
control input
PROTECT
HV
general purpose protection input; pin for power-down mode
high voltage start-up; active X-capacitor discharge
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
4 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
7. Functional description
7.1 General control
Figure 3 shows a typical configuration of the TEA18362T, including flyback circuit
controller.
'
VHF
9
RXW
&
RXW
'ꢁ
'ꢌ
5
'5,9(5
6ꢁ
5
+9
&
66
66
+9
'5,9(5
,6(16(
5
*1'
5
VHQVH
,&
5
$8;ꢁ
&75/
$8;
9&&
'
9&&
3527(&7
17&
5
&
9&&
$8;ꢌ
DDDꢀꢁꢁꢂꢄꢆꢁ
Fig 3. Typical TEA18362T configuration
7.1.1 Start-up and UnderVoltage LockOut (UVLO)
Initially, the capacitor on the VCC pin is charged from the high-voltage mains using the
HV pin. As long as VCC is below Vstartup, the IC current consumption is minimized to
40 A.
When VCC reaches the Vstartup level, the control logic activates the internal circuitry. The
IC then waits for the PROTECT pin to reach Vdet(PROTECT) + Vdet(hys)PROTECT, the CTRL pin
to reach Vstartup(CTRL), and the mains voltage to increase to above the brownin level.
When all these conditions are met, the soft start capacitor on the ISENSE pin (CSS in
Figure 3) is charged. The system starts switching. In a typical application, the supply
voltage is taken over by the auxiliary winding of the transformer.
During the start-up period, the VCC pin is continuously regulated to the Vstartup level using
the HV charge current until the output voltage is at its regulation level, which is detected
via the CTRL pin. In this way the VCC capacitor value can be limited. Due to the limited
current capability from the HV pin and depending on the mains voltage, the voltage on pin
VCC can still drop slightly during the start-up period.
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
5 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
9
EURZQLQ
+9
+9FKDUJH
21
2))
9
9
VWDUWXS
9
&&
WKꢈ89/2ꢉ
9
2
9
,2ꢈ3527(&7ꢉ
9
9
GHWꢈ3527(&7ꢉ
VWDUWXSꢈ&75/ꢉ
9
,2ꢈ&75/ꢉ
VRIWꢀVWDUW
9
9
VHQVHꢈPD[ꢉ
RSSꢈ,6(16(ꢉ
9
,ꢈ,6(16(ꢉ
DDDꢀꢁꢁꢂꢄꢆꢃ
Fig 4. Start-up sequence and normal operation
7.2 Modes of operation
The TEA18362T operates in quasi-resonant mode, discontinuous conduction mode or
burst mode (see Figure 5). The auxiliary winding of the flyback transformer provides
demagnetization and valley detection.
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
6 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
%
&
ꢁꢍꢌꢂꢄꢀN+]
GUDLQꢀYROWDJHꢀDWꢀGLIIHUHQWꢀSRLQWV
$
IUHTXHQF\
UHGXFWLRQ
'
GLVFRQWLQXRXVꢀPRGH
ZLWKꢀYDOOH\
I
&
%
$
VZLWFKLQJ
'
V\VWHPꢀHQWHUV
EXUVWꢀPRGH
IURPꢀKHUH
TXDVLꢎUHVRQDQWꢀPRGH
ꢌꢄꢀN+]
3
ꢏꢆꢄꢀP9
,
SHDN
ꢌꢊꢏꢀP9
3
DDDꢀꢁꢁꢂꢄꢆꢇ
Fig 5. Modes of operation
At high output power the converter operates in quasi-resonant mode. The next converter
cycle starts after demagnetization of the transformer and detection of the valley. In
quasi-resonant mode switching losses are minimized because the external MOSFET is
switched on while the drain-source voltage is minimal.
To prevent high-frequency operation at lower loads, the quasi-resonant operation
switches to Discontinuous Conduction Mode (DCM) operation with valley skipping once
the frequency reaches its maximum. This frequency limit reduces the MOSFET switch-on
losses and conducted EMI.
At medium power levels, the controller enters Frequency Reduction (FR) mode. A Voltage
Controlled Oscillator (VCO) controls the frequency. The minimum frequency in this mode
is reduced to 25 kHz. During FR mode, the primary peak current is kept at an adjustable
minimum level to maintain high efficiency. Valley switching is also active in this mode.
At low power, the converter enters the burst mode. In burst mode, the minimum switching
frequency is 25 kHz.
7.3 Supply management
All internal reference voltages are derived from a temperature compensated on-chip band
gap circuit. Internal reference currents are derived from a trimmed and
temperature-compensated current reference circuit.
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
7 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
7.4 Mains voltage measuring
In a typical application, the mains input voltage is measured using the HV pin.
Once per ms the mains voltage is measured by pulling down the HV pin to ground and
measuring its current. This current then reflects the input voltage.
The system determines if the mains voltage exceeds the brownin level or it is
disconnected using an analog-to-digital converter and digital control (see Figure 1).
Once the mains is above the brownin level, the system is allowed to start switching
(see Figure 6).
If the mains voltage is continuously below the brownout level for a period of at least
30 ms, a brownout is detected and the system immediately stops switching. This period is
required to avoid that the system stops switching due to the zero crossings of the mains or
during a short mains interruption.
9
9
EURZQLQ
EURZQRXW
5HFWLILHG
0DLQVꢀYROWDJH
ꢐꢀꢍꢊꢀPV
ꢍꢊꢀPV
'5,9(5
DDDꢀꢁꢁꢂꢂꢃꢇ
Fig 6. Mains voltage measuring
When the mains voltage is measured by pulling the HV pin to ground, the digital control
calculates if there is a positive dV/dt at the mains. A positive dV/dt implies that a mains is
connected.
Once a mains is detected, the measuring of the mains input voltage is stopped for a
period of 6 ms to improve efficiency. In burst mode this waiting period is enlarged to 97 ms
to improve efficiency.
A positive dV/dt is measured when succeeding samples cross the brownin level (Ibi(HV)) or
the mains high level (IIH(HV); see Figure 7).
9
9
PDLQVKLJK
EURZQLQ
5HFWLILHG
0DLQVꢀYROWDJH
ꢆꢀPV
ꢆꢀPV
ꢆꢀPV
ꢌꢅꢀPV
+9ꢀFXUUHQW
VDPSOLQJ
DDDꢀꢁꢁꢂꢂꢃꢄ
3RVLWLYHꢀG9ꢋGWꢀGHWHFWHGꢂꢀ6\VWHPꢀZLOOꢀVWRSꢀVHQVLQJꢀIRUꢀꢆꢀPVꢂ
Fig 7. Detecting mains connection by +dV/dt
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
8 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
If the system does not detect a positive dV/dt for 28 ms, it assumes that the mains is
disconnected. In that case the HV pin is continuously pulled to ground, discharging the
external X-capacitor.
7.5 Auxiliary winding
The VCC pin is connected via a diode and a capacitor to the auxiliary winding to efficiently
supply the control IC.
To detect demagnetization, valley, and input and output voltage, the auxiliary winding is
connected to the AUX pin via a resistive divider (see Figure 3). Each switching cycle is
divided in sections. During each section the system knows if the voltage or current out of
the AUX pin reflects the demagnetization, valley, input or output voltage (see Figure 8).
GUDLQ
9
L
9 ꢀPHDVXUHPHQW
R
$8;
ꢊ
ꢎꢊꢂꢏꢀ9
9 ꢀPHDVXUHPHQW
L
GHPDJQHWL]DWLRQ
YDOOH\
'5,9(5
DDDꢀꢁꢁꢂꢄꢆꢄ
Fig 8. AUX pin used for demagnetization, valley, and input and output voltage
measurement
When the external MOSFET is switched on, the voltage at the auxiliary winding reflects
the input voltage. The AUX pin is clamped to 0.7 V. The output current is a measure of
the input voltage. This current value is internally used for an accurate OPP.
The demagnetization, valley and output voltages are measured as a voltage on the AUX
pin. In this way, the input voltage measurement and OVP can be adjusted independently.
7.6 Protection
If a protection is triggered, the controller stops switching. Depending on the protection
triggered and the IC version, the protection causes a restart or latches the converter to an
off state (See Table 3).
To avoid false triggering, some protections have a built-in delay.
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
9 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
Table 3.
Protections
Protection
Delay
Action
VCC regulated
AUX open
no
wait until AUX is
connected
no
brownout
30 ms
wait until
yes
Vmains > Vbrownin
maximum on-time
OTP internal
no
no
safe restart 800 ms
yes
yes
yes
latch
latch
OTP via the PROTECT 2 ms to 4 ms
pin
OVP via the AUX pin
4 driver pulses[1]
latch
yes
-
overpower
no
via AUX;
compensation
cycle-by-cycle
overpower time-out
overpower + UVLO
40 ms or 200 ms
no
safe restart 800 ms
safe restart 800 ms
cycle-by-cycle
yes
yes
no
overcurrent protection blanking time
UVLO no
Wait until VCC > Vstartup yes
[1] When the voltage on the PROTECT pin is between Vth(pd)PROTECT and Vdet(PROTECT), the clock of the delay
counter is changed from the driver pulse to 1 ms internal pulse.
When the system stops switching, the VCC pin is not supplied via the auxiliary winding
anymore. Depending on the protection triggered, the VCC is regulated to Vstartup via the
HV pin (see Table 3).
Releasing the latched protections or shortening the safe restart timer can be achieved by
removing or shorting the mains voltage. This is called a fast latch reset. It is mainly used
to shorten the test time in production (See Section 7.6.8).
7.6.1 OverPower Protection (OPP)
The overpower function is used to realize a maximum output power which is nearly
constant over the full input mains.
The overpower compensation circuit measures the input voltage via the AUX pin and
outputs two reference voltages (see Figure 1). If the measured voltage at the ISENSE pin
exceeds the highest reference voltage (Vopc(ISENSE)) the DRIVER output is pulled low. If
the measured ISENSE voltage exceeds the lower reference voltage (Vopp(ISENSE)), the
OverPower counter starts. Both reference voltages depend on the measured input
voltage. In this way the system allows 150 % overpower over the rated power on a
cycle-by-cycle base. 100 % overpower triggers the overpower counter of 200 ms. Figure 9
shows the overpower protection curves.
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
10 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
ꢈP9ꢉ
ꢏꢆꢄ
9
23&ꢈ,6(16(ꢉ
ꢄꢊꢊ
ꢃꢄꢊ
ꢌꢇꢄ
9
233ꢈ,6(16(ꢉ
,
$8;
ꢈP$ꢉ
ꢊꢂꢍ
ꢁꢂꢃꢆ
DDDꢀꢁꢁꢈꢅꢉꢃ
Fig 9. Overpower protection curves
During system start-up, the maximum overpower is limited to 100 % and the maximum
time-out period is lowered to 40 ms. Once the output voltage is within its regulation level
(voltage on the CTRL pin is below 5 V), the maximum overpower is switched to 150 %
and the maximum time-out period returns to 200 ms limiting the output power to a
minimum at a shorted output. Lowering the maximum output power and shortening the
overpower timer ensure that the input power of the system is limited to < 5 W at a shorted
output.
Due to the limited output power, the output voltage drops if the load requires more than
150 %. As a result, the VCC voltage drops as well and UVLO can be triggered. To retain
the same response in an overpower situation (whether UVLO is triggered or not) the
system enters the protection mode (latch or safe restart) when overpower + UVLO is
detected. The system entering the protection mode does not depend on the value of the
OP counter.
7.6.2 OverVoltage Protection (OVP)
An accurate output OVP is implemented by measuring the voltage at the AUX pin during
the secondary stroke. As the auxiliary winding voltage is a well-defined replica of the
output voltage, the OVP level can be adjusted by the external resistor divider ratio
R
AUX2 / (RAUX1 + RAUX2).
An internal counter of four gate pulses prevents false OVP detection which can occur
during ESD or lightning events.
7.6.3 Protection input (PROTECT pin)
The PROTECT pin is a general purpose input pin. It can be used to switch off the
converter (latched protection). The converter is stopped when the voltage on this pin is
pulled below Vdet(PROTECT) (0.5 V).
The PROTECT pin can be used to create an OTP function by connecting a Negative
Temperature Coefficient (NTC) resistor to this pin. A voltage on the PROTECT pin lower
than 0.5 V detects overtemperature. The PROTECT current (maximum 74 A) flowing
through the external NTC resistor creates the voltage. The PROTECT voltage is clamped
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
11 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
to maximum 1.45 V. At room temperature the resistance value of the NTC resistor is much
higher than at high temperature. Due to the clamp, the current out of the PROTECT pin is
1.45 V divided by the resistance, which is significantly lower than 74 A.
A filter capacitor can be connected to this pin.
To avoid false triggering, an internal filter of 2 ms to 4 ms is applied.
The PROTECT pin can also be a power-down mode pin (see Section 7.10).
7.6.4 OverTemperature Protection (OTP)
Integrated OTP ensures that the IC stops switching if the junction temperature exceeds
the thermal temperature shutdown limit. OTP is a latched protection.
7.6.5 Maximum on-time
The controller limits the on-time of the external MOSFET to 55 s. When the on-time is
longer, the IC stops switching and enters safe restart mode.
7.6.6 Safe restart
If a protection is triggered and the system enters the safe restart mode, the system
restarts after 800 ms. Because the system is not switching, the VCC pin is supplied from
the mains via the HV pin.
After the 800 ms, the control IC measures the mains voltage. if the mains voltage exceeds
the brownin level, the control IC activates the PROTECT pin current source and the
internal voltage sources connected to the CTRL pin. Once the voltages on these pins
reach a minimum level, the soft start capacitor on the ISENSE pin is charged and the
system starts switching again.
The VCC is continuously regulated to the Vstartup level until the output voltage is within the
regulation level again.
7.6.7 Latched protection
If a protection is triggered and the system enters the latched protection mode, the VCC is
continuously regulated to the Vstartup level via the HV current source. As long as the AC
voltage remains, the system does not switch.
Removing the mains for a short time is the only possibility to restart the system.
7.6.8 Fast latch reset
Fast latch reset is a simple and fast method to reset the system when it is in latched
protection mode or safe restart mode. This function is used during production testing.
When the latched protection mode or safe restart mode is triggered, the voltage on pin
VCC is fast discharged by an internal current source (ICC(dch)); see Figure 10). The fast
discharge avoids an additional waiting period if the VCC voltage is high. When shorting
the mains, the waiting period is only the time of the discharge from Vstartup to Vrst.
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
12 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
9
PDLQV
'5,9(5
SURWHFWLRQ
IDVWꢀGLVFKDUJHꢀWRꢀ9
VWDUWXS
9
&&
9
VWDUWXS
9
9
WKꢈ89/2ꢉ
UVW
9
ꢀJRRG
,&
&&
ꢁꢂꢌꢄꢀP$
ꢌꢌꢊꢀ$
FRQVXPSWLRQ
ꢃꢊꢀ$
ODWFKꢋVDIH
UHVWDUWꢀUHVHW
DDDꢀꢁꢁꢂꢄꢉꢇ
Fig 10. Fast latch reset
Using a 10 F VCC capacitor, the fast latch reset time is below 0.6 s. If the mains is not
shorted but removed, a discharged of the X-cap can cause an additional waiting time.
7.7 Burst mode operation (CTRL pin)
The controller enters the burst mode when a low output power causes the voltage on the
CTRL pin to drop below 0.5 V.
During normal operation, the primary opto current can be calculated with Equation 1:
7 V – VIOCTRL
-------------------------------------------
Iopto
=
(1)
(2)
12 k
This implies that without any additional measure, the maximum primary opto current in
burst mode is:
7 V – 0 V
----------------------------
= 583 A
Iopto
=
12 k
Depending on the optocoupler used , the secondary opto current is even higher.
To achieve minimum no load input power, the internal voltage (7 V) is regulated to a value
that causes the primary opto current value to be 100 A when the system is in burst
mode. The secondary opto current is then automatically also within this lower range. If the
IC detects that the opto current is lower than 80 A, the internal voltage is increased faster
to achieve a small output voltage undershoot at a positive load step. Once the system
enters normal operation mode, the internal voltage is slowly increased to 7 V again.
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
13 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
To avoid audible noise, a special digital burst mode is implemented. The minimum
switching frequency in this mode is 25 kHz. The burst mode repetition rate has a target
frequency of 800 Hz (1250 s; see Figure 11).
The amount of pulses at each burst period is defined by the requested output power. At
higher output power, the amount of switching pulses increases. At low load, it decreases.
The digital circuit defines the amount of burst cycles so that the burst frequency is below
the audible range (800 Hz) and the switching frequency exceeds the audible range
(25 kHz). Any audible noise is avoided.
The minimum amount of switching cycles is set to 3 to ensure good efficiency at very low
loads. To regulate the output power at a very low load, the system increases the burst
period (< 800 Hz). The increased burst period is still outside the audible range.
To further improve the no load input power and efficiency at low loads, the current
consumption of the IC is lowered to 235 A during the non-switching period in the burst
mode.
ꢁꢌꢄꢊꢀV
ꢁꢌꢄꢊꢀV
ꢁꢌꢄꢊꢀV
I
ꢀꢀꢌꢄꢀN+]
3
VZ
I
VZ
ꢀꢀꢌꢄꢀN+]
I
ꢀꢀꢌꢄꢀN+]
VZ
ꢀ!ꢀꢁꢌꢄꢊꢀV
ꢀI ꢀꢀꢌꢄꢀN+]
VZ
W
DDDꢀꢁꢁꢂꢄꢉꢄ
Fig 11. Burst mode operation
To achieve a good transient response in burst mode, the system starts switching
immediately at an increased output load, allowing a shorter burst period. Eventually, it
regulates to the required burst period by increasing the amount of driver pulses
(see Figure 12).
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
14 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
O
ORDG
&75/
9
FODPSꢈ&75/ꢉ
'5,9(5
ꢁꢌꢄꢊꢀV
ꢐꢐꢀꢁꢌꢄꢊꢀV
ꢐꢀꢁꢌꢄꢊꢀV
ꢁꢌꢄꢊꢀV
DDDꢀꢁꢁꢂꢄꢉꢊ
Fig 12. Transient response in burst mode
Due to the discrete number of switching cycles, the new calculated number of pulses must
be 0.5 higher or lower than the existing number before one switching cycle is added or
taken away. For the IC to increase or decrease the amount of switching cycles, a certain
deviation from the target burst repetition frequency (800 Hz) is required because of the
internal algorithm. This deviation becomes smaller when the amount of switching cycles
increases. Figure 13 shows the upper and lower limits of the burst repetition frequency as
a function of the number of pulses.
DDDꢀꢁꢁꢂꢈꢆꢄ
ꢁꢆꢊꢊ
I
ꢈ+]ꢉ
ꢁꢌꢊꢊ
ꢈꢌꢉ
ꢅꢊꢊ
ꢈꢁꢉ
ꢃꢊꢊ
ꢊ
ꢍ
ꢇ
ꢁꢄ
ꢌꢁ
ꢌꢏ
ꢍꢍ
ꢍꢇ
1
SXOVHV
(1) Lower limit
(2) Upper limit
Fig 13. Upper and lower limits of burst frequency
When the amount of driver pulses within one burst period exceeds 40, the system
switches to normal mode again.
During the burst period, the voltage on the CTRL pin is clamped to the minimum
Vclamp(CTRL). The current out of the CTRL pin is measured. If the current exceeds
Istop(CTRL), the burst period is terminated regardless of digital control. This feature ensures
a small overshoot at the output voltage when the load in burst mode suddenly reduces.
At the end of each burst period, the CTRL pin is pulled to the ground level for 12.5 s,
unless the current flowing from pin CTRL < 87 A, which usually occurs at a positive load
step.
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
15 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
7.8 Soft start-up (ISENSE pin)
To prevent audible noise during start-up or a restart condition, a soft start feature is
implemented. Before the converter starts, the soft start capacitor CSS on the ISENSE pin
is charged. When the converter starts switching, the primary peak current slowly
increases as the soft start capacitor discharges through the soft start resistor RSS
(see Figure 3).
The soft start time constant is set by the external soft start capacitor and the parallel
resistor values.
7.9 Driver (DRIVER pin)
The driver circuit to the gate of the power MOSFET has a current sourcing capability of
300 mA and a current sink capability of 750 mA. These capabilities allow a fast turn-on
and turn-off of the power MOSFET for efficient operation.
The maximum driver output is limited to 10.5 V. The DRIVER output pin can be connected
to the gate of a MOSFET directly or via a resistor.
7.10 Power-down mode
To achieve extremely low no-load standby power, the IC can be forced to power-down
mode using an external signal on the PROTECT pin (see Figure 14).
When the voltage on the PROTECT pin is pulled below Vth(pd)PROTECT, the system enters
the power-down mode. The voltage on the CTRL pin is lowered to 0 V. The IC
automatically runs in burst mode with the voltage on pin VCC regulated at the Vrestart
level. The primary and secondary opto current is saved. The current out of the PROTECT
pin is reduced from 74 A to 47 A to save current consumption (See Figure 15).
To avoid that the latched protection is accidentally triggered when the system enters or
comes out of the power-down mode, the latched protection is blocked when the voltage
on the PROTECT pin is lower than Vth(pd)PROTECT
.
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
16 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
'
VHF
9 ꢀꢈ'&ꢉ
R
&
R
'ꢁ
'ꢌ
5
'5,9(5
6ꢁ
5
+9
&
66
66
+9
*1'
'5,9(5
,6(16(
5
5
VHQVH
,&
5
$8;ꢁ
3527(&7
$8;
9&&
'
9&&
SRZHUGRZQ
17&
&75/
5
$8;ꢌ
&
9&&
DDDꢀꢁꢁꢂꢄꢉꢅ
Fig 14. TEA18362T application diagram of power-down feature
9
GHWꢈ3527(&7ꢉ
WKꢈSGꢉ3527(&7
9
3527(&7
9
ꢎꢃꢏꢀ$
ꢎꢏꢃꢀ$
,
3527(&7
ꢎꢁꢌꢁꢀ$
DDDꢀꢁꢁꢂꢈꢂꢇ
Fig 15. PROTECT pin current entering and leaving power down mode
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
17 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Voltages
VIO(HV)
Parameter
Conditions
Min
Max
Unit
input/output voltage on pin
HV
0.4
+700
V
VCC
supply voltage
continuous
t < 100 ms
0.4
-
+30
+35
+12
V
V
V
VIO(CTRL)
VI(ISENSE)
input/output voltage on pin
CTRL
0.4
input voltage on pin
ISENSE
0.4
0.4
5
+12
+5
V
V
V
V
VIO(PROTECT) input/output voltage on pin current limited
PROTECT
VIO(AUX)
input/output voltage on pin current limited
AUX
+5
VO(DRIVER)
output voltage on pin
DRIVER
0.4
+12
Currents
IIO(AUX)
input/output current on pin
AUX
1.5
1
+1
+5
0
mA
mA
mA
mA
A
IIO(HV)
input/output current on pin
HV
IIO(CTRL)
IIO(PROTECT)
IO(DRIVER)
input/output current on pin
CTRL
3
input/output current on pin
PROTECT
1
+1
+1
output current on pin
DRIVER
< 10 %
0.4
General
Ptot
total power dissipation
storage temperature
junction temperature
Tamb < 75 C
-
0.82
W
Tstg
55
40
+150
+150
C
C
Tj
ESD
VESD
electrostatic discharge
voltage
class 1
[1]
[2]
human body
model
pin HV
1000
2000
500
+1000
+2000
+500
V
V
V
all other pins
charged device
model
[1] Equivalent to discharge a 100 pF capacitor through a 1.5 k series resistor.
[2] Equivalent to discharge a 200 pF capacitor through a 0.75 H coil and 10 .
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
18 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
9. Thermal characteristics
Table 5.
Symbol
Rth(j-a)
Thermal characteristics
Parameter
thermal resistance from junction in free air;
Conditions
Typ
Unit
91
K/W
to ambient
JEDEC test board
Rth(j-c)
thermal resistance from junction in free air;
37.8
K/W
to case
JEDEC test board
10. Characteristics
Table 6.
Characteristics
Tamb = 25 C; VCC = 20 V; all voltages are measured with respect to ground (pin 2); currents are positive when flowing into
the IC; unless otherwise specified.
Symbol
Start-up current source (HV pin)
Istartup(HV) start-up current on pin
Parameter
Conditions
Min
Typ
Max
Unit
VHV > 10 V
0.8
-
1.1
-
1.4
1
mA
HV
VCC > Vstartup
;
A
HV not sampling
Vclamp
clamp voltage
IHV < 2 mA
-
-
680
V
Supply voltage management (VCC pin)
Vstartup
Vrestart
start-up voltage
restart voltage
13.4
9.9
9
14.9
11
16.4
12.1
10.8
V
V
V
burst mode
Vth(UVLO)
undervoltage lockout
threshold voltage
9.9
Vrst
reset voltage
7.75
-
8.65
40
9.55
-
V
ICC(startup)
start-up supply current
VHV = 0 V
A
mA
A
VHV > 10 V
1.35
500
1.05
600
0.75
700
ICC(oper)
ICC(burst)
operating supply current driver unloaded;
excluding opto current
burst mode supply
current
non-switching;
excluding opto current
200
235
270
A
ICC(prot)
ICC(dch)
protection supply current
185
0.9
220
255
1.6
A
discharge supply current latched protection;
CC > Vstartup
1.25
mA
V
Mains detect (HV pin)
tp(HV)
pulse duration on pin HV measuring mains
voltage
18
0.9
5
20
1.0
6
22
s
fmeas(HV)
td(norm)HV
td(burst)HV
Ibo(HV)
measurement frequency measuring mains
1.1
7
kHz
ms
ms
A
on pin HV
normal mode delay time measuring mains
on pin HV voltage
burst mode delay time on measuring mains
voltage
87
552
97
587
107
622
pin HV
voltage
brownout current on pin
HV
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
19 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
Table 6.
Characteristics …continued
Tamb = 25 C; VCC = 20 V; all voltages are measured with respect to ground (pin 2); currents are positive when flowing into
the IC; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Ibi(HV)
brownin current on pin
HV
623
663
703
A
Ibo(hys)HV
IIH(HV)
hysteresis of brownout
current on pin HV
-
76
-
A
A
A
A
mA
V
HIGH-level input current
on pin HV
1186
1262
1190
72
1338
IIL(HV)
LOW-level input current
on pin HV
1118
1262
IHL(hys)HV
HIGH to LOW hysteresis
current on pin HV
-
-
-
-
-
-
Iclamp(HV
Vmeas(HV)
td(dch)
)
clamp current on pin HV during measurement
time
-
1.7
measurement voltage on brownin/brownout
pin HV
2.6
28
-
-
-
discharge delay time
X capacitor discharge;
pin HV
ms
ms
td(det)bo
brownout detection delay
time
30
Peak current control (pin CTRL)
VIO(CTRL)
input/output voltage on
pin CTRL
minimum flyback peak
current
2.3
4.9
10
2.5
5.25
12
2.7
5.6
14
V
maximum flyback
current
V
Rint(CTRL)
IIO(CTRL)
internal resistance on pin
CTRL
k
input/output current on
pin CTRL
normal mode
VCTRL = 1.5 V
VCTRL = 3.5 V
0.58
0.385
4.7
0.48
0.315
5
0.38
0.245
5.3
mA
mA
V
Vstartup(CTRL)
start-up voltage on pin
CTRL
Burst mode (pin CTRL)
Vth(burst)
burst mode threshold
0.42
0.5
0.58
V
voltage
Tburst
burst mode period
-
1250
25
-
s
fsw(min)
minimum switching
frequency
burst mode
23
27
kHz
Iregd(CTRL)
Vclamp(CTRL)
Istop(CTRL)
regulated current on pin burst mode
CTRL
115
0.44
820
100
0.5
85
A
V
clamp voltage on pin
CTRL
burst mode;
system switching
0.56
680
stop current on pin CTRL burst mode;
system switching;
750
A
including regulated
output current
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
20 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
Table 6.
Characteristics …continued
Tamb = 25 C; VCC = 20 V; all voltages are measured with respect to ground (pin 2); currents are positive when flowing into
the IC; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tpd(CTRL)
pull-down time on pin
CTRL
10
12.5
15
s
Idet(CTRL)
detection current on pin positive load step
CTRL
65
77
80
87
95
97
A
A
disable pulling down the
CTRL pin
Oscillator
fsw(max)
maximum switching
frequency
125
23
132.5
25
140
27
kHz
kHz
V
fsw(min)
minimum switching
frequency
Vstart(red)f
frequency reduction start pin CTRL
voltage
2.3
2.5
2.7
Current sense (pin ISENSE)
Vsense(max)
maximum sense voltage V/t = 0 V/s;
700
190
765
207
830
225
mV
mV
IAUX = 0 A;
VCTRL = 5.5 V
frequency reduction
mode; V/t = 0 mV/s;
IAUX = 0 A;
VCTRL = 1.0 V
tPD(sense)
sense propagation delay from the ISENSE pin
reaching Vsense(max) to
driver off;
-
120
325
-
ns
ns
VISENSE pulse-stepping
100 mV around
Vsense(max)
tleb
leading edge blanking
time
275
375
Soft start (pin ISENSE)
Istart(soft)
Vstart(soft)
Rstart(soft)
soft start current
85
-
75
65
A
V
soft start voltage
enable voltage
Vsense(max)
-
-
-
soft start resistance
12
k
Demagnetization and valley control (pin AUX)
Vdet(demag)
Iprot(AUX)
tblank(det)demag
(V/t)vrec
demagnetization
detection voltage
20
-
35
50
-
mV
nA
s
protection current on pin
AUX
200
2.2
demagnetization
detection blanking time
1.8
2.6
valley recognition
voltage change with time
positive V/t
negative V/t
0.25
2.35
-
0.37
1.9
120
0.49
1.45
-
V/s
V/s
ns
td(vrec-swon)
Vclamp(AUX)
valley recognition to
switch-on delay time
clamp voltage on pin
AUX
IAUX = 1 mA
4.4
4.8
5.2
V
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
21 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
Table 6.
Characteristics …continued
Tamb = 25 C; VCC = 20 V; all voltages are measured with respect to ground (pin 2); currents are positive when flowing into
the IC; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tsup(xfmr_ring)
transformer ringing
suppression time
1.9
2.3
2.7
s
Maximum on-time (pin DRIVER)
ton(max) maximum on-time
Driver (pin DRIVER)
Isource(DRIVER) source current on pin
45
-
55
65
s
VDRIVER = 2 V
0.3
0.25
A
DRIVER
Isink(DRIVER)
sink current on pin
DRIVER
VDRIVER = 2 V
VDRIVER = 10 V
0.25
0.6
9
0.3
-
A
A
V
0.75
10.5
-
VO(DRIVER)max
maximum output voltage
on pin DRIVER
12
Overpower compensation (pin ISENSE and pin AUX)
Vclamp(AUX)
clamp voltage on pin
AUX
primary stroke;
IAUX = 0.3 mA
0.8
580
1.8
0.7
665
2.2
0.6
750
2.6
V
td(clamp)AUX
clamp delay time on pin after rising edge of pin
AUX
ns
s
DRIVER
after falling edge of pin
DRIVER
Vopc(ISENSE)
overpower
compensation voltage on
pin ISENSE
IAUX = 0.3 mA
IAUX = 1.46 mA
700
400
765
450
830
500
mV
mV
Vopp(ISENSE)
overpower protection
voltage on pin ISENSE
counter trigger level
IAUX = 0.3 mA
450
265
36
500
295
40
550
325
44
mV
mV
ms
IAUX = 1.46 mA
td(opp)
overpower protection
delay time
start-up mode;
VCTRL > 5 V
normal mode
180
720
200
800
220
820
ms
ms
td(restart)
restart delay time
External protection (pin PROTECT)
Vdet(PROTECT)
detection voltage on pin
PROTECT
0.47
-
0.5
50
0.53
-
V
Vdet(hys)PROTECT
hysteresis of detection
voltage on pin
mV
PROTECT
IO(PROTECT)
output current on pin
PROTECT
normal mode
79
55
1.25
74
47
1.45
69
40
1.65
A
A
V
power-down mode
Vclamp(PROTECT)
clamp voltage on pin
PROTECT
Power-down mode (pin PROTECT)
Vth(pd)PROTECT
power-down threshold
voltage on pin
PROTECT
0.18
-
0.2
20
0.22
-
V
Vhys(pd)
power-down hysteresis
voltage
mV
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
22 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
Table 6.
Characteristics …continued
Tamb = 25 C; VCC = 20 V; all voltages are measured with respect to ground (pin 2); currents are positive when flowing into
the IC; unless otherwise specified.
Symbol
Overvoltage protection (pin AUX)
Vovp(AUX) overvoltage protection
Parameter
Conditions
Min
Typ
Max
Unit
2.88
1.9
3
3.12
2.7
V
voltage on pin AUX
tdet(ovp)
overvoltage protection
detection time
in the secondary stroke
2.3
s
Temperature protection
Tpl(IC)
IC protection level
temperature
130
140
150
°C
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
23 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
11. Application information
A power supply with TEA18362T is a flyback converter operating in QR mode or DCM
(See Figure 3).
Capacitor CVCC buffers the IC supply voltage. The IC supply voltage is powered from the
mains via D1, D2, RHV during start-up. It is powered via the auxiliary winding during
normal operation. RHV defines the current into the HV pin for brownout detection and
mains detection.
Sense resistor Rsense converts the current through MOSFET S1 into a voltage on pin
ISENSE. The value of Rsense defines the maximum primary peak current through
MOSFET S1. Resistor RSS and capacitor CSS define the soft start time.
Resistor RDRIVER is required to limit the current spikes to pin DRIVER because of parasitic
inductance of the current sense resistor Rsense. RDRIVER also dampens possible oscillation
of MOSFET S1. Adding a bead on the gate pin of MOSFET S1 can be required to prevent
local oscillations of the MOSFET.
The PROTECT pin can be connected to a Negative Temperature Coefficient (NTC)
resistor. The protection is activated when the resistor drops below a value of
Vdet(PROTECT) / IO(PROTECT) = 6.7 k. Shorting the PROTECT pin to ground by an external
switch or optocoupler can activate the power-down mode.
The resistor RAUX2 determines the compensation for input voltage variation. The ratio of
R
AUX1 and RAUX2 determines the overvoltage protection at the AUX pin.
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
24 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
12. Package outline
62ꢇꢈꢀSODVWLFꢀVPDOOꢀRXWOLQHꢀSDFNDJHꢉꢀꢇꢀOHDGVꢉꢀERG\ꢀZLGWKꢀꢄꢁꢊꢀPPꢀ
627ꢊꢋꢌꢂꢀ
'ꢀ
(ꢀ
$ꢀ
;ꢀ
Fꢀ
\ꢀ
+ꢀ
(ꢀ
Yꢀ 0ꢀ
$ꢀ
=ꢀ
ꢄꢀ
ꢅꢀ
4ꢀ
$ꢀ
ꢌꢀ
$ꢀ
ꢈ$ꢀꢀꢉꢀ
ꢍꢀ
$ꢀ
ꢁꢀ
SLQꢀꢁꢀLQGH[ꢀ
șꢀ
/ꢀ
Sꢀ
/ꢀ
ꢁꢀ
ꢃꢀ
ꢊꢀ
Hꢀ
GHWDLOꢀ;ꢀ
Zꢀ 0ꢀ
Eꢀ
Sꢀ
ꢌꢂꢄꢀ
ꢄꢀPPꢀ
VFDOHꢀ
',0(16,216ꢀꢅLQFKꢀGLPHQVLRQVꢀDUHꢀGHULYHGꢀIURPꢀWKHꢀRULJLQDOꢀPPꢀGLPHQVLRQVꢆꢀ
$ꢀ
ꢅꢂꢆꢀ
ꢅꢂꢆꢀ
ꢅꢃꢆꢀ
81,7ꢀ
$ꢀ
ꢂꢀ
$ꢀ
ꢃꢀ
$ꢀ
ꢄꢀ
Eꢀ
Sꢀ
Fꢀ
'ꢀ
(ꢀ
Hꢀ
+ꢀ
(ꢀ
/ꢀ
/ꢀ
Sꢀ
4ꢀ
Yꢀ
Zꢀ
\ꢀ
ꢊꢂꢁꢀ
=ꢀ
șꢀ
PD[ꢁꢀ
ꢊꢂꢌꢄꢀ ꢁꢂꢃꢄꢀ
ꢊꢂꢁꢊꢀ ꢁꢂꢌꢄꢀ
ꢊꢂꢃꢇꢀ ꢊꢂꢌꢄꢀ
ꢊꢂꢍꢆꢀ ꢊꢂꢁꢇꢀ
ꢄꢂꢊꢀ
ꢃꢂꢅꢀ
ꢃꢂꢊꢀ
ꢍꢂꢅꢀ
ꢆꢂꢌꢀ
ꢄꢂꢅꢀ
ꢁꢂꢊꢀ
ꢊꢂꢃꢀ
ꢊꢂꢏꢀ
ꢊꢂꢆꢀ
ꢊꢂꢏꢀ
ꢊꢂꢍꢀ
PPꢀ
ꢁꢂꢌꢏꢀ
ꢊꢂꢊꢄꢀ
ꢁꢂꢊꢄꢀ
ꢊꢂꢊꢃꢁꢀ
ꢊꢂꢌꢄꢀ ꢊꢂꢌꢄꢀ
ꢁꢂꢏꢄꢀ
ꢊꢂꢌꢄꢀ
ꢊꢂꢊꢁꢀ
Rꢀ
ꢅꢀ
Rꢀ
ꢊꢀ
ꢊꢂꢊꢁꢊꢀ ꢊꢂꢊꢄꢏꢀ
ꢊꢂꢊꢊꢃꢀ ꢊꢂꢊꢃꢇꢀ
ꢊꢂꢊꢁꢇꢀ ꢊꢂꢊꢁꢊꢊꢀ ꢊꢂꢌꢊꢀ ꢊꢂꢁꢆꢀ
ꢊꢂꢊꢁꢃꢀ ꢊꢂꢊꢊꢏꢄꢀ ꢊꢂꢁꢇꢀ ꢊꢂꢁꢄꢀ
ꢊꢂꢌꢃꢃꢀ
ꢊꢂꢌꢌꢅꢀ
ꢊꢂꢊꢍꢇꢀ ꢊꢂꢊꢌꢅꢀ
ꢊꢂꢊꢁꢆꢀ ꢊꢂꢊꢌꢃꢀ
ꢊꢂꢊꢌꢅꢀ
ꢊꢂꢊꢁꢌꢀ
LQFKHVꢀ ꢊꢂꢊꢆꢇꢀ
ꢊꢂꢊꢁꢀ ꢊꢂꢊꢁꢀ ꢊꢂꢊꢊꢃꢀ
1RWHVꢀ
ꢁꢂꢀ3ODVWLFꢀRUꢀPHWDOꢀSURWUXVLRQVꢀRIꢀꢊꢂꢁꢄꢀPPꢀꢈꢊꢂꢊꢊꢆꢀLQFKꢉꢀPD[LPXPꢀSHUꢀVLGHꢀDUHꢀQRWꢀLQFOXGHGꢂꢀ
ꢌꢂꢀ3ODVWLFꢀRUꢀPHWDOꢀSURWUXVLRQVꢀRIꢀꢊꢂꢌꢄꢀPPꢀꢈꢊꢂꢊꢁꢀLQFKꢉꢀPD[LPXPꢀSHUꢀVLGHꢀDUHꢀQRWꢀLQFOXGHGꢂꢀꢀ
ꢀ5()(5(1&(6ꢀ
ꢀ-('(&ꢀ ꢀ-(,7$ꢀ
ꢀ06ꢎꢊꢁꢌꢀ
287/,1(ꢀ
9(56,21ꢀ
(8523($1ꢀ
352-(&7,21ꢀ
,668(ꢀ'$7(ꢀ
ꢀ,(&ꢀ
ꢇꢇꢎꢁꢌꢎꢌꢏꢀ
ꢊꢍꢎꢊꢌꢎꢁꢅꢀ
ꢀ627ꢇꢆꢎꢁꢀ
ꢊꢏꢆ(ꢊꢍꢀ
Fig 16. Package outline SOT96-1 (SO8)
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
25 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
13. Revision history
Table 7.
Revision history
Document ID
TEA18362T v.2
Modifications:
Release date
Data sheet status
Change notice
Supersedes
20131212
Product data sheet
-
TEA18362T v.1
• The data sheet status has changed from preliminary to product.
• Table 1 “Ordering information” has been updated.
TEA18362T v.1
20131204
Preliminary data sheet
-
-
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
26 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
14. Legal information
14.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
Suitability for use — NXP Semiconductors products are not designed,
14.2 Definitions
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
14.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
27 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
non-automotive qualified products in automotive equipment or applications.
14.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
GreenChip — is a trademark of NXP B.V.
15. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
TEA18362T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 12 December 2013
28 of 29
TEA18362T
NXP Semiconductors
GreenChip SMPS control IC
16. Contents
1
General description. . . . . . . . . . . . . . . . . . . . . . 1
2
Features and benefits . . . . . . . . . . . . . . . . . . . . 2
General features. . . . . . . . . . . . . . . . . . . . . . . . 2
Green features . . . . . . . . . . . . . . . . . . . . . . . . . 2
Protection features . . . . . . . . . . . . . . . . . . . . . . 2
2.1
2.2
2.3
3
4
5
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7
7.1
7.1.1
7.2
7.3
7.4
7.5
7.6
7.6.1
7.6.2
7.6.3
7.6.4
7.6.5
7.6.6
7.6.7
7.6.8
7.7
Functional description . . . . . . . . . . . . . . . . . . . 5
General control. . . . . . . . . . . . . . . . . . . . . . . . . 5
Start-up and UnderVoltage LockOut (UVLO) . . 5
Modes of operation. . . . . . . . . . . . . . . . . . . . . . 6
Supply management. . . . . . . . . . . . . . . . . . . . . 7
Mains voltage measuring . . . . . . . . . . . . . . . . . 8
Auxiliary winding. . . . . . . . . . . . . . . . . . . . . . . . 9
Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
OverPower Protection (OPP) . . . . . . . . . . . . . 10
OverVoltage Protection (OVP) . . . . . . . . . . . . 11
Protection input (PROTECT pin) . . . . . . . . . . 11
OverTemperature Protection (OTP) . . . . . . . . 12
Maximum on-time. . . . . . . . . . . . . . . . . . . . . . 12
Safe restart . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Latched protection . . . . . . . . . . . . . . . . . . . . . 12
Fast latch reset. . . . . . . . . . . . . . . . . . . . . . . . 12
Burst mode operation (CTRL pin). . . . . . . . . . 13
Soft start-up (ISENSE pin) . . . . . . . . . . . . . . . 16
Driver (DRIVER pin) . . . . . . . . . . . . . . . . . . . . 16
Power-down mode . . . . . . . . . . . . . . . . . . . . . 16
7.8
7.9
7.10
8
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 18
Thermal characteristics . . . . . . . . . . . . . . . . . 19
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 19
Application information. . . . . . . . . . . . . . . . . . 24
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 25
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 26
9
10
11
12
13
14
Legal information. . . . . . . . . . . . . . . . . . . . . . . 27
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 27
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 28
14.1
14.2
14.3
14.4
15
16
Contact information. . . . . . . . . . . . . . . . . . . . . 28
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2013.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 12 December 2013
Document identifier: TEA18362T
相关型号:
©2020 ICPDF网 联系我们和版权申明