TEA7650H [NXP]
Video signal processor for CD-video/laser vision; 对于CD -视频/激光视力视频信号处理器
| 型号： | TEA7650H |
| 厂家： | 
NXP |
| 描述： | Video signal processor for CD-video/laser vision |
| 文件： | 总23页 (文件大小：237K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TEA7650H
Video signal processor for
CD-video/laser vision
September 1990
Preliminary specification
File under Integrated Circuits, IC02
Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser vision
TEA7650H
FEATURES
GENERAL DESCRIPTION
Bipolar IC for video signal processing used in
• Modulation Transfer Function correction (MTF) at signal
input for both standards
CD-Video/LaserVision players.
Standard PAL respectively NTSC output signal (CVBS).
MTF amplifier.
FM-demodulator followed by de-emphasis stage.
PAL/NTSC switch for switching the MTF and
de-emphasis.
• HF drop out detector
• Data slicer, data output for program information
(IEC standards)
• Separation of signals for Electronic Time Base
Correction (ETBC)
Drop out detector with drop out switch, also externally
switchable.
+5 volt supply, only 325 mW total power dissipation.
• Noise reduction with chrominance trap, noise level
adjust point
• Dynamic picture insertion and 6 dB video attenuation of
main picture
• Bandgap reference voltage output, suitable for CCD
delay line
QUICK REFERENCE DATA
SYMBOL
VP
PARAMETER
supply voltage (pins 12, 30, 47)
MIN.
TYP. MAX. UNIT
−
5
−
V
IP
total supply current
−
−
65
300
−
mA
mV
mV
V
Vi (p-p)
Vo (p-p)
V29
FM input signal at pin 7 (peak-to-peak value)
CVBS output signal for CCDs (peak sync − peak white, pin 29)
black level voltage (pin 29)
50
−
−
850
1.85
−
−
Vi (p-p)
delayed CVBS input signal for drop out path at pin 27
(peak-to-peak value)
−
700
−
mV
Vi (p-p)
delayed CVBS input signal at pin 31 from ETBC path
(peak-to-peak value)
−
−
−
600
1
−
−
−
mV
V
Vo (p-p)
V42
main CVBS output signal at pin 42 (peak-to-peak value)
black level voltage (pin 42)
2.2
V
Vo (p-p)
chrominance output signals at pins 44, 48 (peak-to-peak value)
PAL (burst)
−
−
−
760
725
1.6
−
−
−
mV
mV
V
NTSC (burst)
Vref
reference output voltage (pin 41)
ORDERING AND PACKAGE INFORMATION
PACKAGE
EXTENDED TYPE NUMBER
PINS
PIN POSITION
MATERIAL
CODE
TEA7650H
48
QFP48
plastic
SOT196A(1)
Note
1. SOT196-1; 1996 November 25.
September 1990
2
Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser vision
TEA7650H
Fig.1 Block and test circuit; (continued in Fig.2)
September 1990
3
Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser vision
TEA7650H
Fig.2 Block and test circuit; (continued from Fig.1).
September 1990
4
Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser vision
TEA7650H
PINNING
SYMBOL
CRSC1
PIN
DESCRIPTION
1
3.67 MHz resonant circuit 1
CS1
2
line synchronization output pulse 1 (composite sync)
drop out control, input/output for external control
field sync output
DOCO
VS
3
4
CBG
5
charging capacitor for burst rectifier
CMTF
6
charging capacitor for MTF control voltage
FM input signal from preamplifier
FM-IN
FREF1
FREF2
MTFO
AMPIN
VP1
7
8
PAL resonant circuit for the MTF
9
NTSC resonant circuit for the MTF
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
MTF output signal (corrected FM signal)
input for 8 dB amplifier (FM signal)
+5 V supply (referred to pins 6 to 15 and 18)
output of 8 dB amplifier (FM signal)
AMPO
LIMIN1
CLIM
limiter amplifier input (FM signal to demodulator)
capacitor for slicing level control of limiter
capacitor for clamping level of FM demodulator
data request input for data at pin 25
FM demodulator output (CVBS negative)
ground (0 V) for VP1
CDEM
DRQ
DEMO
GND1
FBO1
FBO2
CCVBS
DEEMI
CAGC1
DATA
CAGC2
PRLIN
GND3
DOSW
VP3
feedback output at PAL and NTSC (de-emphasis)
feedback output, additional at NTSC (de-emphasis)
capacitor for clamping of CVBS amplifier
de-emphasis input for CVBS from demodulator
capacitor for AGC of CVBS amplifier
data output of information code
capacitor for AGC of drop out amplifier
input signal of preceding line from CCD delay
ground (0 V) for VP3
drop out switch buffer output (to CCD delay and ETBC)
+5 V supply (referred to pins 5, 17, 20 to 36, 38 to 42)
CVBS input signal from ETBC
VIDIN
CAGC3
VIBUF
FTRAP
LIMI2
NRADJ
MODE
INSEN
VDATT
EXVID
capacitor for AGC of CVBS follower amplifier
video signal buffer output to chroma trap circuitry
switching output for chroma trap at NTSC
limiter amplifier input for noise reduction
noise level adjust point (resistor to ground)
standard select input PAL/NTSC (PAL = LOW)
insertion enable input
6 dB CVBS attenuation (active HIGH)
external CVBS input for insertion
September 1990
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Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser vision
TEA7650H
SYMBOL
PIN
DESCRIPTION
Vref
41
42
43
44
45
46
47
48
reference voltage output (1.6 V)
main CVBS output signal
CVBS
GND2
CHR2
CRSC2
CS2
ground (0 V) for VP2
chrominance output signal 2
3.67 MHz resonant circuit 2
line synchronization pulse 2 (composite sync)
+5 V supply (referred to pins 1 to 4, 16, 37, 43 to 48)
chrominance output signal 1
VP2
CHR1
PIN CONFIGURATION
Fig.3 Pin configuration.
September 1990
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Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser vision
TEA7650H
FUNCTIONAL DESCRIPTION
De-emphasis
Figures 1, 2 show the block diagram of the Video Signal
Processor (VSP) including the peripheral circuitry for the
video signal processing. The pulse-width modulated FM
signal from the preamplifier is fed, via a DC blocking
capacitor, into the IC (pin 7) at the input to the Modulation
Transfer Function (MTF) circuit which corrects for the
characteristic of the optical reading system.
The de-emphasis circuit consists of an internal inverting
amplifier and an external RC feedback network. Since the
pre-emphasis on the disk in the PAL standard is different
from that in the NTSC standard, the time constants are
switchable. When PAL is selected, the first arm of the
feedback network is active, otherwise both operate in
parallel. The de-emphasized video signal is fed into an
AGC stage (pin 20) where it is clamped on its black level
and amplitude-controlled to a constant level. The signal is
then fed into the data slicer and the drop out switch.
MTF correction
Due to the finite diameter of the laser beam spot and the
tangential velocity of the track of pits on the disk, the MTF
of the optical system acts like a radius-dependent
low-pass filter for the FM input signal. Although the video
signal can be recovered without correction, the ratio of the
amplitudes of the chrominance and luminance signals
would not then be the same at the most inner and the most
outer part of the disk. This influence of the disk radius is
automatically corrected by the Video Signal Processor.
The principle of correction is to use the deviation of the
demodulated burst signal to generate an error voltage in
order to control the frequency selective MTF circuit. The
burst measurement operates as follows: A burst-key
generator is triggered by the line synchronization pulse
(CS1) to generate a burst-key pulse which activates the
burst gate and rectifier stage. The signal at the rectifier
output (pin 6) is used to control the amplification of the
MTF circuit.
Data slicer
Coded signals on the video disk are extracted by the data
slicer (output pin 25) when the Data Request input is
activated (pin 17).
Drop out compensation
The drop out detector (DOD) in the IC is triggered by every
positive or negative transition of the FM signal. A drop out
is detected when the half-cycle period is outside the limits.
Protection against a drop out is achieved by use of a video
signal delayed by one line. The signal at the output of the
drop out switch is fed out of the IC via a buffer (pin 29) and
then through a delaying device (CCD) before being fed
back into the IC (pin 27). The delayed video signal appears
at the input of an AGC circuit to compensate for gain
tolerances of the delay line and avoids the need for an
external adjustment. When a drop out is detected, the drop
out detector activates the video switch so that the lost
information of the line is substituted by the information of
the preceding line.
The carrier frequency in the PAL standard is different to
that in the NTSC standard, therefore two separate
resonant circuits are required on pins 8 and 9. They are
selected by the PAL/NTSC system selector (pin 37).
The MTF-corrected FM signal at pin 10 is amplified (+8 dB)
and fed, via the external filter which removes the audio
frequency components from the signal, into the
demodulator at pin 14.
The drop out pulse is also present at pin 3 and can be used
for different purposes. This pin can also act as an input to
control the drop out switch by an external signal for test
purposes.
Demodulation
Time error compensation
The FM signal is first fed into a limiter circuit (pin 14) with
automatic slicing level control to suppress the main carrier
in the demodulated signal. The demodulator has two
outputs. The first (internal) clamps the demodulated video
signal on peak-sync by controlling the transconductance of
the demodulator. The FM signal can now be demodulated
during disk start-up, thereby facilitating fast run-in. The
second output signal from the demodulator (pin 18) is
passed through an external 5 MHz low-pass filter to extract
the CVBS signal. The CVBS signal is then fed into the
de-emphasis network to compensate for the pre-emphasis
of the video signal recorded on the disk.
In a videodisc player timing errors are caused by
deviations of the rotational speed of the motor,
imperfections in the disk and unavoidable tolerances in the
centering of the disk on the turntable. Track eccentricity is
the main cause of timing errors.
To minimize timing errors, it is necessary in the first place
to keep the rotational speed of the disk as constant as
possible. Referring back to the output of the switch in
Fig.1-2, the video signal is also fed into a sync separator
and a chrominance separator with its external resonant
circuits tuned to the chrominance subcarrier
September 1990
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Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser vision
TEA7650H
frequency.The phase of the line synchronization pulses
(CS1, pin 2) can be used to control the speed of the
turntable motor.
low-frequency components. It is then fed into a limiter
(pin 35) which ensures that only small amplitudes (mainly
noise) are removed from the main signal.
However, with this method it is not possible to obtain an
acceptable reduction of timing errors for frequencies of
25 Hz and above. To reduce errors, use is made of an
external Electronic Time Base Corrector (ETBC) between
pins 27 and 31 which functions as a variable delay line
driven by an error signal.
The chrominance subcarrier trap is switched to either the
PAL subcarrier frequency (4.43 MHz) or the NTSC
subcarrier (3.58 MHz) by the PAL/NTSC system selector
(pin 37) using the additional small capacitor at pin 34. An
external resistor at pin 36 is included so that
manufacturers can select their preferred level of noise
reduction, or none at all, by grounding the pin.
This error signal can be extracted from the output signal
CS1 (pin 2), CHR1 (pin 48), CS2 (pin 46) and CHR2
(pin 44).
Picture insertion
The CVBS signal containing the information to be
Since the line sync pulses (CS1) are not suitable to
achieve an accurate enough measurement of time
difference, use is made of the 3.58 MHz burst signal
derived from the chrominance signal CHR1. If the same
zero crossing of the burst signal is used in every line, the
actual time can be measured with sufficient accuracy.
displayed is applied to pin 40. A clamp circuit ensures that
the black level of this signal is the same as that of the main
signal. Both signals are applied to the insertion switch.
When, for example, a character is to be displayed the 6 dB
attenuation (pin 39) is first activated to generate a reduced
contrast background area around the character (with
respect to the black level so that the original picture is still
visible). Next, the insertion switch (pin 38) is activated and
the character appears at the output. By switching back to
the original picture, the procedure operates in the reverse
sequence.
The CVBS signal leaving the ETBC might still have small
timing errors due to residual control error. A second
(feedback) loop is therefore required. The CVBS signal is
fed into an AGC circuit (pin 31) that compensates for gain
tolerances in the ETBC. As in the first loop, the line
synchronization pulses (CS2) and the chrominance signal
(CHR2) are derived from the CVBS signal by using second
sync and chrominance separators. The error signal
obtained by comparison in this feedback loop is added to
the error signal obtained in the first loop.
Other examples of the picture insertion facility are
displaying a background picture during start-up of the
video disk player or the use of picture-in-picture.
A buffer is provided at the CVBS output (pin 42) which
delivers a CVBS signal clamped to black level and
controlled to a peak-to-peak amplitude of 1 V.
Using the burst signal for accurate measurements is a
problem in the PAL format due to its alternating phase.
A special 3.75 MHz (240 fh) burst has therefore been
added to the video signal recorded on the PAL disk. This
burst is inserted on the top level of the line sync pulses.
Reference voltage
A reference voltage of 1.6 V is provided by a bandgap
circuit. Internally, all control circuits are supplied with this
reference voltage. Externally, it can be used for various
purposes.
In dual standard applications, the resonant circuits of the
chrominance separators (pins 1 and 45) should be tuned
to 3.67 MHz to ensure good separation of the special burst
or the chrominance subcarrier.
When the timebase-corrected CVBS signal has by-passed
the second sync and chrominance separators, it reaches
the special burst suppressor which removes the special
burst. The signal is then fed into the noise reduction circuit.
Noise reduction
A noise reduction circuit can be used to improve the
apparent picture quality of a noisy signal. It operates as
follows: First the timebase corrected CVBS signal is
buffered (pin 33) and then fed into an external network
which removes the chrominance subcarrier and all
September 1990
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Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser vision
TEA7650H
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134).
SYMBOL
PARAMETER
supply voltage 1 (pin 12)
MIN.
MAX.
UNIT
VP1
VP2
VP3
Vn
0
6
V
supply voltage 2 (pin 47)
0
6
V
supply voltage 3 (pin 30)
0
6
V
voltage on all pins except ground pins
total power dissipation
0
VP
360
V
Ptot
Tstg
0
mW
°C
°C
V
storage temperature range
−25
0
+150
+70
−
Tamb
VESD
operating ambient temperature range
electrostatic handling(1) for all pins
±400
Note
1. Equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor.
THERMAL RESISTANCE
SYMBOL
Rth j-a
PARAMETER
MIN.
MAX.
UNIT
from junction to ambient in free air
−
92
K/W
September 1990
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Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser vision
TEA7650H
CHARACTERISTICS
VP1 = VP2 = VP3 = 5 V, Tamb = 25 °C, measurements taken in Fig.1-2 ; unless otherwise specified.
Voltages referred to
GND1 (pin 19):
GND2 (pin 43):
GND3 (pin 28):
VP1 and voltage at pins 6 to 15, 18
VP2 and voltage at pins 1 to 4, 16, 37, 44 to 48
VP3 and voltage at pins 5, 17, 20 to 36, 38 to 42
SYMBOL
PARAMETER
CONDITIONS
MIN.
4.5
TYP.
MAX.
5.5
UNIT
VP1
supply voltage 1 (pin 12)
supply voltage 2 (pin 47)
5
5
5
−
V
V
V
VP2
4.5
4.5
−
5.5
VP3
supply voltage 3 (pin 30)
total supply current
5.5
I12+30+47
65
mA
Standard select input (pin 37)
VIL
VIH
input voltage for standard PAL (LOW)
input voltage for standard NTSC (HIGH), pin connected
0
3
−
−
−
−
−
−
−
−
1
V
V
VP2
−
alternative measure for standard NTSC
pin open-circuit
V37 = 1 V
IIL
input current (LOW)
input current (HIGH)
−100
20
µA
µA
IIH
V37 = 4 V
Modulation transfer function MTF (referred to GND1, pin 19)
Vi (p-p)
FM input signal at pin 7
(peak-to-peak value)
50
50
−
−
−
5
300
200
−
mV
mV
kΩ
for proper MTF correction
input impedance
Z7
MTF control signal
I (p-p)
I 6
output current for storage of the burst
amplitude at pin 5 (peak-to-peak value)
−
200
−
µA
burst amplitude integrator,
charging current (pin 6)
−
−
±50
−1
−
−
µA
g
conductance g = dI6 / dV5
mS
MTF frequency selection (pins 8 and 9)
pin 8 active for PAL;
pin 9 active for NTSC
Vo (p-p)
Z
output signal
−
−
−
−
−
V7 (p-p)
−
mV
Ω
output impedance
output current
−
−
−
−
10
Io (p-p)
Vo (p-p)
Z10
4.5
300
100
mA
mV
Ω
MTF output signal (pin 10)
MTF output impedance
signal gain
Gv
Gv = V10 / V7
Go
Gv = Go + 20 log Gr (V6)
minimum gain
−
0
−
−
−
−
−
−
dB
dB
Gr
V 6 = 0
−
0
maximum gain
V 6 = 2.6 V
V 6 = 2.6 V
−3 dB; Gr = 0
f = 8 MHz
−
300Ω/R8
maximum gain
−
300Ω/R9
B
bandwidth
15
40
−
−
MHz
dB
α2H
second harmonic suppression
September 1990
10
Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser vision
TEA7650H
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
MTF following amplifier (pins 11 and 13)
Vi (p-p)
FM input signal at pin 11
(peak-to-peak value)
−
−
−
300
−
mV
Z11
input impedance
10
−
kΩ
kΩ
Ω
RE
internal emitter resistor to ground
output impedance (pin 13)
1.8
−
Z13
−
−
50
Io (p-p)
output current at pin 13
(peak-to-peak value)
−
−
8
−
−
1
−
−
−
mA
dB
Gv
B
voltage gain (pins 13-11)
bandwidth (pin 13)
−
−3 dB
15
40
MHz
dB
α2H
second harmonic suppression
Limiting amplifier for demodulator
Vi (p-p)
input signal for proper demodulation
at pin 14 (peak-to-peak value)
0.1
10
−
−
1
V
Z14
input impedance
−
kΩ
I (p-p)
charging current of 2nd harmonic control
at pin 15 (peak-to-peak value)
−
200
−
µA
FM demodulator with pulswidth-modulated current output (f = 2 fin). Referred to GND1, pin 19
I (p-p)
output current pulse at pin 18
(peak-to-peak value)
−
−3.2
−1.75
−
−
mA
I18
Z18
V18
S
mean (average) DC current
output impedance
for top sync
−
−
mA
30
0
−
kΩ
DC output voltage range
transconductance
−
2
V
at PAL
−
−210
−185
−
−
µA/MHz
µA/MHz
%
at NTSC
−
−
N
static non-linearity
bandwidth
−
10
−
B
±1 dB
5
−
MHz
dB
α
main carrier suppression
V14 (p-p) = 100 mV
35
−
−
I (p-p)
charging current at pin 16 (amplitude
storage for top sync, peak-to-peak value)
−
26
−
µA
De-emphasis amplifier (output pin 21 only for NTSC active). Referred to GND3, pin 28
Z23
I23
input impedance (pin 23)
DC input current
10
−
−
−
kΩ
µA
−
2
I (p-p)
charging current for black clamping
capacitor at pin 22 (peak-to-peak value)
−
3
−
µA
Ω
R20, 21
V20, 21
BWg
output impedance (pins 20 and 21)
DC output voltage (black level)
gain bandwidth product
−
−
100
−
−
2.2
−
V
40
−
MHz
I24 (p-p)
charging current for AGC capacitor
at pin 24 (peak-to-peak current)
−
11
−
µA
September 1990
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Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser vision
TEA7650H
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Composite sync output CS1 (pin 2; referred to GND2, pin 43)
VoH
VoL
td
sync output voltage (active HIGH)
sync output voltage (LOW)
delay of positive going sync edge
jitter of positive going sync edge
rise and fall time
I2 = −0.5 mA
4
−
−
−
−
−
−
V
V
I2 = 0.5 mA
−
−
−
−
0.4
300
40
ns
ns
ns
∆td
tr, tf
CL = 22 pF
200
Vertical sync output (VS), open collector output with 500 Ω internal series resistor, referred to GND2, pin 43
V4
td
sync output voltage active LOW (pin 4)
delay time
I4 = −0.5 mA
−
−
−
−
0,7
−
V
18
70
µs
µs
te
elongation time
−
Drop out processing. (referred to GND3, pin 28)
fi
frequency range for no drop out
recognition
f1
f2
f1
f2
td
minimum value at PAL
maximum value at PAL
minimum value at NTSC
maximum value at NTSC
−
−
−
−
5.6
−
−
−
−
MHz
MHz
MHz
MHz
9.7
6.97
11.1
delay time on negative going edge
for an abrupt drop out with
f < 0.5 f1 or f > 1.5 f2
−
−
−
250
ns
te
drop out elongation time
C3 = 47 pF;
R3 = 100 kΩ
3.5
−
µs
V3
output voltage during drop out
internal RS = 500 Ω;
I3 = −0.5 mA
−
−
0
−
0.7
−
V
V
V
V3 thr
threshold voltage of drop out switch
2
V3 DO
Vi (p-p)
input voltage for forced drop out switching
0.7
delayed video input signal at pin 27
(peak-to-peak value)
RG ≤ 1 kΩ
−
700
2.2
−
−
−
−
mV
V
V27
DC input voltage (black level)
input impedance
−
Z27
10
kΩ
I (p-p)
charging current for coupling capacitor
at pin 27 (peak-to-peak value)
−
−
3
−
−
µA
µA
I (p-p)
charging current for AGC of the delayed
signal at pin 26 (peak-to-peak value)
11
September 1990
12
Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser vision
TEA7650H
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Chrominance output for purpose of ETBC, with RL = 5 kΩ (pin 48) and nominal input signal. Resonant circuit at pin
1 tuned to 4.43 MHz for PAL (3.58 MHz for NTSC). Referred to GND2, pin 43. See previous comment to
characteristics.
Vo (p-p)
burst amplitude (peak-to-peak value)
at pin 48
PAL; f = 4.43 MHz
−
760
725
−
−
mV
mV
Ω
NTSC; f = 3.58 MHz
−
−
Z48
output impedance
−
250
700
−
Io (p-p)
αCR
R1
output current (peak-to-peak value)
crosstalk attenuation from pin 44
output impedance for resonant circuit
−
−
µA
dB
kΩ
32
−
−
1.4
−
Electronic time base control ETBC and CCD delay (external). Referred to GND3, pin 28.
Vo (p-p)
CVBS output signal of emitter output
at pin 29 (peak-to-peak value)
V20 (p-p) = 0.5 V ±3 dB
(peak-to-peak value)
−
850
230
219
1.85
−Vt / I 29
−
−
mV
mV
mV
V
burst amplitude in signal
for PAL
−
−
for NTSC
−
−
V29
DC output voltage (black level)
output impedance
−
−
Z29
−
−
Ω
I29
output current (source)
−
−3
−
mA
dB
S/N
signal-to-noise ratio from pin 7 to pin 29
5 MHz unweighted
50
−
∆Vo (p-p)
difference of CVBS amplitude
(peak-to-peak value)
switching from main
to delayed signal;
V27 (p-p) = 0.7 V
at pin 29 referred to 0 dB level
at pin 29 referred to ±4 dB level
crosstalk attenuation
0 dB
−
±2
±6
−
%
±4 dB
−
−
−
−
−
%
αCR
∆V29
∆VS
f = 2 MHz
35
−
dB
mV
mV
offset voltage after switching
spike amplitude at switching (pin 29)
10
15
t S > 50 ns
−
Chrominance and luminance amplifier (referred to GND3, pin 28).
Vi (p-p)
V31
delayed CVBS input signal (pin 31)
DC input voltage (black level)
input impedance
RG ≤ 1 kΩ
−
600
2.2
−
−
−
−
mV
V
−
Z31
10
kΩ
I (p-p)
charging current for coupling capacitor
at pin 31 (peak-to-peak value)
−
−
3
−
−
µA
µA
I (p-p)
charging current for AGC
at pin 32 (peak-to-peak value)
11
September 1990
13
Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser vision
TEA7650H
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Chrominance output for purpose of ETBC, with RL = 5 kΩ (pin 44) and nominal input signal. Resonant circuit at pin
45 tuned to 4.43 MHz for PAL (3.58 MHz for NTSC). Referred to GND2, pin 43. See previous comment to
characteristics.
Vo (p-p)
burst amplitude (peak-to-peak value)
at pins 44
for PAL
f = 4.43 MHz
f = 3.58 MHz
−
760
725
−
−
mV
mV
Ω
for NTSC
−
−
Z44
output impedance
−
250
700
−
Io (p-p)
αCR
R45
output current (peak-to-peak value)
crosstalk attenuation from pin 48
output impedance for resonant circuit
−
−
µA
dB
kΩ
32
−
−
1.4
−
Luminance noise reduction (referred to GND3, pin 28)
V(p-p)
output signal at pin 33
(peak-to-peak value)
Vi (p-p) = 0.6 V ±3 dB
at pin 31
−
−
1
−
−
V
V
V33
IE
DC output voltage (black level)
2.2
internal emitter current to ground
of emitter follower
−
−
1
−
mA
Z33
output impedance
−
100
Ω
Io (p-p)
AC output current at pin 33
(peak-to-peak value)
−
−
1.5
mA
I (p-p)
chroma trap switch, active for NTSC
input current (peak-to-peak value)
−
−
−
−
350
50
µA
Z34
input impedance (pin 34)
Ω
Vi (p-p)
limiter amplifier input signal at pin 35
(peak-to-peak value)
−
1
−
V
input signal for start of limiting
input impedance
0
−
100
−
mV
kΩ
V
Z35
V36
−
2
voltage range or limiter control (pin 36)
voltage for control-off
0.1
−
−
1.5
−
0
V
I36
DC output current
−
−100
−
µA
Main CVBS output (referred to GND3, pin 28).
Vo (p-p)
CVBS output signal of emitter output
at pin 42 (peak-to-peak value)
Vi (p-p) = 0.6 V ±0 dB
at pin 31
−
1
−
V
∆Vo (p-p)
residual variation of output voltage
at pin 42 (peak-to-peak value)
Vi (p-p) = 0.6 V ±3 dB
at pin 31
−
−
−
±3
%
V
V42
IE
DC output voltage (black level)
2.2
−
internal emitter current to ground
of emitter follower
−
300
−
−
µA
Ω
Z42
Io
output impedance
output source current
video bandwidth
−
100
−5
−
−
mA
MHz
dB
B
−3 dB
5
S/N
signal-to-noise ratio from pin 31 to pin 42 5 MHz unweighted
60
−
−
September 1990
14
Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser vision
TEA7650H
SYMBOL
PARAMETER
CONDITIONS
f = 5 MHz
MIN.
45
TYP.
MAX.
UNIT
dB
αCR
crosstalk attenuation between main
and inserted signal
−
−
differences at output due to switching
from main to inserted signal (pin 42)
αburst
∆V42
∆VS
suppression of special burst
offset voltage after switching
spike amplitude at switching
video attenuation for internal signal
35
−
−
−
−
6
−
dB
50
20
−
mV
mV
dB
t S > 50 ns
−
∆VVID
V39 = HIGH
−
External video insertion input and switching control
Vi (p-p)
V40
input signal at pin 40 (peak-to-peak value) RG ≤ 1 kΩ
DC voltage (black level)
−
1
−
−
−
−
V
−
2.9
0
V
Gv
voltage gain (pins 42-40)
−
dB
kΩ
Z40
input impedance
10
−
I (p-p)
charging current at pin 40
(peak-to-peak value)
−
8
3
0
−
−
−
3
0
−
−
−
3
−
−
−
−
−
−
−
−
−
−
−
−
µA
MHz
V
B
video bandwidth
−3 dB
−
V38
voltage for insertion-on (HIGH)
voltage for insertion-off (LOW)
input current (HIGH)
VP
1
V
I38
V38 = 4 V
V38 = 1 V
2
µA
µA
ns
V
input current (LOW)
−10
50
VP
1
td
switchover delay time
V39
voltage for video attenuation-on (HIGH)
voltage for video attenuation-off (LOW)
input current (HIGH)
−6 dB video
0 dB video
V39 = 4 V
V
I39
I39
td
2
µA
µA
ns
input current (LOW)
V39 = 1 V
−10
100
switchover delay time
Data output and data request input (pins 25 and 17)
V25
output voltage HIGH-level (pin 25)
output voltage LOW-level
duty factor (tp / T)
I25 = −0.5 mA
3.5
−
−
−
V
I25 = 0.5 mA
−
0.8
−
V
tp
−
50
−
%
ns
ns
tr and tf
td
rise and fall time
CL = 22 pF
−
150
200
delay time
−
−
V17
voltage for data request-on (HIGH)
at pin 17
3
0
−
−
−
−
−
−
−
−
VP
V
voltage for data request-off (LOW)
input current (HIGH)
1
V
I17
V17 = 4 V
V17 = 1 V
20
µA
µA
ns
input current (LOW)
−100
200
td
data delay time
September 1990
15
Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser vision
TEA7650H
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Composite sync output CS2 (referred to GND2, pin 43)
V46
sync output voltage (active HIGH)
sync output voltage at pin 46 (LOW)
delay of positive going sync edge
jitter of positive going sync edge
rise time
I46 = −0.5 mA
4
−
−
−
−
−
−
−
V
V
I46 = 0.5 mA
−
−
−
−
−
0.4
300
40
td
∆td
tr
ns
ns
ns
ns
CL 46 = 22 pF
CL 46 = 22 pF
150
200
tf
fall time
Reference output voltage (referred to GND3, pin 28)
Vref
R41
Iref
reference output voltage (pin 41)
output resistance
−
−
−
−
−
1.6
−
−
V
5
kΩ
µA
dB
mV
output current (used for CCD reference)
−
±10
−20
±30
dV41 /dVP supply voltage dependence
dV41 dependence of junction temperature
−
Tj = 20 to 120 °C
−
September 1990
16
Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser vision
TEA7650H
APPLICATION INFORMATION
Fig.4 Internal circuits; (continued in Fig.5).
September 1990
17
Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser vision
TEA7650H
Fig.5 Internal circuits; (continued from Fig.4).
September 1990
18
Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser vision
TEA7650H
Fig.6 Internal circuits; (continued from Fig.5).
September 1990
19
Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser vision
TEA7650H
Fig.7 Internal circuits; (continued from Fig.6).
September 1990
20
Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser vision
TEA7650H
PACKAGE OUTLINE
QFP48: plastic quad flat package; 48 leads (lead length 2.5 mm); body 10 x 10 x 1.75 mm
SOT196-1
c
y
X
36
25
A
37
24
Z
E
Q
e
A
H
2
E
E
A
(A )
3
A
1
w M
p
θ
L
p
b
pin 1 index
L
13
48
detail X
12
1
Z
v
M
M
A
D
e
w M
b
p
D
B
H
v
B
D
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
D
H
L
L
Q
v
w
y
Z
Z
E
θ
1
2
3
p
E
p
D
max.
7o
0o
0.3 1.85
0.1 1.65
0.42 0.25 10.1 10.1
0.28 0.14 9.9 9.9
15.5 15.5
14.5 14.5
2.4 1.05
1.6 0.75
1.05 1.05
0.70 0.70
mm
2.20
0.25
0.75
2.5
0.3 0.15 0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-11-17
95-02-04
SOT196-1
September 1990
21
Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser vision
TEA7650H
SOLDERING
Introduction
Wave soldering
Wave soldering is not recommended for QFP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
If wave soldering cannot be avoided, the following
conditions must be observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
• The footprint must be at an angle of 45° to the board
direction and must incorporate solder thieves
downstream and at the side corners.
Reflow soldering
Even with these conditions, do not consider wave
soldering the following packages: QFP52 (SOT379-1),
QFP100 (SOT317-1), QFP100 (SOT317-2),
Reflow soldering techniques are suitable for all QFP
packages.
QFP100 (SOT382-1) or QFP160 (SOT322-1).
The choice of heating method may be influenced by larger
plastic QFP packages (44 leads, or more). If infrared or
vapour phase heating is used and the large packages are
not absolutely dry (less than 0.1% moisture content by
weight), vaporization of the small amount of moisture in
them can cause cracking of the plastic body. For more
information, refer to the Drypack chapter in our “Quality
Reference Handbook” (order code 9397 750 00192).
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Repairing soldered joints
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
September 1990
22
Philips Semiconductors
Preliminary specification
Video signal processor for CD-video/laser
vision
TEA7650H
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
September 1990
23
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