TJA1048T_技术文档

TJA1048

Dual high-speed CAN transceiver with Standby mode

Rev. 6 — 19 March 2018

Product data sheet

1. General description

The TJA1048 is a dual high-speed CAN transceiver that provides an interface between a

Controller Area Network (CAN) protocol controller and the physical two-wire CAN bus.

The transceiver is designed for high-speed CAN applications in the automotive industry,

providing the differential transmit and receive capability to (a microcontroller with) a CAN

protocol controller.

The TJA1048 belongs to the third generation of high-speed CAN transceivers from NXP

Semiconductors, offering significant improvements over first- and second-generation

devices such as the TJA1040. It offers improved Electro Magnetic Compatibility (EMC)

and ElectroStatic Discharge (ESD) performance, and also features:

• Ideal passive behavior to the CAN bus when the supply voltage is off

• A very low-current Standby mode with bus wake-up capability on both channels

• Can be interfaced directly to microcontrollers with supply voltages from 3 V to 5 V

The TJA1048 implements the CAN physical layer as defined in ISO 11898-2:2016 and

SAE J2284-1 to SAE J2284-5. This implementation enables reliable communication in the

CAN FD fast phase at data rates up to 5 Mbit/s.

These features make the TJA1048 an excellent choice for all types of HS-CAN networks

containing more than one HS-CAN interface that require a low-power mode with wake-up

capability via the CAN bus, especially for Body Control and Gateway units.

2. Features and benefits

2.1 General

 Two TJA1042/3 HS-CAN transceivers combined monolithically in a single package

 ISO 11898-2:2016 and SAE J2284-1 to SAE J2284-5 compliant

 Timing guaranteed for data rates up to 5 Mbit/s in the CAN FD fast phase

 Suitable for 12 V and 24 V systems

 Low ElectroMagnetic Emission (EME) and high ElectroMagnetic Immunity (EMI)

 V_IOinput allows for direct interfacing with 3 V to 5 V microcontrollers

 Available in SO14 and HVSON14 packages

 Leadless HVSON14 package (3.0 mm  4.5 mm) with improved Automated Optical

Inspection (AOI) capability

 Dark green product (halogen free and Restriction of Hazardous Substances (RoHS)

compliant)

 AEC-Q100 qualified

TJA1048

NXP Semiconductors

Dual high-speed CAN transceiver with Standby mode

2.2 Low-power management

 Very low-current Standby mode with host and bus wake-up capability

 Functional behavior predictable under all supply conditions

 Transceiver disengages from the bus when not powered up (zero load)

 Wake-up receiver powered by V_IO; allows shut down of V_CC

2.3 Protection

 High ESD handling capability on the bus pins

 Bus pins protected against transients in automotive environments

 Transmit Data (TXD) dominant time-out function

 Undervoltage detection on pins V_CCand V_IO

 Thermally protected

3. Quick reference data

Table 1.

Symbol

V_CC

Quick reference data

Parameter

Conditions

Min Typ Max Unit

supply voltage

4.5

2.8

3.5

-

5.5

4.5

V

V_IO

supply voltage on pin V_IO

V_uvd(VCC)undervoltage detection voltage on

pin V_CC

V_uvd(VIO)undervoltage detection voltage on

pin V_IO

1.3

-

2.0 2.7

V

I_CC

supply current

Standby mode

0.5

2

A

Normal mode

both channels recessive

one channel dominant

both channels dominant

Standby mode; V_TXD= V_IO

Normal mode

-

20

mA

A

-

80

90

140

I_IO

supply current on pin V_IO

16.5 26

both channels recessive

one channel dominant

both channels dominant

IEC 61000-4-2 at pins CANHx and CANLx

pins CANH1 and CANH2

pins CANL1 and CANL2

-

35

A

kV

V

-

300

550

+6

-

V_ESD

V_CANH

V_CANL

T_vj

electrostatic discharge voltage

voltage on pin CANH

6

58

40

+58

voltage on pin CANL

V

virtual junction temperature

+150 C

TJA1048

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Product data sheet

Rev. 6 — 19 March 2018

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TJA1048

NXP Semiconductors

Dual high-speed CAN transceiver with Standby mode

4. Ordering information

Table 2.

Ordering information

Type number

Package

Name

Description

Version

TJA1048T

SO14

plastic small outline package; 14 leads; body width 3.9 mm

SOT108-1

TJA1048TK

HVSON14

plastic, thermal enhanced very thin small outline package; no leads;

SOT1086-2

14 terminals; body 3  4.5  0.85 mm

TJA1048

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Product data sheet

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TJA1048

NXP Semiconductors

Dual high-speed CAN transceiver with Standby mode

5. Block diagram

V

3

IO

CC

11

V

/V

CC IO

TEMPERATURE

PROTECTION

UNDERVOLTAGE

DETECTION

13

12

CANH1

CANL1

SLOPE CONTROL

AND DRIVER

MODE

CONTROL

1

TIME-OUT

TXD1

V

CC

IO

NORMAL

RECEIVER

14

STBN1

WAKE-UP

FILTER

LOW-POWER

RECEIVER

V

CC

4

MUX and

DRIVER

RXD1

10

9

CANH2

CANL2

SLOPE CONTROL

AND DRIVER

V

IO

6

TIME-OUT

TXD2

V

CC

8

STBN2

NORMAL

RECEIVER

IO

WAKE-UP

FILTER

LOW-POWER

RECEIVER

7

2

MUX and

DRIVER

RXD2

GNDA

5

GNDB

015aaa146

Fig 1. Block diagram

TJA1048

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Product data sheet

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TJA1048

NXP Semiconductors

Dual high-speed CAN transceiver with Standby mode

6. Pinning information

6.1 Pinning

terminal 1

index area

TXD1

1

2

3

4

5

6

7

14 STBN1

13 CANH1

12 CANL1

1

2

3

4

5

6

7

14

13

12

11

10

9

TXD1

STBN1

CANH1

CANL1

GNDA

V

CC

V

CC

TJA1048TK

RXD1

GNDB

TXD2

RXD2

11

V

IO

RXD1

GNDB

TXD2

RXD2

TJA1048T

V

IO

10 CANH2

CANH2

CANL2

STBN2

9

8

CANL2

STBN2

8

015aaa207

015aaa144

Fig 2. Pin configuration diagram: SO14

Fig 3. Pin configuration diagram: HVSON14

6.2 Pin description

Table 3.

Symbol

TXD1

Pin description

Pin Description

1

transmit data input 1

GNDA

V_CC

2^[1]transceiver ground

3

transceiver supply voltage

RXD1

GNDB

TXD2

4

receive data output 1; reads out data from bus line1

5^[1]transceiver ground

6

7

8

9

transmit data input 2

RXD2

STBN2

CANL2

CANH2

V_IO

receive data output 2; reads out data from bus line 2

standby control input 2 (HIGH = Normal mode, LOW = Standby mode)

LOW-level CAN bus line 2

10 HIGH-level CAN bus line 2

11 supply voltage for I/O level adapter

CANL1

CANH1

STBN1

12 LOW-level CAN bus line 1

13 HIGH-level CAN bus line 1

14 standby control input 1 (HIGH = Normal mode, LOW = Standby mode)

[1] Pins 2 and 5 must be connected together externally in the application. HVSON14 package die supply

ground is connected to both the GND pin and the exposed center pad. The GND pin must be soldered to

board ground. For enhanced thermal and electrical performance, it is recommended that the exposed

center pad also be soldered to board ground.

TJA1048

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Product data sheet

Rev. 6 — 19 March 2018

5 of 27

TJA1048

NXP Semiconductors

Dual high-speed CAN transceiver with Standby mode

7. Functional description

The TJA1048 is a dual HS-CAN stand-alone transceiver with Standby mode and robust

ESD handling capability. It combines the functionality of two TJA1042/3 transceivers with

improved EMC and quiescent current performance. Improved slope control and high DC

handling capability on the bus pins provide additional application flexibility.

7.1 Operating modes

The TJA1048 supports two operating modes per transceiver, Normal and Standby. The

operating mode can be selected independently for each transceiver via pins STBN1 and

STBN2 (see Table 4).

Table 4.

Mode

Operating modes

Pin STBN1/STBN2 Pin RXD1/RXD2

LOW

HIGH

Normal

HIGH

LOW

bus dominant

bus recessive

Standby

wake-up request detected

no wake-up request detected

7.1.1 Normal mode

A HIGH level on pin STBN1/STBN2 selects Normal mode. In this mode, the transceiver

can transmit and receive data via the bus lines CANH1/CANL1 and CANH2/CANL2 (see

Figure 1 for the block diagram). The differential receiver converts the analog data on the

bus lines into digital data which is output on pin RXD1/RXD2. The slopes of the output

signals on the bus lines are controlled internally and are optimized in a way that

guarantees the lowest possible EME.

7.1.2 Standby mode

A LOW level on pin STBN1/STBN2 selects Standby mode. In Standby mode, the

transceiver is not able to transmit or correctly receive data via the bus lines. The

transmitter and Normal-mode receiver blocks are switched off to reduce supply current,

and only a low-power differential receiver monitors the bus lines for activity.

In Standby mode, the bus lines are biased to ground to minimize the system supply

current. The low-power receiver is supplied by V_IO, and is capable of detecting CAN bus

activity even if V_IOis the only supply voltage available. When pin RXD1/RXD2 goes LOW

to signal a wake-up request, a transition to Normal mode will not be triggered until

STBN1/STBN2 is forced HIGH.

7.1.3 Remote wake-up (via the CAN bus)

A dedicated wake-up sequence (specified in ISO 11898-2:2016) must be received to

wake-up the TJA1048 from a low-power mode. This filtering is necessary to avoid

spurious wake-up events due to a dominant clamped CAN bus or dominant phases

caused by noise or spikes on the bus.

A valid wake-up pattern consists of:

• A dominant phase of at least t_wake(busdom)followed by

• A recessive phase of at least t_wake(busrec)followed by

• A dominant phase of at least t_wake(busdom)

TJA1048

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Product data sheet

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TJA1048

NXP Semiconductors

Dual high-speed CAN transceiver with Standby mode

The complete dominant-recessive-dominant pattern must be received within t_to(wake)busto

be recognized as a valid wake-up pattern (see Figure 4). Pin RXD1/RXD2 will remain

recessive until the wake-up event has been triggered.

After a wake-up sequence has been detected, the TJA1048 will remain in Standby mode

with the bus signals reflected on RXD1/RXD2. Note that dominant or recessive phases

lasting less than t_{fltr(wake)bus}will not be detected by the low-power differential receiver and

will not be reflected on RXD1/RXD2 in Standby mode.

A wake-up event will not be registered if any of the following events occurs while a

wake-up sequence is being transmitted:

• The TJA1048 switches to Normal mode

• The complete wake-up pattern was not received within t_to(wake)bus

• A V_IOundervoltage is detected (V_IO< V_uvd(VIO); see Section 7.2.3)

If any of these events occurs while a wake-up sequence is being received, the internal

wake-up logic will be reset and the complete wake-up sequence will have to be

re-transmitted to trigger a wake-up event.

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IOWUꢂZDNHꢃEXV

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Fig 4. Wake-up timing

7.2 Fail-safe features

7.2.1 TXD dominant time-out function

A 'TXD dominant time-out' timer is started when pin TXD1/TXD2 is set LOW. If the LOW

state on this pin persists for longer than t_to(dom)TXD, the transmitter is disabled, releasing

the bus lines to recessive state. This function prevents a hardware and/or software

application failure from driving the bus lines to a permanent dominant state (blocking all

network communications). The TXD dominant time-out timer is reset when pin

TXD1/TXD2 is set HIGH. The TXD dominant time-out time also defines the minimum

possible bit rate of 40 kbit/s. The TJA1048 has two TXD dominant time-out timers that

operate independently of each other.

TJA1048

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Product data sheet

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TJA1048

NXP Semiconductors

Dual high-speed CAN transceiver with Standby mode

7.2.2 Internal biasing of TXD1, TXD2, STBN1 and STBN2 input pins

Pins TXD1 and TXD2 have internal pull-ups to V_IOand pins STBN1 and STBN2 have

internal pull-downs to GNDA and GNDB. This ensures a safe, defined state if any of these

pins is left floating. Pins GNDA and GNDB must be connected together in the application.

Pull-up/pull-down currents flow in these pins in all states. Pins TXD1 and TXD2 should be

held HIGH in Standby mode to minimize the supply current; pins STBN1 and STBN2

should be held LOW.

7.2.3 Undervoltage detection on pins V_CCand V_IO

Should V_CCdrop below the V_CCundervoltage detection level, V_uvd(VCC), both transceivers

will switch to Standby mode. The logic state of pins STBN1 and STBN2 will be ignored

until V_CChas recovered.

Should V_IOdrop below the V_IOundervoltage detection level, V_uvd(VIO), the transceivers will

switch off and disengage from the bus (zero load) until V_IOhas recovered.

7.2.4 Overtemperature protection

The output drivers are protected against overtemperature conditions. If the virtual junction

temperature exceeds the shutdown junction temperature, T_j(sd), both output drivers will be

disabled. When the virtual junction temperature drops below T_j(sd)again, the output

drivers will recover independently once TXD1/TXD2 has been reset to HIGH. Including

the TXD1/TXD2 condition prevents output driver oscillation due to small variations in

temperature.

7.3 V_IOsupply pin

Pin V_IOshould be connected to the microcontroller supply voltage (see Figure 7). This will

adjust the signal levels of pins TXD1, TXD2, RXD1, RXD2, STBN1 and STBN2 to the I/O

levels of the microcontroller. Pin V_IOalso provides the internal supply voltage for the

transceiver’s low-power differential receiver. For applications running in low-power mode,

this allows the bus lines to be monitored for activity even if there is no supply voltage on

pin V_CC

.

TJA1048

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Product data sheet

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TJA1048

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Dual high-speed CAN transceiver with Standby mode

8. Limiting values

Table 5.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND.

Symbol

Parameter

voltage on pin x^[1]

Conditions

Min

Max

Unit

V

V_x

on pins CANH1, CANL1, CANH2 and CANL2

on any other pin

58

+58

0.3 +7

V

V_(CANH-CANL)voltage between pin CANH

and pin CANL

27

+27

V

[2]

V_trt

transient voltage

on pins CANH1, CANL1, CANH2 and CANL2

pulse 1

100

-

V

pulse 2a

pulse 3a

pulse 3b

-

75

-

150

-

100

[3]

[4]

V_ESD

electrostatic discharge voltage IEC 61000-4-2 (150 pF, 330 )

on pins CANH1, CANL1, CANH2 and CANL2

6

+6

kV

Human Body Model (HBM); 100 pF, 1.5 k

on pins CANH1, CANL1, CANH2 and CANL2

at any other pin

6

4

+6

+4

kV

[5]

[6]

Machine Model (MM); 200 pF, 0.75 H, 10 

at any pin

300 +300

V

Charged Device Model (CDM); field Induced

charge; 4 pF

at corner pins

at any pin

750 +750

500 +500

V

[7]

T_vj

virtual junction temperature

storage temperature

40

55

+150

C

T_stg

[1] The device can sustain voltages up to the specified values over the product lifetime, provided applied voltages (including transients)

never exceed these values.

[2] According to IEC TS 62228 (2007), Section 4.2.4; parameters for standard pulses defined in ISO7637 part 2: 2004-06.

[3] According to IEC TS 62228 (2007), Section 4.3; DIN EN 61000-4-2.

[4] According to AEC-Q100-002.

[5] According to AEC-Q100-003.

[6] According to AEC-Q100-011 Rev-C1. The classification level is C4B.

[7] In accordance with IEC 60747-1. An alternative definition of virtual junction temperature is: T_vj= T_amb+ P  R_th(vj-a), where R_th(vj-a)is a

fixed value to be used for the calculation of T_vj. The rating for T_vjlimits the allowable combinations of power dissipation (P) and ambient

temperature (T_amb).

9. Thermal characteristics

Table 6.

Thermal characteristics

Values determined for free convection conditions on a JESD51-7 board.

Symbol Parameter

R_th(vj-a)thermal resistance from virtual junction to

ambient

Conditions

SO14

Value

65

Unit

K/W

HVSON14

42

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Product data sheet

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TJA1048

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Dual high-speed CAN transceiver with Standby mode

10. Static characteristics

Table 7.

Static characteristics

T_vj= 40 C to +150 C; V_CC= 4.5 V to 5.5 V; V_IO= 2.8 V to 5.5 V; R_L= 60  unless specified otherwise; all voltages are

defined with respect to ground; positive currents flow into the device^[1].

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Supply; pin V_CC

V_CC

I_CC

supply voltage

4.5

-

5.5

5

V

[3]

supply current

Standby mode; V_TXD^[2]= V_IO

Normal mode

0.5

A

both channels recessive

one channel dominant

both channels dominant

-

20

mA

-

80

90

140

Normal mode; V_TXD= 0 V;

3 V V_CANH= V_CANL)  +18 V

one channel recessive; short-circuit on

other channel

-

90

120

180

mA

one channel dominant; short-circuit on

other channel

150

short-circuit on both channels

-

160

-

220

4.5

mA

V

V_uvd(VCC)

undervoltage detection

voltage on pin V_CC

3.5

I/O level adapter supply; pin V_IO

V_IO

I_IO

supply voltage on pin V_IO

2.8

-

5.5

26

V

[3]

supply current on pin V_IOStandby mode; V_TXD= V_IO

Normal mode

16.5

A

both channels recessive

-

35

A

V

one channel dominant

-

300

550

2.7

both channels dominant

-

V_uvd(VIO)

undervoltage detection

voltage on pin V_IO

1.3

2.0

Standby mode control input; pins STBN1 and STBN2

V_IH

V_IL

I_IH

HIGH-level input voltage

0.7V_IO

0.3

1

-

V_IO+ 0.3 V

LOW-level input voltage

HIGH-level input current V_STBN^[4]= V_IO

0.3V_IO

10

V

A

I_IL

LOW-level input current

V_STBN= 0 V

1

+1

CAN transmit data input; pins TXD1 and TXD2

V_IH

V_IL

I_IH

I_IL

HIGH-level input voltage

0.7V_IO

0.3

5

-

V_IO+ 0.3 V

LOW-level input voltage

HIGH-level input current V_TXD^[2]= V_IO

-

0.3V_IO

+5

V

-

A

pF

LOW-level input current

input capacitance

V_TXD= 0 V

260

-

150

30

10

[5]

C_i

5

CAN receive data output; pins RXD1 and RXD2

I_OH

HIGH-level output current V_RXD^[6]= V_IO 0.4 V; V_IO= V_CC

I_OLLOW-level output current V_RXD= 0.4 V; bus dominant

9

3

1

mA

2

5

12

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Product data sheet

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TJA1048

NXP Semiconductors

Dual high-speed CAN transceiver with Standby mode

Table 7.

Static characteristics …continued

T_vj= 40 C to +150 C; V_CC= 4.5 V to 5.5 V; V_IO= 2.8 V to 5.5 V; R_L= 60  unless specified otherwise; all voltages are

defined with respect to ground; positive currents flow into the device^[1].

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Bus lines; pins CANH1, CANL1, CANH2 and CANL2

V_O(dom)

dominant output voltage V_TXD= 0 V; t < t_to(dom)TXD

pin CANH1/CANH2; R_L= 50  to 65 

2.75

0.5

3.5

1.5

-

4.5

V

pin CANL1/CANL2; R_L= 50  to 65 

2.25

+300

V

[8]

V_dom(TX)symtransmitter dominant

voltage symmetry

V_dom(TX)sym= V_CC V_CANH^[7] V_CANL

300

mV

[8]

[5]

[9]

V_TXsym

transmitter voltage

symmetry

V_TXsym= V_CANH^[7]+ V_CANL

C_SPLIT= 4.7 nF;

;

0.9V_CC

-

1.1V_CC

V

f_TXD= 250 kHz, 1 MHz and 2.5 MHz;

V_CC= 4.75 V to 5.25 V

V_O(dif)

differential output voltage dominant: Normal mode

V_TXD= 0 V; t < t_to(dom)TXD

V_CC= 4.75 V to 5.25 V

R_L= 45  to 65 

;

1.5

-

3

V

V_TXD= 0 V; t < t_to(dom)TXD

3.3

5

V_CC= 4.75 V to 5.25 V

R_L= 45  to 70 

V_TXD= 0 V; t < t_to(dom)TXD

V_CC= 4.75 V to 5.25 V

R_L= 2240 

recessive

Normal mode: V_TXD= V_IO; no load

Standby mode

50

-

+50

mV

V

0.2

+0.2

V_O(rec)

recessive output voltage recessive; no load

Normal mode; V_TXD= V_IO

Standby mode

2

0.5V_CC

3

V

0.1

0.5

-

+0.1

0.9

V_th(RX)dif

differential receiver

threshold voltage

Normal mode:

0.7

30 V  V_CANL +30 V;

30 V  V_CANH +30 V

Standby mode;

12 V  V_CANL +12 V;

12 V  V_CANH +12 V

0.4

4

0.7

1.15

0.5

0.4

9.0

V

V_rec(RX)

receiver recessive

voltage

Normal mode;

30 V  V_CANL +30 V;

30 V  V_CANH +30 V

-

Standby mode;

12 V  V_CANL +12 V;

12 V  V_CANH +12 V

4

V_dom(RX)

receiver dominant voltage Normal mode;

30 V  V_CANL +30 V;

0.9

1.15

30 V  V_CANH +30 V

Standby mode;

12 V  V_CANL +12 V;

12 V  V_CANH +12 V

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Product data sheet

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TJA1048

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Dual high-speed CAN transceiver with Standby mode

Table 7.

Static characteristics …continued

T_vj= 40 C to +150 C; V_CC= 4.5 V to 5.5 V; V_IO= 2.8 V to 5.5 V; R_L= 60  unless specified otherwise; all voltages are

defined with respect to ground; positive currents flow into the device^[1].

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

V_hys(RX)dif

differential receiver

hysteresis voltage

Normal mode:

30 V  V_CANL +30 V;

30 V  V_CANH +30 V

50

120

200

mV

I_O(sc)dom

dominant short-circuit

output current

V_TXD= 0 V; t < t_to(dom)TXD; V_CC= 5 V

pin CANH1/CANH2; V_CANH= 15 V to

100

40

5

9

70

40

100

+5

28

mA

A

k

%

+40 V

pin CANL1/CANL2; V_CANL= 15 V to

+40 V

70

-

I_O(sc)rec

I_L

recessive short-circuit

output current

Normal mode; V_TXD= V_IO;

V_CANH= V_CANL= 40 V to +40 V

leakage current

V_CC= V_IO= 0 V or V_CC= V_IO= shorted to

ground via 47 k; V_CANH= V_CANL= 5 V

-

R_i

input resistance

2 V  V_CANL +7 V;

2 V  V_CANH +7 V

15

-

R_i

input resistance deviation 0 V  V_CANL +5 V;

0 V  V_CANH +5 V

1

19

-

+1

52

R_i(dif)

C_i(cm)

C_i(dif)

differential input

resistance

2 V  V_CANL +7 V;

2 V  V_CANH +7 V

30

-

k

pF

[5]

common-mode input

capacitance

20

differential input

capacitance

-

10

Temperature detection

T_j(sd)shutdown junction

temperature

[5]

-

190

-

C

[1] All parameters are guaranteed over the virtual junction temperature range by design. Factory testing uses correlated test conditions to

cover the specified temperature and power supply voltage range.

[2] TXD refers to the input signal on pin TXD1 or pin TXD2.

[3] Total supply current (I_CC+ I_IO) in Standby mode is typically 17 A, with a maximum value of 26 A.

[4] STBN refers to the input signal on pin STBN1 or pin STBN2.

[5] Not tested in production; guaranteed by design.

[6] RXD refers to the output signal on pin RXD1 or pin RXD2.

[7] CANH refers to the input/output signal on pin CANH1 or pin CANH2.

[8] CANL refers to the input/output signal on pin CANL1 or pin CANL2.

[9] The test circuit used to measure the bus output voltage symmetry (which includes CSPLIT) is shown in Figure 9.

TJA1048

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 19 March 2018

12 of 27

TJA1048

NXP Semiconductors

Dual high-speed CAN transceiver with Standby mode

11. Dynamic characteristics

Table 8.

T_vj= 40 C to +150 C; V_CC= 4.5 V to 5.5 V; V_IO= 2.8 V to 5.5 V; R_L= 60  unless specified otherwise; all voltages are

defined with respect to ground; positive currents flow into the device^[1]

Dynamic characteristics

.

Symbol Parameter Conditions

Min Typ

Max

Unit

Transceiver timing; pins CANH1, CANH2, CANL1, CANL2, TXD1, TXD2, RXD1 and RXD2; see Figure 8 and Figure 5

t_{d(TXD-busdom)}delay time from TXD to bus dominant

t_{d(TXD-busrec)}delay time from TXD to bus recessive

t_{d(busdom-RXD)}delay time from bus dominant to RXD

t_{d(busrec-RXD)}delay time from bus recessive to RXD

Normal mode

-

65

90

60

65

-

ns

ms

s

ms

s

-

t_d(TXDL-RXDL)delay time from TXD LOW to RXD LOW Normal mode

t_d(TXDH-RXDH)delay time from TXD HIGH to RXD HIGH Normal mode

60

435

155

400

120

65

45

0.5

7

250

530

210

550

220

+40

+15

5

-

[2]

t_bit(bus)

t_bit(RXD)

t_rec

transmitted recessive bit width

t_bit(TXD)= 500 ns

t_bit(TXD)= 200 ns

t_bit(TXD)= 500 ns

t_bit(TXD)= 200 ns

t_bit(TXD)= 500 ns

t_bit(TXD)= 200 ns

V_TXD= 0 V; Normal mode

-

bit time on pin RXD

-

receiver timing symmetry

-

[3]

t_to(dom)TXD

t_d(stb-norm)

TXD dominant time-out time

2

standby to normal mode delay time

25

-

47

5

t_wake(busdom)bus dominant wake-up time

Standby mode

0.5

t_wake(busrec)

t_to(wake)bus

t_{fltr(wake)bus}

bus recessive wake-up time

bus wake-up time-out time

bus wake-up filter time

-

5

2

5

Standby mode

1.5

5

[1] All parameters are guaranteed over the virtual junction temperature range by design. Factory testing uses correlated test conditions to

cover the specified temperature and power supply voltage range.

[2] See Figure 6.

[3] Minimum value of 0.8 ms required according to SAE J2284; 0.3 ms is allowed according to ISO11898-2:2016 for legacy devices.

TJA1048

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 19 March 2018

13 of 27

TJA1048

NXP Semiconductors

Dual high-speed CAN transceiver with Standby mode

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Fig 6. CAN FD timing definitions according to ISO 11898-2:2016

TJA1048

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 19 March 2018

14 of 27

TJA1048

NXP Semiconductors

Dual high-speed CAN transceiver with Standby mode

12. Application information

12.1 Application diagram

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Fig 7. Typical application with 3 V microcontroller

12.2 Application hints

Further information on the application of the TJA1048 can be found in NXP application

hints AH1014 Application Hints - Standalone high speed CAN transceiver

TJA1042/TJA1043/TJA1048/TJA1051.

TJA1048

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 19 March 2018

15 of 27

TJA1048

NXP Semiconductors

Dual high-speed CAN transceiver with Standby mode

13. Test information

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13.1 Quality information

This product has been qualified in accordance with the Automotive Electronics Council

(AEC) standard Q100 Rev-G - Failure mechanism based stress test qualification for

integrated circuits, and is suitable for use in automotive applications.

TJA1048

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 19 March 2018

16 of 27

TJA1048

NXP Semiconductors

Dual high-speed CAN transceiver with Standby mode

14. Package outline

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Fig 10. Package outline SOT108 (SO14)

TJA1048

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 19 March 2018

17 of 27

TJA1048

NXP Semiconductors

Dual high-speed CAN transceiver with Standby mode

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Fig 11. Package outline SOT1086 (HVSON14)

TJA1048

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 19 March 2018

18 of 27

TJA1048

NXP Semiconductors

Dual high-speed CAN transceiver with Standby mode

15. Handling information

All input and output pins are protected against ElectroStatic Discharge (ESD) under

normal handling. When handling ensure that the appropriate precautions are taken as

described in JESD625-A or equivalent standards.

16. Soldering of SMD packages

This text provides a very brief insight into a complex technology. A more in-depth account

of soldering ICs can be found in Application Note AN10365 “Surface mount reflow

soldering description”.

16.1 Introduction to soldering

Soldering is one of the most common methods through which packages are attached to

Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both

the mechanical and the electrical connection. There is no single soldering method that is

ideal for all IC packages. Wave soldering is often preferred when through-hole and

Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not

suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high

densities that come with increased miniaturization.

16.2 Wave and reflow soldering

Wave soldering is a joining technology in which the joints are made by solder coming from

a standing wave of liquid solder. The wave soldering process is suitable for the following:

• Through-hole components

• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board

Not all SMDs can be wave soldered. Packages with solder balls, and some leadless

packages which have solder lands underneath the body, cannot be wave soldered. Also,

leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,

due to an increased probability of bridging.

The reflow soldering process involves applying solder paste to a board, followed by

component placement and exposure to a temperature profile. Leaded packages,

packages with solder balls, and leadless packages are all reflow solderable.

Key characteristics in both wave and reflow soldering are:

• Board specifications, including the board finish, solder masks and vias

• Package footprints, including solder thieves and orientation

• The moisture sensitivity level of the packages

• Package placement

• Inspection and repair

• Lead-free soldering versus SnPb soldering

16.3 Wave soldering

Key characteristics in wave soldering are:

TJA1048

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Product data sheet

Rev. 6 — 19 March 2018

19 of 27

TJA1048

NXP Semiconductors

Dual high-speed CAN transceiver with Standby mode

• Process issues, such as application of adhesive and flux, clinching of leads, board

transport, the solder wave parameters, and the time during which components are

exposed to the wave

• Solder bath specifications, including temperature and impurities

16.4 Reflow soldering

Key characteristics in reflow soldering are:

• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to

higher minimum peak temperatures (see Figure 12) than a SnPb process, thus

reducing the process window

• Solder paste printing issues including smearing, release, and adjusting the process

window for a mix of large and small components on one board

• Reflow temperature profile; this profile includes preheat, reflow (in which the board is

heated to the peak temperature) and cooling down. It is imperative that the peak

temperature is high enough for the solder to make reliable solder joints (a solder paste

characteristic). In addition, the peak temperature must be low enough that the

packages and/or boards are not damaged. The peak temperature of the package

depends on package thickness and volume and is classified in accordance with

Table 9 and 10

Table 9.

SnPb eutectic process (from J-STD-020D)

Package thickness (mm) Package reflow temperature (C)

Volume (mm³)

< 350

 350

220

< 2.5

235

220

 2.5

220

Table 10. Lead-free process (from J-STD-020D)

Package thickness (mm) Package reflow temperature (C)

Volume (mm³)

< 350

260

350 to 2000

> 2000

260

< 1.6

260

250

245

1.6 to 2.5

> 2.5

260

245

250

245

Moisture sensitivity precautions, as indicated on the packing, must be respected at all

times.

Studies have shown that small packages reach higher temperatures during reflow

soldering, see Figure 12.

TJA1048

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 19 March 2018

20 of 27

TJA1048

NXP Semiconductors

Dual high-speed CAN transceiver with Standby mode

maximum peak temperature

= MSL limit, damage level

temperature

minimum peak temperature

= minimum soldering temperature

peak

temperature

time

001aac844

MSL: Moisture Sensitivity Level

Fig 12. Temperature profiles for large and small components

For further information on temperature profiles, refer to Application Note AN10365

“Surface mount reflow soldering description”.

17. Soldering of HVSON packages

Section 17 contains a brief introduction to the techniques most commonly used to solder

Surface Mounted Devices (SMD). A more detailed discussion on soldering HVSON

leadless package ICs can found in the following application notes:

• AN10365 ‘Surface mount reflow soldering description”

• AN10366 “HVQFN application information”Section 16

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Product data sheet

Rev. 6 — 19 March 2018

21 of 27

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Dual high-speed CAN transceiver with Standby mode

18. Appendix: ISO 11898-2:2016 parameter cross-reference list

Table 11. ISO 11898-2:2016 to NXP data sheet parameter conversion

ISO 11898-2:2016

NXP data sheet

Notation Symbol Parameter

Parameter

HS-PMA dominant output characteristics

Single ended voltage on CAN_H

Single ended voltage on CAN_L

Differential voltage on normal bus load

Differential voltage on effective resistance during arbitration

Optional: Differential voltage on extended bus load range

HS-PMA driver symmetry

V_{CAN_H}

V_{CAN_L}

V_Diff

V_O(dom)

dominant output voltage

differential output voltage

V_O(dif)

Driver symmetry

V_SYM

V_TXsym

transmitter voltage symmetry

Maximum HS-PMA driver output current

Absolute current on CAN_H

I_{CAN_H}

I_{CAN_L}

I_O(sc)dom

dominant short-circuit output

current

Absolute current on CAN_L

HS-PMA recessive output characteristics, bus biasing active/inactive

Single ended output voltage on CAN_H

Single ended output voltage on CAN_L

Differential output voltage

V_{CAN_H}

V_{CAN_L}

V_Diff

V_O(rec)

recessive output voltage

differential output voltage

TXD dominant time-out time

V_O(dif)

Optional HS-PMA transmit dominant timeout

Transmit dominant timeout, long

t_dom

t_to(dom)TXD

Transmit dominant timeout, short

HS-PMA static receiver input characteristics, bus biasing active/inactive

Recessive state differential input voltage range

Dominant state differential input voltage range

V_Diff

V_th(RX)dif

differential receiver threshold

voltage

V_rec(RX)

receiver recessive voltage

receiver dominant voltage

V_dom(RX)

HS-PMA receiver input resistance (matching)

Differential internal resistance

R_Diff

R_i(dif)

R_i

differential input resistance

input resistance

Single ended internal resistance

R_{CAN_H}

R_{CAN_L}

Matching of internal resistance

HS-PMA implementation loop delay requirement

Loop delay

MR

R_i

input resistance deviation

t_Loop

t_d(TXDH-RXDH)delay time from TXD HIGH to

RXD HIGH

t_d(TXDL-RXDL)

delay time from TXD LOW to RXD

LOW

Optional HS-PMA implementation data signal timing requirements for use with bit rates above 1 Mbit/s up to

2 Mbit/s and above 2 Mbit/s up to 5 Mbit/s

Transmitted recessive bit width @ 2 Mbit/s / @ 5 Mbit/s,

intended

t_Bit(Bus)

t_bit(bus)

transmitted recessive bit width

Received recessive bit width @ 2 Mbit/s / @ 5 Mbit/s

Receiver timing symmetry @ 2 Mbit/s / @ 5 Mbit/s

t_Bit(RXD)

t_bit(RXD)

bit time on pin RXD

t_Rec

t_rec

receiver timing symmetry

TJA1048

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Product data sheet

Rev. 6 — 19 March 2018

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TJA1048

NXP Semiconductors

Dual high-speed CAN transceiver with Standby mode

Table 11. ISO 11898-2:2016 to NXP data sheet parameter conversion

ISO 11898-2:2016

NXP data sheet

Notation Symbol Parameter

Parameter

HS-PMA maximum ratings of V_{CAN_H}, V_{CAN_L}and V_Diff

Maximum rating V_Diff

V_Diff

V_(CANH-CANL)voltage between pin CANH and

pin CANL

General maximum rating V_{CAN_H}and V_{CAN_L}

V_{CAN_H}

V_{CAN_L}

V_x

voltage on pin x

Optional: Extended maximum rating VCAN_H and VCAN_L

HS-PMA maximum leakage currents on CAN_H and CAN_L, unpowered

Leakage current on CAN_H, CAN_L

I_{CAN_H}

I_{CAN_L}

I_L

leakage current

HS-PMA bus biasing control timings

CAN activity filter time, long

CAN activity filter time, short

Wake-up timeout, short

[1]

t_Filter

t_wake(busdom)

bus dominant wake-up time

bus recessive wake-up time

bus wake-up time-out time

[1]

t_wake(busrec)

t_to(wake)bus

t_Wake

Wake-up timeout, long

Timeout for bus inactivity

Bus Bias reaction time

t_Silence

t_Bias

t_to(silence)

bus silence time-out time

t_{d(busact-bias)}

delay time from bus active to bias

[1] t_{fltr(wake)bus}- bus wake-up filter time, in devices with basic wake-up functionality

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Product data sheet

Rev. 6 — 19 March 2018

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Dual high-speed CAN transceiver with Standby mode

19. Revision history

Table 12. Revision history

Document ID

TJA1048 v.6

Modifications:

Release date

Data sheet status

Change notice

Supersedes

20180319

Product data sheet

-

TJA1048 v.5

• Updated to comply with ISO 11898-2:2016 and SAE J22884-1 through SAE J2284-5 specifications:

–

Section 1: text amended (2nd last paragraph)

Section 2.1: text amended (2nd entry)

Table 7: values/conditions changed for parameters I_CC, V_TXsym, V_O(dif), V_O(dom), V_O(rec), V_rec(RX)

,

V_dom(RX), I_O(sc)dom, I_OHfor pins RXDx; measurement conditions added to parameters R_i, R_iand

R_i(dif)

–

Table 7: additional measurements taken at f_TXD= 1 MHz and 2.5 MHz for parameter V_TXsym

;

see Figure 9

–

Table 8: Table note 3 added

Figure 6: title changed

• Amended Figure 5, Figure 7 and Figure 9

TJA1048 v.5

TJA1048 v.4

TJA1048 v.3

TJA1048 v.2

TJA1048 v.1

20160523

20150115

20130424

20110325

20101103

Product data sheet

-

TJA1048 v.4

TJA1048 v.3

TJA1048 v.2

TJA1048 v.1

-

TJA1048

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Product data sheet

Rev. 6 — 19 March 2018

24 of 27

TJA1048

NXP Semiconductors

Dual high-speed CAN transceiver with Standby mode

20. Legal information

20.1 Data sheet status

Document status^[1][2]

Product status^[3]

Development

Definition

Objective [short] data sheet

This document contains data from the objective specification for product development.

This document contains data from the preliminary specification.

This document contains the product specification.

Preliminary [short] data sheet Qualification

Product [short] data sheet Production

[1]

[2]

[3]

Please consult the most recently issued document before initiating or completing a design.

The term ‘short data sheet’ is explained in section “Definitions”.

The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

Suitability for use in automotive applications — This NXP

20.2 Definitions

Semiconductors product has been qualified for use in automotive

applications. Unless otherwise agreed in writing, the product is not designed,

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors and its suppliers accept no liability for

inclusion and/or use of NXP Semiconductors products in such equipment or

applications and therefore such inclusion and/or use is at the customer's own

risk.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall prevail.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Customers are responsible for the design and operation of their applications

and products using NXP Semiconductors products, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suitable and fit for the customer’s applications and

products planned, as well as for the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with their

applications and products.

Product specification — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to offer functions and qualities beyond those described in the

Product data sheet.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by customer’s

third party customer(s). Customer is responsible for doing all necessary

testing for the customer’s applications and products using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

20.3 Disclaimers

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warranties, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information. NXP Semiconductors takes no

responsibility for the content in this document if provided by an information

source outside of NXP Semiconductors.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

In no event shall NXP Semiconductors be liable for any indirect, incidental,

punitive, special or consequential damages (including - without limitation - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconductors.

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

TJA1048

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Product data sheet

Rev. 6 — 19 March 2018

25 of 27

TJA1048

NXP Semiconductors

Dual high-speed CAN transceiver with Standby mode

No offer to sell or license — Nothing in this document may be interpreted or

construed as an offer to sell products that is open for acceptance or the grant,

conveyance or implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

Translations — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

20.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

21. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

TJA1048

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Product data sheet

Rev. 6 — 19 March 2018

26 of 27

TJA1048

NXP Semiconductors

Dual high-speed CAN transceiver with Standby mode

22. Contents

1

General description. . . . . . . . . . . . . . . . . . . . . . 1

20.1

20.2

20.3

20.4

Data sheet status . . . . . . . . . . . . . . . . . . . . . . 25

Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 26

2

Features and benefits . . . . . . . . . . . . . . . . . . . . 1

General. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Low-power management . . . . . . . . . . . . . . . . . 2

Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

2.1

2.2

2.3

21

22

Contact information . . . . . . . . . . . . . . . . . . . . 26

Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

3

4

5

Quick reference data . . . . . . . . . . . . . . . . . . . . . 2

Ordering information. . . . . . . . . . . . . . . . . . . . . 3

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4

6

6.1

6.2

Pinning information. . . . . . . . . . . . . . . . . . . . . . 5

Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5

7

7.1

Functional description . . . . . . . . . . . . . . . . . . . 6

Operating modes . . . . . . . . . . . . . . . . . . . . . . . 6

Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Standby mode. . . . . . . . . . . . . . . . . . . . . . . . . . 6

Remote wake-up (via the CAN bus) . . . . . . . . . 6

Fail-safe features . . . . . . . . . . . . . . . . . . . . . . . 7

TXD dominant time-out function. . . . . . . . . . . . 7

Internal biasing of TXD1, TXD2, STBN1 and

7.1.1

7.1.2

7.1.3

7.2

7.2.1

7.2.2

STBN2 input pins . . . . . . . . . . . . . . . . . . . . . . . 8

Undervoltage detection on pins V_CCand V_IO. . 8

Overtemperature protection . . . . . . . . . . . . . . . 8

V_IOsupply pin . . . . . . . . . . . . . . . . . . . . . . . . . . 8

7.2.3

7.2.4

7.3

8

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9

Thermal characteristics . . . . . . . . . . . . . . . . . . 9

Static characteristics. . . . . . . . . . . . . . . . . . . . 10

Dynamic characteristics . . . . . . . . . . . . . . . . . 13

9

10

11

12

12.1

12.2

Application information. . . . . . . . . . . . . . . . . . 15

Application diagram . . . . . . . . . . . . . . . . . . . . 15

Application hints . . . . . . . . . . . . . . . . . . . . . . . 15

13

13.1

14

Test information. . . . . . . . . . . . . . . . . . . . . . . . 16

Quality information . . . . . . . . . . . . . . . . . . . . . 16

Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17

Handling information. . . . . . . . . . . . . . . . . . . . 19

15

16

Soldering of SMD packages . . . . . . . . . . . . . . 19

Introduction to soldering . . . . . . . . . . . . . . . . . 19

Wave and reflow soldering . . . . . . . . . . . . . . . 19

Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 19

Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 20

16.1

16.2

16.3

16.4

17

18

Soldering of HVSON packages. . . . . . . . . . . . 21

Appendix: ISO 11898-2:2016 parameter

cross-reference list . . . . . . . . . . . . . . . . . . . . . 22

19

20

Revision history. . . . . . . . . . . . . . . . . . . . . . . . 24

Legal information. . . . . . . . . . . . . . . . . . . . . . . 25

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 19 March 2018

Document identifier: TJA1048


型号：	TJA1048T
厂家：	NXP
描述：	Dual high-speed CAN transceiver with Standby mode
文件：	总27页 (文件大小：271K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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