TJA1054AT/M,518 [NXP]
TJA1054A - Fault-tolerant CAN transceiver SOIC 14-Pin;
| 型号： | TJA1054AT/M,518 |
| 厂家： | 
NXP |
| 描述： | TJA1054A - Fault-tolerant CAN transceiver SOIC 14-Pin 电信 光电二极管 电信集成电路 |
| 文件： | 总27页 (文件大小：216K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TJA1054A
Fault-tolerant CAN transceiver
Rev. 5 — 3 August 2010
Product data sheet
1. General description
The TJA1054A is the interface between the protocol controller and the physical bus wires
in a Controller Area Network (CAN). It is primarily intended for low-speed applications up
to 125 kBd in passenger cars. The device provides differential receive and transmit
capability but will switch to single-wire transmitter and/or receiver in error conditions.
The TJA1054A is the ElectroStatic Discharge (ESD) improved version of the TJA1054.
The TJA1054AT is, as the TJA1054T, pin and downwards compatible with the
PCA82C252T and the TJA1053T. This means that these two devices can be replaced by
the TJA1054AT or the TJA1054T with retention of all functions.
The most important improvements of the TJA1054 and the TJA1054A with respect to the
PCA82C252 and the TJA1053 are:
• Very low ElectroMagnetic Emission (EME) due to a very good matching of the CANL
and CANH output signals
• Good ElectroMagnetic Emission (EMI), especially in low power modes
• Full wake-up capability during bus failures
• Extended bus failure management including short-circuit of the CANH bus line to VCC
• Support for easy system fault diagnosis
• Two-edge sensitive wake-up input signal via pin WAKE
2. Features and benefits
2.1 Optimized for in-car low-speed communication
Baud rate up to 125 kBd
Up to 32 nodes can be connected
Supports unshielded bus wires
Very low ElectroMagnetic Emission (EME) due to built-in slope control function and a
very good matching of the CANL and CANH bus outputs
Good ElectroMagnetic Immunity (EMI) in normal operating mode and in low power
modes
Fully integrated receiver filters
Transmit Data (TxD) dominant time-out function
2.2 Bus failure management
Supports single-wire transmission modes with ground offset voltages up to 1.5 V
TJA1054A
NXP Semiconductors
Fault-tolerant CAN transceiver
Automatic switching to single-wire mode in the event of bus failures, even when the
CANH bus wire is short-circuited to VCC
Automatic reset to differential mode if bus failure is removed
Full wake-up capability during failure modes
2.3 Protections
Bus pins short-circuit safe to battery and to ground
Thermally protected
Bus lines protected against transients in an automotive environment
An unpowered node does not disturb the bus lines
2.4 Support for low power modes
Low-current sleep mode and standby mode with wake-up via the bus lines
Power-on reset flag on the output
3. Quick reference data
Table 1.
Quick reference data
VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB = VCC; Tvj = −40 °C to +150 °C; all voltages are
defined with respect to ground; positive currents flow into the device; unless otherwise
specified.[1][2][3]
Symbol Parameter
Conditions
Min
4.75
−0.3
5.0
-
Typ Max
Unit
V
VCC
supply voltage
-
5.25
+40
27
VBAT
battery supply voltage
on pin BAT
no time limit
operating mode
load dump
-
V
-
V
-
40
V
IBAT
battery supply current
on pin BAT
sleep mode; VCC = 0 V;
VBAT = 12 V
-
30
50
μA
VCANH
voltage on pin CANH
VCC = 0 V to 5.0 V;
VBAT ≥ 0 V; no time limit;
with respect to
−27
−27
-
-
+40
+40
V
V
any other pin
VCANL
voltage on pin CANL
VCC = 0 V to 5.0 V;
VBAT ≥ 0 V; no time limit;
with respect to
any other pin
ΔVCANH voltage drop on pin CANH ICANH = −40 mA
ΔVCANL voltage drop on pin CANL ICANL = 40 mA
-
-
-
-
1.4
1.4
-
V
-
V
tr
bus line output rise time
bus line output fall time
virtual junction temperature
between 10 % and 90 %;
C1 = 10 nF; see Figure 5
0.6
μs
tf
between 10 % and 90 %;
C1 = 1 nF; see Figure 5
-
0.3
-
-
μs
°C
[4]
Tvj
−40
+150
[1] All parameters are guaranteed over the virtual junction temperature range by design, but only 100 % tested
at Tamb = 125 °C for dies on wafer level, and above this for cased products 100 % tested at Tamb = 25 °C,
unless otherwise specified.
[2] For bare die, all parameters are only guaranteed if the back side of the die is connected to ground.
TJA1054A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 5 — 3 August 2010
2 of 27
TJA1054A
NXP Semiconductors
Fault-tolerant CAN transceiver
[3] A local or remote wake-up event will be signalled at the transceiver pins RXD and ERR if
BAT = 5.3 V to 27 V (see Table 5).
V
[4] Junction temperature in accordance with “IEC 60747-1”. An alternative definition is: Tvj = Tamb + P × Rth(vj-a)
where Rth(vj-a) is a fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable
combinations of power dissipation (P) and ambient temperature (Tamb).
4. Ordering information
Table 2.
Ordering information
Type number
Package
Name
SO14
SO14
-
Description
Version
SOT108-1
SOT108-1
-
TJA1054AT
plastic small outline package; 14 leads; body width 3.9 mm
plastic small outline package; 14 leads; body width 3.9 mm
bare die; 1990 μm × 2730 μm × 375 μm
TJA1054AT/S900
TJA1054AU
5. Block diagram
V
BAT
14
CC
10
1
INH
TEMPERATURE
PROTECTION
7
WAKE-UP
STANDBY
CONTROL
WAKE
5
9
11
12
8
STB
RTL
6
EN
CANH
CANL
RTH
V
CC
2
DRIVER
TXD
ERR
TIMER
TJA1054A
V
V
CC
FAILURE DETECTOR
PLUS WAKE-UP
PLUS TIME-OUT
4
3
FILTER
FILTER
CC
RECEIVER
RXD
13
GND
mgu383
Fig 1. Block diagram
TJA1054A
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 5 — 3 August 2010
3 of 27
TJA1054A
NXP Semiconductors
Fault-tolerant CAN transceiver
6. Pinning information
6.1 Pinning
1
2
3
4
5
6
7
14
13
12
11
10
9
INH
TXD
BAT
GND
RXD
ERR
STB
CANL
CANH
TJA1054AT
V
CC
EN
RTL
RTH
8
WAKE
001aaf609
Fig 2. Pin configuration
6.2 Pin description
Table 3.
Symbol
INH
Pin description
Pin
Description
1
inhibit output for switching an external voltage regulator if a
wake-up signal occurs
TXD
RXD
ERR
2
3
4
transmit data input for activating the driver to the bus lines
receive data output for reading out the data from the bus lines
error, wake-up and power-on indication output; active LOW in
normal operating mode when a bus failure is detected; active LOW
in standby and sleep mode when a wake-up is detected; active
LOW in power-on standby when a VBAT power-on event is
detected
STB
EN
5
6
standby digital control signal input; together with the input signal
on pin EN this input determines the state of the transceiver;
see Table 5 and Figure 3
enable digital control signal input; together with the input signal on
pin STB this input determines the state of the transceiver;
see Table 5 and Figure 3
WAKE
RTH
7
8
9
local wake-up signal input (active LOW); both falling and rising
edges are detected
termination resistor connection; in case of a CANH bus wire error
the line is terminated with a predefined impedance
RTL
termination resistor connection; in case of a CANL bus wire error
the line is terminated with a predefined impedance
VCC
10
11
12
13
14
supply voltage
CANH
CANL
GND
BAT
HIGH-level CAN bus line
LOW-level CAN bus line
ground
battery supply voltage
TJA1054A
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 5 — 3 August 2010
4 of 27
TJA1054A
NXP Semiconductors
Fault-tolerant CAN transceiver
7. Functional description
The TJA1054A is the interface between the CAN protocol controller and the physical
wires of the CAN bus (see Figure 7). It is primarily intended for low-speed applications, up
to 125 kBd, in passenger cars. The device provides differential transmit capability to the
CAN bus and differential receive capability to the CAN controller.
To reduce EME, the rise and fall slopes are limited. This allows the use of an unshielded
twisted pair or a parallel pair of wires for the bus lines. Moreover, the device supports
transmission capability on either bus line if one of the wires is corrupted. The failure
detection logic automatically selects a suitable transmission mode.
In normal operating mode (no wiring failures) the differential receiver is output on pin RXD
(see Figure 1). The differential receiver inputs are connected to pins CANH and CANL
through integrated filters. The filtered input signals are also used for the single-wire
receivers. The receivers connected to pins CANH and CANL have threshold voltages that
ensure a maximum noise margin in single-wire mode.
A timer function (TxD dominant time-out function) has been integrated to prevent the bus
lines from being driven into a permanent dominant state (thus blocking the entire network
communication) due to a situation in which pin TXD is permanently forced to a LOW level,
caused by a hardware and/or software application failure.
If the duration of the LOW level on pin TXD exceeds a certain time, the transmitter will be
disabled. The timer will be reset by a HIGH level on pin TXD.
7.1 Failure detector
The failure detector is fully active in the normal operating mode. After the detection of a
single bus failure the detector switches to the appropriate mode (see Table 4). The
differential receiver threshold voltage is set at −3.2 V typical (VCC = 5 V). This ensures
correct reception with a noise margin as high as possible in the normal operating mode
and in the event of failures 1, 2, 5 and 6a. These failures, or recovery from them, do not
destroy ongoing transmissions. The output drivers remain active, the termination does not
change and the receiver remains in differential mode (see Table 4).
Failures 3, 3a and 6 are detected by comparators connected to the CANH and CANL bus
lines. Failures 3 and 3a are detected in a two-step approach. If the CANH bus line
exceeds a certain voltage level, the differential comparator signals a continuous dominant
condition. Because of inter operability reasons with the predecessor products
PCA82C252 and TJA1053, after a first time-out the transceiver switches to single-wire
operation through CANH. If the CANH bus line is still exceeding the CANH detection
voltage for a second time-out, the TJA1054A switches to CANL operation; the CANH
driver is switched off and the RTH bias changes to the pull-down current source. The
time-outs (delays) are needed to avoid false triggering by external RF fields.
TJA1054A
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 5 — 3 August 2010
5 of 27
TJA1054A
NXP Semiconductors
Fault-tolerant CAN transceiver
Table 4.
Bus failures
Failure Description
Termination Termination CANH
CANH (RTH) CANL (RTL) driver
CANL
driver
Receiver
mode
1
CANH wire
interrupted
on
on
on
on
differential
2
3
CANL wire interrupted on
CANH short-circuited weak[1]
to battery
on
on
on
off
on
on
differential
CANL
3a
4
CANH short-circuited weak[1]
to VCC
on
off
on
on
on
on
on
on
off
on
off
on
off
CANL
CANL short-circuited on
to ground
weak[2]
on
CANH
5
CANH short-circuited on
to ground
differential
CANH
6
CANL short-circuited on
to battery
weak[2]
on
6a
7
CANL short-circuited on
to VCC
differential
CANH
CANL and CANH
mutually
on
weak[2]
short-circuited
[1] A weak termination implies a pull-down current source behavior of 75 μA typical.
[2] A weak termination implies a pull-up current source behavior of 75 μA typical.
Failure 6 is detected if the CANL bus line exceeds its comparator threshold for a certain
period of time. This delay is needed to avoid false triggering by external RF fields. After
detection of failure 6, the reception is switched to the single-wire mode through CANH;
the CANL driver is switched off and the RTL bias changes to the pull-up current source.
Recovery from failures 3, 3a and 6 is detected automatically after reading a consecutive
recessive level by corresponding comparators for a certain period of time.
Failures 4 and 7 initially result in a permanent dominant level on pin RXD. After a time-out
the CANL driver is switched off and the RTL bias changes to the pull-up current source.
Reception continues by switching to the single-wire mode via pins CANH or CANL. When
failures 4 or 7 are removed, the recessive bus levels are restored. If the differential
voltage remains below the recessive threshold level for a certain period of time, reception
and transmission switch back to the differential mode.
If any of the wiring failure occurs, the output signal on pin ERR will be set to LOW. On
error recovery, the output signal on pin ERR will be set to HIGH again. In case of an
interrupted open bus wire, this failure will be detected and signalled only if there is an
open wire between the transmitting and receiving node(s). Thus, during open wire
failures, pin ERR typically toggles.
During all single-wire transmissions, ElectroMagnetic Compatibility (EMC) performance
(both immunity and emission) is worse than in the differential mode. The integrated
receiver filters suppress any HF noise induced into the bus wires. The cut-off frequency of
these filters is a compromise between propagation delay and HF suppression. In
single-wire mode, LF noise cannot be distinguished from the required signal.
TJA1054A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 5 — 3 August 2010
6 of 27
TJA1054A
NXP Semiconductors
Fault-tolerant CAN transceiver
7.2 Low power modes
The transceiver provides three low power modes which can be entered and exited via
STB and EN (see Table 5 and Figure 3).
The sleep mode is the mode with the lowest power consumption. Pin INH is switched to
HIGH-impedance for deactivation of the external voltage regulator. Pin CANL is biased to
the battery voltage via pin RTL. If the supply voltage is provided, pins RXD and ERR will
signal the wake-up interrupt.
The standby mode operates in the same way as the sleep mode but with a HIGH level on
pin INH.
The power-on standby mode is the same as the standby mode, however, in this mode the
battery power-on flag is shown on pin ERR instead of the wake-up interrupt signal. The
output on pin RXD will show the wake-up interrupt. This mode is only for reading out the
power-on flag.
Table 5.
Mode
Normal operating and low power modes
Pin STB Pin EN
Pin ERR
LOW
Pin RXD
LOW
Pin RTL
switched
to
HIGH
HIGH
Goto-sleep LOW
command
HIGH
wake-up
interrupt
wake-up
interrupt
VBAT
signal
signal
Sleep
LOW
LOW
HIGH
LOW[4]
LOW
[1][2][3]
[1][2][3]
Standby
Power-on
standby
LOW
VBAT
power-on
flag[1][5]
wake-up
interrupt
signal
[1][2][3]
VBAT
Normal
operating
HIGH
HIGH
error flag no error
flag
dominant recessive VCC
received
data
received
data
[1] If the supply voltage VCC is present.
[2] Wake-up interrupts are released when entering normal operating mode.
[3] A local or remote wake-up event will be signalled at the transceiver pins RXD and ERR if
BAT = 5.3 V to 27 V.
V
[4] In case the goto-sleep command was used before. When VCC drops, pin EN will become LOW, but due to
the fail-safe functionality this does not effect the internal functions.
[5]
VBAT power-on flag will be reset when entering normal operating mode.
Wake-up requests are recognized by the transceiver through two possible channels:
• The bus lines for remote wake-up
• Pin WAKE for local wake-up
In order to wake-up the transceiver remotely through the bus lines, a filter mechanism is
integrated. This mechanism makes sure that noise and any present bus failure conditions
do not result into an erroneous wake-up. Because of this mechanism it is not sufficient to
simply pull the CANH or CANL bus lines to a dominant level for a certain time. To
guarantee a successful remote wake-up under all conditions, a message frame with a
dominant phase of at least the maximum specified t(CANH) or t(CANL) in it is required.
TJA1054A
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 5 — 3 August 2010
7 of 27
TJA1054A
NXP Semiconductors
Fault-tolerant CAN transceiver
A local wake-up through pin WAKE is detected by a rising or falling edge with a
consecutive level exceeding the maximum specified tWAKE
.
On a wake-up request the transceiver will set the output on pin INH to HIGH which can be
used to activate the external supply voltage regulator.
If VCC is provided the wake-up request can be read on the ERR or RXD outputs, so the
external microcontroller can activate the transceiver (switch to normal operating mode) via
pins STB and EN.
To prevent a false remote wake-up due to transients or RF fields, the wake-up voltage
levels have to be maintained for a certain period of time. In the low power modes the
failure detection circuit remains partly active to prevent an increased power consumption
in the event of failures 3, 3a, 4 and 7.
To prevent a false local wake-up during an open wire at pin WAKE, this pin has a weak
pull-up current source towards VBAT. However, in order to protect the transceiver against
any EMC immunity issues, it is recommended to connect a not used pin WAKE to pin
BAT. Pin INH is set to floating only if the goto-sleep command is entered successfully. To
enter a successful goto-sleep command under all conditions, this command must be kept
stable for the maximum specified th(sleep)
.
Pin INH will be set to a HIGH level again by the following events only:
• VBAT power-on (cold start)
• Rising or falling edge on pin WAKE
• A message frame with a dominant phase of at least the maximum specified t(CANH) or
t(CANL), while pin EN or pin STB is at a LOW level
• Pin STB goes to a HIGH level with VCC active
To provide fail-safe functionality, the signals on pins STB and EN will internally be set to
LOW when VCC is below a certain threshold voltage (VCC(stb)).
7.3 Power-on
After power-on (VBAT switched on) the signal on pin INH will become HIGH and an internal
power-on flag will be set. This flag can be read in the power-on standby mode through
pin ERR (STB = HIGH; EN = LOW) and will be reset by entering the normal operating
mode.
7.4 Protections
A current limiting circuit protects the transmitter output stages against short-circuit to
positive and negative battery voltage.
If the junction temperature exceeds the typical value of 165 °C, the transmitter output
stages are disabled. Because the transmitter is responsible for the major part of the power
dissipation, this will result in a reduced power dissipation and hence a lower chip
temperature. All other parts of the device will continue to operate.
The pins CANH and CANL are protected against electrical transients which may occur in
an automotive environment.
TJA1054A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 5 — 3 August 2010
8 of 27
TJA1054A
NXP Semiconductors
Fault-tolerant CAN transceiver
POWER-ON
STANDBY
10
GOTO
SLEEP
01
(4)
NORMAL
11
(5)
STANDBY
00
SLEEP
00
(1)
(2)
(3)
mbk949
Mode 10 stands for: Pin STB = HIGH and pin EN = LOW.
(1) Mode change via input pins STB and EN.
(2) Mode change via input pins STB and EN; it should be noted that in the sleep mode pin INH is
inactive and possibly there is no VCC. Mode control is only possible if VCC of the transceiver is
active.
(3) Pin INH is activated after wake-up via bus input pin WAKE.
(4) Transitions to normal mode clear the internal wake-up: interrupt and battery fail flag are
cleared.
(5) Transitions to sleep mode: pin INH is deactivated.
Fig 3. Mode control
8. Limiting values
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).[1]
Symbol
VCC
Parameter
Conditions
Min
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−27
Max
Unit
V
supply voltage
+6
VBAT
battery supply voltage
voltage on pin TXD
voltage on pin RXD
voltage on pin ERR
voltage on pin STB
voltage on pin EN
voltage on pin CANH
+40
V
VTXD
VRXD
VERR
VSTB
VEN
VCC + 0.3
VCC + 0.3
VCC + 0.3
VCC + 0.3
VCC + 0.3
+40
V
V
V
V
V
VCANH
with respect to any
other pin
V
VCANL
Vtrt(n)
voltage on pin CANL
with respect to any
other pin
−27
+40
V
V
transient voltage on
see Figure 6
−150
+100
pins CANH and CANL
TJA1054A
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 5 — 3 August 2010
9 of 27
TJA1054A
NXP Semiconductors
Fault-tolerant CAN transceiver
Table 6.
Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134).[1]
Symbol
Parameter
Conditions
Min
Max
Unit
VI(WAKE)
input voltage on pin WAKE with respect to any
other pin
-
VBAT + 0.3
V
[2]
II(WAKE)
VINH
input current on pin WAKE
voltage on pin INH
−15
-
mA
V
−0.3
−0.3
VBAT + 0.3
VBAT + 1.2
VRTH
voltage on pin RTH
with respect to any
other pin
V
VRTL
RRTH
RRTL
voltage on pin RTL
with respect to any
other pin
−0.3
500
500
VBAT + 1.2
16000
V
termination resistance on
pin RTH
Ω
Ω
termination resistance on
pin RTL
16000
[3]
[4]
Tvj
virtual junction temperature
storage temperature
−40
−55
+150
+150
°C
°C
Tstg
VESD
electrostatic discharge
voltage
human body model
pins RTH, RTL,
CANH and CANL
−4
−2
+4
+2
kV
kV
all other pins
machine model
any pin
[5]
−150
+150
V
[1] All voltages are defined with respect to pin GND, unless otherwise specified. Positive current flows into the
device.
[2] Only relevant if VWAKE < VGND − 0.3 V; current will flow into pin GND.
[3] Junction temperature in accordance with “IEC 60747-1”. An alternative definition is: Tvj = Tamb + P × Rth(vj-a)
where Rth(vj-a) is a fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable
combinations of power dissipation (P) and ambient temperature (Tamb).
[4] Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ resistor.
[5] Equivalent to discharging a 200 pF capacitor through a 10 Ω resistor and a 0.75 μH coil.
9. Thermal characteristics
Table 7.
Thermal characteristics
Parameter
Symbol
Conditions
Typ
Unit
Rth(j-a)
thermal resistance from junction in free air
to ambient
120
K/W
Rth(j-s)
thermal resistance from junction in free air
to substrate bare die
40
K/W
TJA1054A
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 5 — 3 August 2010
10 of 27
TJA1054A
NXP Semiconductors
Fault-tolerant CAN transceiver
10. Static characteristics
Table 8.
CC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB = VCC; Tvj = −40 °C to +150 °C; all voltages are defined with respect to
ground; positive currents flow into the device; unless otherwise specified.[1][2][3]
Static characteristics
V
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Supplies (pins VCC and BAT)
VCC
supply voltage
4.75
2.75
-
-
5.25
4.5
V
V
VCC(stb)
supply voltage for
forced standby mode
(fail-safe)
ICC
supply current
normal operating mode;
VTXD = VCC (recessive)
4
7
11
27
mA
mA
normal operating mode;
10
17
VTXD = 0 V (dominant); no load
low power modes at VTXD = VCC
0
0
-
10
μA
V
VBAT
battery supply voltage no time limit
−0.3
5.0
-
+40
27
on pin BAT
operating mode
-
V
load dump
-
40
V
IBAT
battery supply current low power mode at
on pin BAT
VRTL = VWAKE = VINH = VBAT
VBAT = 12 V
BAT = 5 V to 27 V
10
5
30
30
20
0
50
125
30
μA
μA
μA
μA
μA
V
VBAT = 3.5 V
VBAT = 1 V
5
0
10
sleep mode; VCC = 0 V;
VBAT = 12 V
-
30
50
Vpof(BAT)
power-on flag voltage low power modes
on pin BAT
power-on flag set
-
-
1
V
power-on flag not set
3.5
-
-
-
V
I(tot)
total supply current
low power modes; VCC = 5 V;
VBAT = VWAKE = VINH = 12 V
30
60
μA
Pins STB, EN and TXD
VIH
VIL
IIH
HIGH-level input
voltage
0.7VCC
-
-
VCC + 0.3
0.3VCC
V
V
LOW-level input
voltage
−0.3
HIGH-level input
current
pins STB and EN
pin TXD
VI = 4 V
VI = 4 V
-
9
20
μA
μA
−200
−80
−25
IIL
LOW-level input
current
pins STB and EN
pin TXD
VI = 1 V
VI = 1 V
4
8
-
μA
μA
−800
−320
−100
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Table 8.
Static characteristics …continued
VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB = VCC; Tvj = −40 °C to +150 °C; all voltages are defined with respect to
ground; positive currents flow into the device; unless otherwise specified.[1][2][3]
Symbol
Pins RXD and ERR
VOH HIGH-level output
voltage
on pin ERR
Parameter
Conditions
Min
Typ
Max
Unit
IO = −100 μA
IO = −1 mA
VCC − 0.9
VCC − 0.9
-
-
VCC
VCC
V
V
on pin RXD
VOL
LOW-level output
voltage
on pin ERR
on pin RXD
IO = 1.6 mA
IO = 7.5 mA
0
0
-
-
0.4
1.5
V
V
Pin WAKE
IIL
LOW-level input
current
VWAKE = 0 V; VBAT = 27 V
VSTB = 0 V
−10
−4
−1
μA
Vth(wake)
wake-up threshold
voltage
2.5
3.2
3.9
V
Pin INH
ΔVH
HIGH-level voltage
drop
IINH = −0.18 mA
-
-
-
-
0.8
5
V
|IL|
leakage current
sleep mode; VINH = 0 V
μA
Pins CANH and CANL
VCANH
voltage on pin CANH VCC = 0 V to 5.0 V; VBAT ≥ 0 V; no
time limit; with respect to any
other pin
−27
−27
-
-
+40
+40
V
V
VCANL
voltage on pin CANL VCC = 0 V to 5.0 V; VBAT ≥ 0 V; no
time limit; with respect to any
other pin
ΔVCANH
ΔVCANL
Vth(dif)
voltage drop on pin
CANH
ICANH = −40 mA
-
-
-
-
1.4
1.4
V
V
voltage drop on pin
CANL
ICANL = 40 mA
differential receiver
threshold voltage
no failures and
bus failures 1, 2, 5 and 6a;
see Figure 4
VCC = 5 V
−3.5
−3.2
−2.9
V
V
VCC = 4.75 V to 5.25 V
VTXD = VCC
−0.70VCC −0.64VCC −0.58VCC
VO(reces)
recessive output
voltage
on pin CANH
on pin CANL
RRTH < 4 kΩ
-
-
-
0.2
-
V
V
RRTL < 4 kΩ
VCC − 0.2
VO(dom)
dominant output
voltage
VTXD = 0 V; VEN = VCC
on pin CANH
on pin CANL
ICANH = −40 mA
VCC − 1.4
-
-
-
V
V
ICANL = 40 mA
-
1.4
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Fault-tolerant CAN transceiver
Table 8.
Static characteristics …continued
VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB = VCC; Tvj = −40 °C to +150 °C; all voltages are defined with respect to
ground; positive currents flow into the device; unless otherwise specified.[1][2][3]
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
IO(CANH)
output current on
pin CANH
normal operating mode;
−110
−80
−45
mA
VCANH = 0 V; VTXD = 0 V
low power modes;
VCANH = 0 V; VCC = 5 V
-
−0.25
70
-
μA
mA
μA
V
IO(CANL)
output current on
pin CANL
normal operating mode;
VCANL = 14 V; VTXD = 0 V
45
-
100
-
low power modes;
VCANL = 12 V; VBAT = 12 V
0
Vd(CANH)(sc) detection voltage for
normal operating mode;
short-circuit to battery VCC = 5 V
1.5
1.1
1.7
1.8
1.85
2.5
voltage on pin CANH
low power modes
normal operating mode
VCC = 5 V
V
Vd(CANL)(sc)
detection voltage for
short-circuit to battery
voltage on pin CANL
6.6
7.2
7.8
V
V
VCC = 4.75 V to 5.25 V
1.32VCC
1.44VCC
1.56VCC
Vth(wake)
wake-up threshold
voltage
on pin CANL
on pin CANH
low power modes
low power modes
2.5
1.1
0.8
3.2
1.8
1.4
3.9
2.5
-
V
V
V
ΔVth(wake)
difference of wake-up low power modes
threshold voltages (on
pins CANL and
CANH)
Vth(CANH)(se) single-ended receiver normal operating mode and
threshold voltage on
pin CANH
failures 4, 6 and 7
VCC = 5 V
1.5
1.7
1.85
V
V
VCC = 4.75 V to 5.25 V
0.30VCC
0.34VCC
0.37VCC
Vth(CANL)(se) single-ended receiver normal operating mode and
threshold voltage on
pin CANL
failures 3 and 3a
VCC = 5 V
3.15
3.3
3.45
V
VCC = 4.75 V to 5.25 V
normal operating mode
0.63VCC
110
0.66VCC
165
0.69VCC
270
V
Ri(CANH)(se)
Ri(CANL)(se)
Ri(dif)
single-ended input
resistance on
pin CANH
kΩ
single-ended input
resistance on
pin CANL
normal operating mode
normal operating mode
110
220
165
330
270
540
kΩ
kΩ
differential input
resistance
Pins RTH and RTL
Rsw(RTL) switch-on resistance
normal operating mode;
|IO| < 10 mA
-
-
50
50
100
100
Ω
Ω
on pin RTL
Rsw(RTH)
switch-on resistance
on pin RTH
normal operating mode;
|IO| < 10 mA
TJA1054A
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Fault-tolerant CAN transceiver
Table 8.
Static characteristics …continued
VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB = VCC; Tvj = −40 °C to +150 °C; all voltages are defined with respect to
ground; positive currents flow into the device; unless otherwise specified.[1][2][3]
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VO(RTH)
output voltage on
pin RTH
low power modes; IO = 1 mA
-
0.7
1.0
V
IO(RTL)
Ipu(RTL)
Ipd(RTH)
output current on
pin RTL
low power modes; VRTL = 0 V
−1.25
−0.65
75
−0.3
mA
μA
μA
pull-up current on
pin RTL
normal operating mode and
failures 4, 6 and 7
-
-
-
-
pull-down current on
pin RTH
normal operating mode and
failures 3 and 3a
75
Thermal shutdown
Tj(sd) shutdown junction
temperature
155
165
180
°C
[1] All parameters are guaranteed over the virtual junction temperature range by design, but only 100 % tested at Tamb = 125 °C for dies on
wafer level, and above this for cased products 100 % tested at Tamb = 25 °C, unless otherwise specified.
[2] For bare die, all parameters are only guaranteed if the back side of the die is connected to ground.
[3] A local or remote wake-up event will be signalled at the transceiver pins RXD and ERR if VBAT = 5.3 V to 27 V (see Table 5).
11. Dynamic characteristics
Table 9.
Dynamic characteristics
VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB = VCC; Tvj = −40 °C to +150 °C; all voltages are defined with respect to
ground; unless otherwise specified.[1][2][3]
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tt(reces-dom)
transition time for
between 10 % and 90 %;
0.35
0.60
-
μs
recessive to dominant R = 100 Ω; C1 = 10 nF;
(on pins CANL and
C2 = not present;
CANH)
see Figure 5
tt(dom-reces)
transition time for
between 10 % and 90 %;
0.2
0.3
-
μs
dominant to recessive R = 100 Ω; C1 = 1 nF;
(on pins CANL and
C2 = not present;
CANH)
see Figure 5
tPD(L)
propagation delay
TXD (LOW) to RXD
(LOW)
no failures and failures 1, 2, 5
and 6a; R = 100 Ω;
see Figure 4 and Figure 5
C1 = 1 nF;
C2 = not present
-
-
0.75
1
1.5
μs
μs
C1 = C2 = 3.3 nF
1.75
failures 3, 3a, 4, 6 and 7;
R = 100 Ω;
see Figure 4 and Figure 5
C1 = 1 nF;
C2 = not present
-
-
0.85
1.1
1.4
1.7
μs
μs
C1 = C2 = 3.3 nF
TJA1054A
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Product data sheet
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Fault-tolerant CAN transceiver
Table 9.
Dynamic characteristics …continued
VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB = VCC; Tvj = −40 °C to +150 °C; all voltages are defined with respect to
ground; unless otherwise specified.[1][2][3]
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tPD(H)
propagation delay
TXD (HIGH) to RXD
(HIGH)
no failures and failures 1, 2, 5
and 6a; R = 100 Ω;
see Figure 4 and Figure 5
C1 = 1 nF;
C2 = not present
-
-
1.2
2.5
1.9
3.3
μs
μs
C1 = C2 = 3.3 nF
failures 3, 3a, 4, 6 and 7;
R = 100 Ω;
see Figure 4 and Figure 5
C1 = 1 nF;
-
1.1
1.7
μs
C2 = not present
C1 = C2 = 3.3 nF
-
-
1.5
0.6
2.2
-
μs
μs
tr
bus line output rise
time
between 10 % and 90 %;
C1 = 10 nF; see Figure 5
tf
bus line output fall
time
between 10 % and 90 %;
C1 = 1 nF; see Figure 5
-
0.3
-
μs
μs
ms
[4]
treact(sleep)
tdis(TxD)
reaction time of
goto-sleep command
5
-
-
50
4
disable time of TxD
normal operating mode;
0.75
permanent dominant VTXD = 0 V
timer
[4]
[4]
[4]
tdom(CANH)
tdom(CANL)
tWAKE
dominant time for
remote wake-up on
pin CANH
low power modes;
VBAT = 12 V
7
7
7
-
-
-
38
38
38
μs
μs
μs
dominant time for
remote wake-up on
pin CANL
low power modes;
VBAT = 12 V
required time on
pin WAKE for local
wake-up
low power modes;
VBAT = 12 V; for wake-up after
receiving a falling or rising
edge
tdet
failure detection time normal operating mode
failures 3 and 3a
1.6
0.3
-
-
8.0
1.6
ms
ms
failures 4, 6 and 7
low power modes;
VBAT = 12 V
failures 3 and 3a
failures 4 and 7
1.6
0.1
-
-
8.0
1.6
ms
ms
TJA1054A
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NXP Semiconductors
Fault-tolerant CAN transceiver
Table 9.
Dynamic characteristics …continued
VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB = VCC; Tvj = −40 °C to +150 °C; all voltages are defined with respect to
ground; unless otherwise specified.[1][2][3]
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
trec
failure recovery time normal operating mode
failures 3 and 3a
failures 4 and 7
failure 6
0.3
7
-
-
-
1.6
38
ms
μs
μs
125
750
low power modes;
VBAT = 12 V
failures 3, 3a, 4 and 7
0.3
-
-
1.6
-
ms
ndet
pulse-count failure
detection
difference between CANH
and CANL; normal operating
mode and failures 1, 2, 5
and 6a;
4
pin ERR becomes LOW
nrec
number of
consecutive pulses
for failure recovery
on CANH and CANL
simultaneously;
failures 1, 2, 5 and 6a
-
4
-
[1] All parameters are guaranteed over the virtual junction temperature range by design, but only 100 % tested at Tamb = 125 °C for dies on
wafer level, and above this for cased products 100 % tested at Tamb = 25 °C, unless otherwise specified.
[2] For bare die, all parameters are only guaranteed if the back side of the die is connected to ground.
[3] A local or remote wake-up event will be signalled at the transceiver pins RXD and ERR if VBAT = 5.3 V to 27 V (see Table 4).
[4] To guarantee a successful mode transition under all conditions, the maximum specified time must be applied.
V
V
CC
TXD
0 V
V
5 V
CANL
3.6 V
1.4 V
0 V
V
CANH
2.2 V
−3.2 V
−5 V
ΔV
CAN
RXD
V
0.7V
0.3V
CC
CC
t
t
PD(H)
PD(L)
015aaa176
Vdiff = VCANH − VCANL
Fig 4. Timing diagram for dynamic characteristics
TJA1054A
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Fault-tolerant CAN transceiver
12. Test information
+
5 V
INH
BAT
V
CC
1
14
10
R1
C1
C2
WAKE
TXD
STB
EN
RTH
7
2
5
6
3
8
CANL
CANH
RTL
12
TJA1054A
11
9
RXD
R1
C1
13
GND
4
20 pF
ERR
mgu381
Termination resistors R1 (100 Ω) are not connected to pin RTH or pin RTL for testing purposes
because the minimum load allowed on the CAN bus lines is 500 Ω per transceiver.
The capacitive bus load of 10 nF is split into 3 equal capacitors (3.3 nF) to simulate the bus
cable.
Fig 5. Test circuit for dynamic characteristics
+
12 V
+
5 V
10 μF
BAT
14
V
CC
INH
1
10
1 nF
125 Ω
WAKE
TXD
STB
EN
RTH
7
2
5
6
3
8
511 Ω
CANL
12
1 nF
GENERATOR
TJA1054A
CANH
RTL
11
9
1 nF
511 Ω
RXD
1 nF
125 Ω
13
GND
4
20 pF
ERR
mgu382
The waveforms of the applied transients on pins CANH and CANL will be in accordance with
“ISO 7637 part 1”: test pulses 1, 2, 3a and 3b.
Fig 6. Test circuit for automotive transients
TJA1054A
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Fault-tolerant CAN transceiver
V
BAT
BATTERY
+
V
5 V
DD
P8xC592/P8xCE598
CAN CONTROLLER
+5 V
CTX0
TXD
CRXO
RXD
Px.x
STB
Px.x
ERR
Px.x
EN
INH
2
3
5
4
6
1
BAT
WAKE
7
14
V
CC
TJA1054A
CAN TRANSCEIVER
10
13
100 nF
GND
8
11
12
CANL
9
RTH
CANH
RTL
CAN BUS LINE
mgu380
Fig 7. Application diagram
12.1 Quality information
This product has been qualified to the appropriate Automotive Electronics Council (AEC)
standard Q100 or Q101 and is suitable for use in automotive applications.
TJA1054A
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Fault-tolerant CAN transceiver
13. Package outline
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A
X
c
y
H
v
M
A
E
Z
8
14
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
7
e
detail X
w
M
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.75
1.27
0.05
1.05
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.024
0.028
0.012
inches
0.041
0.01 0.004
0.069
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT108-1
076E06
MS-012
Fig 8. Package outline SOT108-1 (SO14)
TJA1054A
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14. Bare die outline
Table 10. Bonding pad locations
Symbol
Pad
Coordinates[1]
x
y
INH
1
106
111
317
168
111
TXD
RXD
ERR
STB
EN
2
3
750
1347
2248
2551
2559
2463
2389
1886
900
401
80
4
111
5
103
240
381
1443
1840
1809
1698
1698
1356
1241
772
6
WAKE
RTH
RTL
7
8
9
VCC
10
11
12
13a
13b
14
CANH
CANL
GND
GND
BAT
80
105
[1] All coordinates (μm) represent the position of the center of each pad with respect to the bottom left-hand
corner of the top aluminium layer (see Figure 9).
9
10
12
11
8
13a
13b
1990
μm
TJA1054AU
14
7
1
2
6
3
4
5
x
0
0
y
2730 μm
mgu384
Fig 9. Bonding pad locations
TJA1054A
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NXP Semiconductors
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15. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.
15.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
15.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
• Board specifications, including the board finish, solder masks and vias
• Package footprints, including solder thieves and orientation
• The moisture sensitivity level of the packages
• Package placement
• Inspection and repair
• Lead-free soldering versus SnPb soldering
15.3 Wave soldering
Key characteristics in wave soldering are:
• Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
• Solder bath specifications, including temperature and impurities
TJA1054A
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NXP Semiconductors
Fault-tolerant CAN transceiver
15.4 Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 10) than a SnPb process, thus
reducing the process window
• Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 11 and 12
Table 11. SnPb eutectic process (from J-STD-020C)
Package thickness (mm) Package reflow temperature (°C)
Volume (mm3)
< 350
235
≥ 350
220
< 2.5
≥ 2.5
220
220
Table 12. Lead-free process (from J-STD-020C)
Package thickness (mm) Package reflow temperature (°C)
Volume (mm3)
< 350
260
350 to 2000
> 2000
260
< 1.6
260
250
245
1.6 to 2.5
> 2.5
260
245
250
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 10.
TJA1054A
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 5 — 3 August 2010
22 of 27
TJA1054A
NXP Semiconductors
Fault-tolerant CAN transceiver
maximum peak temperature
= MSL limit, damage level
temperature
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 10. Temperature profiles for large and small components
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
16. Appendix
16.1 Overview of differences between the TJA1054 and the TJA1054A
Table 13. Characteristics
Symbol
Parameter
Conditions
TJA1054
TJA1054A
Unit
Min
Max
Min
Max
VCANH
VCANL
VESD
CANH bus line
voltage
−40
+40
−27
+40
V
V
CANL bus line
voltage
−40
+40
+2
−27
+40
+4
electrostatic
discharge
voltage
human body
model
pins RTH,
RTL, CANH
and CANL
−2
−4
kV
all other pins
machine model
any pin
−2
+2
−2
+2
kV
V
−100
+100
−150
+150
Table 14. Bare die
Parameter
TJA1054
TJA1054A
Unit
μm
Dimensions
1990 × 2700
1990 × 2730
[1]
[1]
Bonding pad coordinates
[1] The bonding pad coordinates partly differ between the TJA1054 and the TJA1054A.
TJA1054A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 5 — 3 August 2010
23 of 27
TJA1054A
NXP Semiconductors
Fault-tolerant CAN transceiver
17. Abbreviations
Table 15. Abbreviations
Acronym
CAN
Description
Controller Area Network
ElectroMagnetic Compatibility
ElectroMagnetic Emission
ElectroMagnetic Immunity
ElectroStatic Discharge
EMC
EME
EMI
ESD
18. Revision history
Table 16. Revision history
Document ID
TJA1054A v.5
Modifications:
Release date
20100803
Data sheet status
Change notice
Supersedes
Product data sheet
-
TJA1054A_4
• Value of parameter VESD (machine model) changed in Table 6 and Table 13.
• Typing error corrected in Table 8 in the conditions column for IBAT
.
TJA1054A_4
20070102
Product data sheet
-
TJA1054A_3
TJA1054A_2
TJA1054A_3
20040323
Product specification
-
(9397 750 11722)
TJA1054A_2
(9397 750 09321)
20020211
20010820
Product specification
-
-
TJA1054A_1
-
TJA1054A_1
Preliminary specification
(9397 750 08254)
TJA1054A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 5 — 3 August 2010
24 of 27
TJA1054A
NXP Semiconductors
Fault-tolerant CAN transceiver
19. Legal information
19.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
malfunction of an NXP Semiconductors product can reasonably be expected
19.2 Definitions
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
19.3 Disclaimers
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
TJA1054A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 5 — 3 August 2010
25 of 27
TJA1054A
NXP Semiconductors
Fault-tolerant CAN transceiver
Bare die — All die are tested on compliance with their related technical
specifications as stated in this data sheet up to the point of wafer sawing and
are handled in accordance with the NXP Semiconductors storage and
transportation conditions. If there are data sheet limits not guaranteed, these
will be separately indicated in the data sheet. There are no post-packing tests
performed on individual die or wafers.
All die sales are conditioned upon and subject to the customer entering into a
written die sale agreement with NXP Semiconductors through its legal
department.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
NXP Semiconductors has no control of third party procedures in the sawing,
handling, packing or assembly of the die. Accordingly, NXP Semiconductors
assumes no liability for device functionality or performance of the die or
systems after third party sawing, handling, packing or assembly of the die. It
is the responsibility of the customer to test and qualify their application in
which the die is used.
19.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
20. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
TJA1054A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 5 — 3 August 2010
26 of 27
TJA1054A
NXP Semiconductors
Fault-tolerant CAN transceiver
21. Contents
1
General description. . . . . . . . . . . . . . . . . . . . . . 1
2
2.1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Optimized for in-car low-speed
communication . . . . . . . . . . . . . . . . . . . . . . . . . 1
Bus failure management. . . . . . . . . . . . . . . . . . 1
Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Support for low power modes. . . . . . . . . . . . . . 2
2.2
2.3
2.4
3
4
5
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7
Functional description . . . . . . . . . . . . . . . . . . . 5
Failure detector. . . . . . . . . . . . . . . . . . . . . . . . . 5
Low power modes . . . . . . . . . . . . . . . . . . . . . . 7
Power-on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
7.1
7.2
7.3
7.4
8
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9
Thermal characteristics . . . . . . . . . . . . . . . . . 10
Static characteristics. . . . . . . . . . . . . . . . . . . . 11
Dynamic characteristics . . . . . . . . . . . . . . . . . 14
Test information. . . . . . . . . . . . . . . . . . . . . . . . 17
Quality information . . . . . . . . . . . . . . . . . . . . . 18
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 19
Bare die outline . . . . . . . . . . . . . . . . . . . . . . . . 20
9
10
11
12
12.1
13
14
15
Soldering of SMD packages . . . . . . . . . . . . . . 21
Introduction to soldering . . . . . . . . . . . . . . . . . 21
Wave and reflow soldering . . . . . . . . . . . . . . . 21
Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 21
Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 22
15.1
15.2
15.3
15.4
16
16.1
Appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Overview of differences between the
TJA1054 and the TJA1054A . . . . . . . . . . . . . 23
17
18
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 24
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 24
19
Legal information. . . . . . . . . . . . . . . . . . . . . . . 25
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 25
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 26
19.1
19.2
19.3
19.4
20
21
Contact information. . . . . . . . . . . . . . . . . . . . . 26
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 3 August 2010
Document identifier: TJA1054A
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