TJR1448CTK_技术文档

TJR1448

Dual high-speed CAN transceiver with Standby mode

Rev. 1 — 7 September 2020

Product data sheet

1 General description

The TJR1448 is a member of the TJR144x family of transceivers that provide an

interface between a Controller Area Network (CAN) or CAN FD (Flexible Data rate)

protocol controller and the physical two-wire CAN bus. TJR144x transceivers implement

the CAN physical layer as defined in ISO 11898-2:2016 and SAE J2284-1 to SAE

J2284-5, and are fully interoperable with high-speed Classical CAN and CAN FD

transceivers. All TJR144x variants enable reliable communication in the CAN FD fast

phase at data rates up to 5 Mbit/s and are qualified to AEC-Q100 Grade 0, supporting

operation at 150 °C ambient temperature.

The TJR1448 is intended as a simple replacement for dual high-speed Classical CAN

and CAN FD transceivers, such as the TJA1059 from NXP. It offers pin compatibility and

is designed to avoid changes to hardware and software design, allowing the TJR1448 to

be easily retrofitted to existing applications.

An AEC-Q100 Grade 1 variant, the TJA1448, is available to support operation at 125 °C

ambient temperature.

1.1 TJR1448 variants

The TJR1448 comes in three variants. The TJR1448A and TJR1448B are available in

SO14 and HVSON14 packages. The TJR1448C comes in a HVSON14 package:

• The TJR1448A is a dual high-speed CAN transceiver with Normal and Standby modes

and a VIO supply pin. The VIO pin allows for direct interfacing with 3.3 V and 5 V-

supplied microcontrollers.

• The TJR1448B is a high-speed CAN transceiver with Normal and Standby modes.

• The TJR1448C is a dual high-speed CAN transceiver with Normal and Standby modes,

a VIO supply pin and RXD latching. The VIO pin allows for direct interfacing with 3.3 V

and 5 V-supplied microcontrollers.

2 Features and benefits

2.1 General

• ISO 11898-2:2016, SAE J2284-1 to SAE J2284-5 and SAE J1939-14 compliant

• Standard CAN and CAN FD data bit rates up to 5 Mbit/s

• Low Electromagnetic Emission (EME) and high Electromagnetic Immunity (EMI)

• Qualified according to AEC-Q100 Grade 0

• TJR1448A/C only: VIO input for interfacing with 3.3 V to 5 V microcontrollers

• Fully independent control of two transceivers combined monolithically in a single

package

NXP Semiconductors

TJR1448

Dual high-speed CAN transceiver with Standby mode

• All variants are available in a leadless HVSON14 (3.0 mm x 4.5 mm) package with

improved Automated Optical Inspection (AOI) capability; TJR1448A/B available in an

SO14 package.

• Dark green product (halogen free and Restriction of Hazardous Substances (RoHS)

compliant)

2.2 Predictable and fail-safe behavior

• Undervoltage detection with defined handling on all supply pins

• Full functionality guaranteed from the undervoltage detection thresholds up to the

maximum limiting voltage values

• Defined behavior below the undervoltage detection thresholds

• Transceiver disengages from the bus (high-ohmic) when the supply voltage drops

below the Off mode threshold

• Internal biasing of TXD and mode selection input pins, to enable defined fail-safe

behavior

2.3 Low-power management

• Very low-current Standby mode with host and bus wake-up capability

• TJR1448A/C only: CAN wake-up receiver powered by V_IOallowing V_CCto be shut

down

• CAN wake-up pattern filter time of 0.5 μs to 1.8 μs meeting Classical CAN and CAN FD

requirements

• TJR1448C variant offers RXD wake-up latching to enable wake-up source readout in

gateway applications

2.4 Protection

• High ESD handling capability on the bus pins (8 kV IEC and HBM)

• Bus pins protected against transients in automotive environments

• Transmit Data (TXD) dominant time-out function

• Thermally protected

TJR1448

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Product data sheet

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NXP Semiconductors

TJR1448

Dual high-speed CAN transceiver with Standby mode

3 Quick reference data

Table 1.ꢀQuick reference data

Symbol

V_CC

Parameter

Conditions

Min

Typ

Max Unit

supply voltage

supply current

4.5

-

5.5

V

I_CC

Normal mode

both channels recessive

-

8

14

mA

one channel dominant

both channels dominant

both channels in Standby mode

TJR1448A/C

42

77

67

120

-

2

μA

V

TJR1448B

-

11

-

18

4.5

V_{uvd(stb)(VCC)}

standby undervoltage detection

voltage on pin VCC

4

V_{uvhys(stb)(VCC)}standby undervoltage hysteresis

voltage on pin VCC

50

-

mV

V

V_{uvd(swoff)(VCC)}switch-off undervoltage detection TJR1448B

voltage on pin VCC

2.65

2.95

5.5

V_IO

I_IO

supply voltage on pin VIO

supply current on pin VIO

V

Normal mode

both channels recessive

-

270

360

450

11

750

μA

one channel dominant

both channels dominant

-

1000 μA

1250 μA

-

both channels in Standby mode

-

16

μA

V

V_{uvd(swoff)(VIO)}switch-off undervoltage detection

voltage on pin VIO

2.65

-

2.95

V_ESD

V_CANH

V_CANL

T_vj

electrostatic discharge voltage

IEC 61000-4-2 on pins CANHx and

CANLx

-8

-

+8

kV

V

voltage on pin CANH

pins CANH1 and CANH2; limiting value -36

according to IEC 60134

+40

voltage on pin CANL

pins CANL1 and CANL2; limiting value

according to IEC 60134

-36

V

virtual junction temperature

-40

+175 °C

TJR1448

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Product data sheet

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TJR1448

Dual high-speed CAN transceiver with Standby mode

4 Ordering information

Table 2.ꢀOrdering information

Type number

Package

Name

Description

Version

TJR1448AT

TJR1448BT

TJR1448ATK

TJR1448BTK

TJR1448CTK

SO14

plastic small outline package; 14 leads; body width 3.9 mm

SOT108-1

HVSON14

plastic thermal enhanced very thin small outline package; no

leads; 14 terminals; body 3 × 4.5 × 0.85 mm

SOT1086-2

TJR1448

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TJR1448

Dual high-speed CAN transceiver with Standby mode

5 Block diagrams

VIO

11

VCC

3

TJR1448A/C

TEMPERATURE

PROTECTION

V

IO

1

TIME-OUT

TXD1

SLOPE

CONTROL

AND

13

CANH1

CANL1

12

DRIVER

14

4

STB1

RXD1

V

IO

normal

receiver

MUX AND

DRIVER

WAKE-UP

FILTER

low-power

receiver

MODE

CONTROL

V

IO

SLOPE

CONTROL

AND

10

9

CANH2

CANL2

6

TIME-OUT

TXD2

DRIVER

normal

receiver

8

7

STB2

RXD2

V

IO

WAKE-UP

FILTER

low-power

receiver

MUX AND

DRIVER

2,5

aaa-039105

GND

Figure 1.ꢀBlock diagram: TJR1448A/C

TJR1448

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TJR1448

Dual high-speed CAN transceiver with Standby mode

VCC

3

TJR1448B

TEMPERATURE

PROTECTION

V

CC

1

TIME-OUT

TXD1

SLOPE

CONTROL

AND

13

12

CC

CANH1

CANL1

DRIVER

14

4

STB1

RXD1

V

CC

normal

receiver

MUX AND

DRIVER

WAKE-UP

FILTER

low-power

receiver

MODE

CONTROL

V

CC

SLOPE

CONTROL

AND

10

9

CANH2

CANL2

5

TIME-OUT

TXD2

DRIVER

CC

normal

11

8

receiver

STB2

RXD2

V

CC

WAKE-UP

FILTER

low-power

receiver

MUX AND

DRIVER

7

2,6

aaa-039106

n.c.

GND

Figure 2.ꢀBlock diagram: TJR1448B

TJR1448

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TJR1448

Dual high-speed CAN transceiver with Standby mode

6 Pinning information

6.1 Pinning

1

2

3

4

5

6

7

14

13

12

11

10

9

1

2

3

4

5

6

7

14

13

12

11

10

9

TXD1

GND

VCC

STB1

TXD1

GND

VCC

RXD1

TXD2

GND

n.c.

STB1

CANH1

CANL1

VIO

CANH1

CANL1

STB2

RXD1

GND

TXD2

RXD2

CANH2

CANL2

STB2

CANH2

CANL2

RXD2

8

aaa-038133

aaa-038135

TJR1448AT: SO14

TJR1448BT: SO14

terminal 1

index area

terminal 1

index area

TXD1

1

2

3

4

5

6

7

14 STB1

13 CANH1

12 CANL1

11 VIO

TXD1

1

2

3

4

5

6

7

14 STB1

GND

VCC

GND

VCC

13 CANH1

12 CANL1

11 STB2

RXD1

GND

RXD1

TXD2

GND

n.c.

10 CANH2

TXD2

RXD2

9

CANL2

STB2

9

CANL2

RXD2

8

aaa-038134

aaa-038136

TJR1448ATK/CTK: HVSON14

TJR1448BTK: HVSON14

Figure 3.ꢀPin configuration diagrams

TJR1448

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TJR1448

Dual high-speed CAN transceiver with Standby mode

6.2 Pin description

Table 3.ꢀPin description: TJR1448A/C

Symbol

Type^[1]Description

TXD1

1

I

transmit data input 1; inputs data (from the CAN controller) to be written to CANH1/CANL1

bus lines

GND^[2]

VCC

2

3

4

G

P

ground

5 V supply voltage input

RXD1

O

receive data output 1; outputs data read from bus lines CANH1/CANL1 (to the CAN

controller)

GND^[2]

TXD2

5

6

G

I

ground

transmit data input 2; inputs data (from the CAN controller) to be written to CANH1/CANL1

bus lines

RXD2

7

O

receive data output 2; outputs data read from bus lines CANH2/CANL2 (to the CAN

controller)

STB2

8

I

Standby mode control input 2 (HIGH: Standby mode; LOW: Normal mode)

LOW-level CAN bus line 2

CANL2

CANH2

VIO

9

AIO

P

10

11

12

13

14

HIGH-level CAN bus line 2

supply voltage input for I/O level adapter

LOW-level CAN bus line 1

CANL1

CANH1

STB1

AIO

I

HIGH-level CAN bus line 1

Standby mode control input 1 (HIGH: Standby mode; LOW: Normal mode)

[1] I: digital input; O: digital output; AIO: analog input/output; P: power supply; G: ground.

[2] HVSON package die supply ground is connected to both the GND pin and the exposed center pad. The GND pin must be soldered to board ground. For

enhanced thermal and electrical performance, it is also recommended to solder the exposed center pad to board ground.

TJR1448

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TJR1448

Dual high-speed CAN transceiver with Standby mode

Table 4.ꢀPin description: TJR1448B

Symbol

Type^[1]Description

TXD1

1

I

transmit data input 1; inputs data (from the CAN controller) to be written to CANH1/CANL1

bus lines

GND^[2]

VCC

2

3

4

G

P

ground

5 V supply voltage input

RXD1

O

receive data output 1; outputs data read from bus lines CANH1/CANL1 (to the CAN

controller)

TXD2

5

I

transmit data input 2; inputs data (from the CAN controller) to be written to CANH2/CANL2

bus lines

GND^[2]

n.c.

6

7

8

G

-

ground

not connected

RXD2

O

receive data output 2; outputs data read from bus lines CANH2/CANL2 (to the CAN

controller)

CANL2

CANH2

STB2

9

AIO

I

LOW-level CAN bus line 2

10

11

12

13

14

HIGH-level CAN bus line 2

Standby mode control input 2 (HIGH: Standby mode; LOW: Normal mode)

LOW-level CAN bus line 1

CANL1

CANH1

STB1

AIO

I

HIGH-level CAN bus line 1

Standby mode control input 1 (HIGH: Standby mode; LOW: Normal mode)

[1] I: digital input; O: digital output; AIO: analog input/output; P: power supply; G: ground.

[2] HVSON package die supply ground is connected to both the GND pin and the exposed center pad. The GND pin must be soldered to board ground. For

enhanced thermal and electrical performance, it is also recommended to solder the exposed center pad to board ground.

TJR1448

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TJR1448

Dual high-speed CAN transceiver with Standby mode

7 Functional description

7.1 Operating modes

The TJR1448 supports three operating modes per transceiver, Normal, Standby and

Off. The operating mode is selected independently for each transceiver via pins STB1

and STB2. See Table 5 for a description of the operating modes under normal supply

conditions. Mode changes are completed after transition time t_t(moch)

.

Table 5.ꢀOperating modes

Mode

Inputs

Outputs

Pin STB1/STB2 Pin TXD1/TXD2 CAN1/CAN2 driver Pin RXD1/RXD2

Normal

LOW

HIGH

dominant

recessive

LOW

LOW when bus dominant

HIGH when bus recessive

Standby

Off^[1]

HIGH

X

biased to ground

TJR1448A/B: follows BUS when wake-up detected

TJR1448C: LOW when wake-up detected

HIGH when no wake-up detected

high-ohmic state

X

high-ohmic state

[1] Off mode is entered when the voltage on pin VIO (TJR1448A/C) or pin VCC (TJR1448B) is below the switch-off undervoltage detection threshold.

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TJR1448

Dual high-speed CAN transceiver with Standby mode

from any mode when

< V for t > t

uvd(swoff)(VIO)

V

IO

uvd(swoff)

OFF

(CANx BIAS =

high-ohmic)

V

> V for t > t

uvd(swoff)(VIO) startup

IO

STANDBY

(CANx BIAS =

0 V)

STBx = HIGH

< V for t > t )

det(uv)

STBx = LOW

uvd(stb)(VCC)

OR (V

AND (V

> V

for t > t

)

rec(uv)

CC

uvd(stb)(VCC)

CC

NORMAL

(CANx BIAS =

/2)

V

CC

aaa-031273

Figure 4.ꢀ TJR1448A/C state diagram (per channel)

TJR1448

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TJR1448

Dual high-speed CAN transceiver with Standby mode

from any mode when

for t > t

V

CC

< V

uvd(swoff)(VCC)

uvd(swoff)

OFF

(CANx BIAS =

high-ohmic)

V

> V

for t > t

CC

uvd(swoff)(VCC) startup

STANDBY

(CANx BIAS =

0 V)

STBx = HIGH

< V for t > t )

det(uv)

STBx = LOW

> V

OR (V

AND (V

for t > t

)

rec(uv)

CC

uvd(stb)(VCC)

CC

uvd(stb)(VCC)

NORMAL

(CANx BIAS

= V /2)

CC

aaa-031274

Figure 5.ꢀ TJR1448B state diagram (per channel)

7.1.1 Off mode

The TJR1448 switches to Off mode from any mode when the supply voltage (on pin

VIO in TJR1448A/C and VCC in TJR1448B) falls below the switch-off undervoltage

threshold (V_{uvd(swoff)(VCC)}or V_{uvd(swoff)(VIO)}). This is the default mode when the supply is

first connected.

In Off mode, the CAN pins and RXDx pins are in a high-ohmic state.

7.1.2 Standby mode

When the supply voltage (V_IOfor TJR1448A/C or V_CCfor TJR1448B) rises above the

switch-off undervoltage detection threshold, the TJR1448 starts to boot up, triggering an

initialization procedure. The TJR1448 switches to the selected mode after t_startup

.

Standby mode is selected when pin STBx goes HIGH. In this mode, the transceiver

is unable to transmit or receive data and a low-power receiver is activated to monitor

the bus for a wake-up pattern. The transmitter and Normal-mode receiver blocks are

switched off and the bus pins are biased to ground to minimize system supply current.

Pin RXDx in the TJR1448A/B follows the bus after a wake-up request has been detected.

In the TJR1448C, RXDx is forced LOW when a wake-up request is detected.

A transition to Normal mode is triggered when STBx is forced LOW (provided V_CC

V_{uvd(stb)(VCC)}and V_IO> V_{uvd(swoff)(VIO)}in the TJR1448A/C).

>

TJR1448

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TJR1448

Dual high-speed CAN transceiver with Standby mode

If V_CCis below V_{uvd(stb)(VCC)}when STBx goes LOW (with V_IO> V_{uvd(swoff)(VIO)}in

TJR1448A/C and V_CC> V_{uvd(swoff)(VCC)}in TJR1448B), the TJR1448 will remain in

Standby mode. Pending wake-up events will be cleared and differential data on the bus

pins converted to digital data via the low-power receiver and output on pin RXDx.

In the TJR1448A/C, the low-power receiver is supplied from V_IOand can detect CAN bus

activity when V_IOis above V_{uvd(swoff)(VIO)}(even if V_IOis the only available supply voltage).

7.1.3 Normal mode

A LOW level on pin STBx selects Normal mode, provided the supply voltage on pin VCC

is above the standby undervoltage detection threshold, V_{uvd(stb)(VCC)}

.

In this mode, the transceiver can transmit and receive data via bus lines CANHx and

CANLx. Pin TXDx must be HIGH at least once in Normal Mode before transmission can

begin. The differential receiver converts the analog data on the bus lines into digital data

on pin RXDx. The slopes of the output signals on the bus lines are controlled internally

and are optimized in a way that guarantees the lowest possible EME. In recessive state,

the output voltage on the bus pins is V_CC/2.

7.1.4 Operating modes and gap-free operation

Gap-free operation guarantees defined behavior at all voltage levels. Supply voltage-to-

operating mode mapping is detailed in Figure 6 and in the state diagrams (Figure 4 and

Figure 5).

TJR1448

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TJR1448

Dual high-speed CAN transceiver with Standby mode

TJR1448A/C

TJR1448B

[1]

[2][3]

[1]

[2][3]

5.5 V - 6 V

Fully functional

5.5 V - 6 V

Fully functional

[2][3]

Fully functional

OR

[2]

Fully functional AND

characteristics

[4]

Off

V

operating range

CC

(4.5 V - 5.5 V)

V

operating range

CC

(4.5 V - 5.5 V)

characteristics

[5]

guaranteed

Off

[2]

Fully functional OR

[6]

V

range

V

range

uvd(stb)(VCC)

[4]

Standby OR Off

Standby

2.95 V - 4 V

Standby

[4]

-0.3 V - 4 V

V

range

Standby OR Off

Standby

Standby OR Off

uvd(swoff)(VCC)

-0.3 V - 2.65 V

Off

Voltage range on VIO

[1] 6 V is the IEC 60134 Absolute Maximum Rating (AMR) for VCC and VIO (see Limiting values table). Above the AMR, irreversible changes in

characteristics, functionality or performance may occur. Returning from above AMR to the operating range, datasheet characteristics and

functionality cannot be guaranteed.

[2] Target transceiver functionality as described in this datasheet is applicable.

[3] Prolonged operation of the device outside the operating range may impact reliability over lifetime. Returning to the operating range, datasheet

characteristics are guaranteed provided the AMR has not been exceeded.

[4] For a given value of V

(and V in TJR1448A/C), a specific device will be in a single defined state determined by its undervoltage detection

CC

IO

thresholds (V

, V

and V ). The actual thresholds can vary between devices (within the ranges specified

uvd(swoff)(VCC)

uvd(stb)(VCC) uvd(swoff)(VIO)

in this data sheet). To guarantee the device will be in a specific state, V and V

must be either above the maximum or below the

IO

CC

minimum thresholds specified for these undervoltage detection ranges.

[5] Datasheet characteristics are guaranteed within the V

characteristics tables.

and V operating ranges. Exceptions are described in the Static and Dynamic

CC

IO

[6] The following applies to TJR1448A/C:

- If both V

and V are above the undervoltage threshold, the device is fully functional.

CC

IO

- If V

is below and V above the undervoltage threshold, the device is in Standby mode.

CC

IO

- If V is below the undervoltage threshold, the device is in Off mode, regardless of V

.

IO

CC

aaa-039107

Figure 6.ꢀTJR1448 supply voltage ranges and gap-free operation

7.2 Remote wake-up (via the CAN bus)

In Standby mode, the TJR1448 wakes up when a dedicated wake-up pattern (specified in

ISO 11898-2: 2016) is detected on the bus.

The wake-up pattern consists of:

• a dominant phase of at least t_wake(busdom)followed by

• a recessive phase of at least t_wake(busrec)followed by

• a dominant phase of at least t_wake(busdom)

Dominant or recessive bits between the above mentioned phases that are shorter than

t_wake(busdom)and t_wake(busrec)respectively are ignored.

The complete dominant-recessive-dominant pattern must be received within t_to(wake)busto

be recognized as a valid wake-up pattern (see Figure 7 for TJR1448A/B wake-up timing

TJR1448

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TJR1448

Dual high-speed CAN transceiver with Standby mode

and Figure 8 for TJR1448C wake-up timing). Otherwise, the internal wake-up logic is

reset. The complete wake-up pattern then needs to be retransmitted to trigger a wake-up

event. Pin RXDx remains HIGH until the wake-up event has been triggered.

After a wake-up sequence has been detected, the TJR1448A/B remains in Standby

mode with the bus signals reflected on RXDx after t_startup(RXD). Note that dominant or

recessive phases lasting less than t_{fltr(wake)bus}will not be detected by the low-power

differential receiver and will not be reflected on RXDx in Standby mode (see Figure 7).

The TJR1448C also remains in Standby mode after a wake-up sequence has been

detected, but pin RXDx switches LOW after t_startup(RXD)(see Figure 8).

A wake-up event is not flagged on RXDx if any of the following events occurs while a

valid wake-up pattern is being received:

• The device switches to Normal mode

• The complete wake-up pattern was not received within t_to(wake)bus

• A V_CCor V_IOswitch-off undervoltage is detected (V_CC< V_{uvd(swoff)(VCC)}or V_IO

<

V_{uvd(swoff)(VIO)}; see Section 7.3.3)

CANH

CANL

V

O(dif)

t

t < t

fltr(wake)bus

wake(busrec)

fltr(wake)bus fltr(wake)bus

fltr(wake)bus

t

fltr(wake)bus

wake(busdom)

fltr(wake)bus

(1)

t

startup(RXD)

RXD

wake-up

pattern detected

t ≤ t

to(wake)bus

aaa-031221

(1) During t_startup(RXD), the low-power receiver is on but pin RXDx is not active (i.e. HIGH/recessive). The first dominant

pulse of width ≥ t_{fltr(wake)bus}that ends after t_startup(RXD)will trigger RXDx to go LOW/dominant.

Figure 7.ꢀTJR1448A/B wake-up timing

CANH

V

O(dif)

CANL

t

wake(busdom)

wake(busrec)

wake-up

pattern detected

RXD

≤ t

t

startup(RXD)

to(wake)bus

aaa-031220

Figure 8.ꢀTJR1448C wake-up timing

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NXP Semiconductors

TJR1448

Dual high-speed CAN transceiver with Standby mode

7.3 Fail-safe features

7.3.1 TXD dominant timeout function

A hardware and/or software application failure in Normal mode that caused pin TXDx

to be held LOW would drive the bus lines to a permanent dominant state (blocking all

network communications). The TXD dominant timeup function prevents such a network

lock-up. A 'TXD dominant timeout' timer is started when pin TXDx goes LOW. If the LOW

state on this pin persists for longer than t_to(dom)TXD, the transmitter is disabled, releasing

the bus lines to recessive state. The TXD dominant time-out timer is reset when pin

TXDx is set HIGH.

7.3.2 Internal biasing of TXDx and STBx input pins

Pins TXDx and STBx have internal pull-ups to V_CC/V_IOto ensure a safe, defined state in

case one, or both, of these pins is left or becomes floating. Pull-up resistors are active

on these pins in all states; they should be held at the V_CC/V_IOlevel in Standby mode to

minimize supply current.

7.3.3 Undervoltage detection on pins VCC and VIO

If V_CCdrops below the standby undervoltage detection threshold (V_{uvd(stb)(VCC)}) for t_det(uv)

both transceivers switch to Standby mode. The logic state of pin STBx is ignored until

V_CChas recovered.

,

In the TJR1448A/C, if V_IOdrops below the switch-off undervoltage detection threshold

(V_{uvd(swoff)(VIO)}) for t_uvd(swoff), both transceiver switch to Off mode and disengage from the

bus (high-ohmic) until V_IOhas recovered.

In the TJR1448B, if V_CCdrops below the switch-off undervoltage detection threshold

(V_{uvd(swoff)(VCC)}) for t_uvd(swoff), both transceivers switch to Off mode and disengage from

the bus (high-ohmic) until V_CChas recovered.

7.3.4 Overtemperature protection

The device is protected against overtemperature conditions. If the junction temperature

exceeds the shutdown junction temperature, T_j(sd), the CAN bus drivers are disabled.

When the junction temperature drops below T_j(sd)rel, the CAN bus drivers recover once

TXDx has been reset to HIGH and Normal mode is selected (waiting for TXDx to go

HIGH prevents output driver oscillation due to small variations in temperature).

7.3.5 I/O levels

Pin VIO on the TJR1448A/C should be connected to the same supply voltage used to

supply the microcontroller (see Figure 1). This adjusts the signal levels on pins TXDx,

RXDx and STBx to the I/O levels of the microcontroller, allowing for direct interfacing

without additional glue logic. Pin VIO also provides the internal supply voltage for the low-

power differential receiver. For applications running in low-power mode, this allows the

bus lines to be monitored for activity even if there is no supply voltage on pin VCC.

All I/O levels are related to V_CCin the TJR1448B and are, therefore, compatible with 5 V

microcontrollers. Spurious signals from the microcontroller on pins STB1 and STB2 are

filtered out with a filter time of t_fltr(IO)

.

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TJR1448

Dual high-speed CAN transceiver with Standby mode

8 Limiting values

Table 6.ꢀLimiting values

In accordance with the Absolute Maximum Rating System (IEC 60134); all voltages are referenced to pin GND, unless

otherwise specified.

Symbol

Parameter

voltage on pin x^[1]

Conditions

Min

-0.3

-

Max

Unit

V

V_x

pins VCC, VIO (TJR1448A), TXDx, STBx

+6

+7^[2]

+40

V

pins CANHx, CANLx

pin RXDx

-36

V

TJR1448A/C

TJR1448B

-0.3

-40

V_IO+0.3^[3]

V_CC+0.3^[3]

+40

V

V_(CANH-CANL)voltage between pin

CANH and pin CANL

between pins CANH1 and CANL1 and between

CANH2 and CANL2

[4]

V_trt

transient voltage

on pins CANHx, CANLx

pulse 1

-100

-

V

pulse 2a

-

+75

-

pulse 3a

-150

-

pulse 3b

+100

[5]

V_ESD

electrostatic discharge IEC 61000-4-2 (150 pF, 330 Ω discharge circuit)

voltage

on pins CANHx, CANLx

-8

+8

kV

Human Body Model (HBM)

on any pin

[6]

[7]

[8]

-4

-8

+4

+8

kV

on pins CANHx, CANLx

Charged Device Model (CDM)

on corner pins

-750

-500

-40

+750

+500

+175

V

on any other pin

V

[9]

T_vj

virtual junction

temperature

°C

T_stg

storage temperature

-55

+150

°C

[1] The device can sustain voltages up to the specified values over the product lifetime, provided applied voltages (including transients) never exceed these

values.

[2] The device can withstand voltages between 6 V and 7 V for a total of 20 s over the product lifetime.

[3] Subject to the qualifications detailed in Table notes 1 and 2 above for pins VCC, VIO, TXDx and STBx.

[4] Verified by an external test house according to IEC TS 62228, Section 4.2.4; parameters for standard pulses defined in ISO7637.

[5] Verified by an external test house according to IEC TS 62228, Section 4.3.

[6] According to AEC-Q100-002.

[7] Pins stressed to reference group containing all ground and supply pins, emulating the application circuits (Figure 1 and Figure 2). HBM pulse as specified

in AEC-Q100-002 used.

[8] According to AEC-Q100-011.

[9] In accordance with IEC 60747-1. An alternative definition of virtual junction temperature is: T_vj= T_amb+ P × R_th(j-a), where R_th(j-a)is a fixed value used in

the calculation of T_vj. The rating for T_vjlimits the allowable combinations of power dissipation (P) and ambient temperature (T_amb).

TJR1448

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TJR1448

Dual high-speed CAN transceiver with Standby mode

9 Thermal characteristics

Table 7.ꢀThermal characteristics

Value determined for free convection conditions on a JEDEC 2S2P board.

Symbol

Parameter

Conditions^[1]

SO14

Typ

62

42

10

8

Unit

K/W

R_th(j-a)

thermal resistance from junction to ambient

HVSON14

SO14

R_th(j-c)

Ѱ_j-top

thermal resistance from junction to case^[2]

thermal characterization parameter from junction to top of package

HVSON14

4

[1] According to JEDEC JESD51-2, JESD51-5 and JESD51-7 at natural convection on 2s2p board. Board with two inner copper layers (thickness: 35 μm)

and thermal via array under the exposed pad connected to the first inner copper layer (thickness: 70 μm).

[2] Case temperature refers to the center of the heatsink at the bottom of the package.

10 Static characteristics

Table 8.ꢀStatic characteristics

T_vj= -40 °C to +175 °C; V_CC= 4.5 V to 5.5 V; V_IO= 2.95 V to 5.5 V (TJR1448A/C); R_L= 60 Ω unless specified otherwise; all

voltages are defined with respect to ground; positive currents flow into the IC.^[1]

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Supply; pin VCC

V_CC

supply voltage

4.5

4

-

5.5

4.5

V

[2]

V_uvd(stb)

standby undervoltage

detection voltage

V_uvhys(stb)

V_uvd(swoff)

I_CC

standby undervoltage

hysteresis voltage

50

-

mV

V

switch-off undervoltage

detection voltage

TJR1448B

2.65

2.95

supply current

Normal mode

both channels recessive;

V_TXDx= V_IO

-

8

14

mA

[3]

one channel dominant; one channel

recessive; t < t_to(dom)TXD

42

77

-

67

both channels dominant;

V_TXDx= 0 V; t < t_to(dom)TXD

120

250

both channels dominant;

V_TXDx= 0 V;

short circuit on bus lines;

-3 V < (V_CANHx= V_CANLx) < +40 V

Standby mode

TJR1448A,C; T_vj< 85 °C

TJR1448B; T_vj< 85 °C

-

2

μA

11

18

I/O level adapter supply; pin VIO (TJR1448A/C)

V_IO

supply voltage

2.95

-

5.5

V

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TJR1448

Dual high-speed CAN transceiver with Standby mode

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

[2]

V_uvd(swoff)

switch-off undervoltage

detection voltage

2.65

-

2.95

V

I_IO

supply current

Normal mode

both channels recessive;

V_TXDx= V_IO

-

270

360

450

11

750

1000

1250

16

μA

one channel dominant; one channel

recessive

both channels dominant;

V_TXDx= 0 V

Standby mode; T_vj< 85 °C

CAN transmit data input; pins TXD1 and TXD2

[3]

V_IH

HIGH-level input voltage

LOW-level input voltage

0.7V_IO

-

V

[3]

V_IL

-

0.3V_IO

V

V_hys(TXD)

hysteresis voltage on pin

TXD

50

-

mV

R_pu

C_i

pull-up resistance

input capacitance

20

-

80

10

kΩ

pF

[4]

CAN receive data output; pins RXD1 and RXD2

I_OH

I_OL

HIGH-level output current

LOW-level output current

V_RXDx= V_IO^[3]- 0.4 V

-10

1

-

-1

mA

V_RXDx= 0.4 V; bus dominant

10

Standby control input; pins STB1 and STB2

[3]

V_IH

V_IL

V_hys

R_pu

C_i

HIGH-level input voltage

LOW-level input voltage

hysteresis voltage

0.7V_IO

-

V

[3]

-

0.3V_IO

V

50

20

-

mV

kΩ

pF

pull-up resistance

80

10

[4]

input capacitance

Bus lines; pins CANH1, CANH2, CANL1 and CANL2

V_O(dom)

dominant output voltage

V_TXD= 0 V; t < t_to(dom)TXD;

V_CC≥ 4.75 V; R_L= 50 Ω to 65 Ω

pin CANHx

2.75

0.5

3.5

1.5

-

4.5

V

pin CANLx

2.25

[4]

[5]

V_TXsym

V_cm(step)

V_cm(p-p)

transmitter voltage

symmetry

V_TXsym= V_CANHx+ V_CANLx

C_SPLIT= 4.7 nF;

f_TXD= 250 kHz, 1 MHz or 2.5 MHz

;

0.9V_CC

1.1V_CC

+150

[4]

[5]

[6]

common mode voltage step

-150

-

mV

[4]

[5]

[6]

peak-to-peak common mode

voltage

-300

+300

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TJR1448

Dual high-speed CAN transceiver with Standby mode

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

V_O(dif)

differential output voltage

dominant; Normal mode; V_TXDx= 0 V;

t < t_to(dom)TXD; V_CC≥ 4.75 V

R_L= 50 Ω to 65 Ω

R_L= 45 Ω to 70 Ω

R_L= 2240 Ω

1.5

1.4

1.5

-

3

V

3.3

5

[4]

recessive; no load

[3]

Normal mode; V_TXDx= V_IO

-50

-0.2

2

-

+50

+0.2

3

mV

V

Standby mode

-

V_O(rec)

recessive output voltage

Normal mode; V_TXDx= V_IO^[3]; no load

2.5

-

V

Standby mode; no load

-0.1

+0.1

V

V_th(RX)dif

differential receiver

threshold voltage

-12 V ≤ V_CANHx≤ +12 V;

-12 V ≤ V_CAxNL≤ +12 V

Normal mode

Standby mode

0.5

0.4

-

0.9

1.1

V

V_rec(RX)

receiver recessive voltage

receiver dominant voltage

-12 V ≤ V_CANHx≤ +12 V;

-12 V ≤ V_CANLx≤ +12 V

Normal mode

Standby mode

-4

-

+0.5

+0.4

V

V_dom(RX)

-12 V ≤ V_CANHx≤ +12 V;

-12 V ≤ V_CANLx≤ +12 V

Normal mode

Standby mode

0.9

1.1

50

-

9

-

V

V_hys(RX)dif

I_O(sc)

differential receiver

hysteresis voltage

-12 V ≤ V_CANHx≤ +12 V;

mV

-12 V ≤ V_CANLx≤ +12 V; Normal mode

short-circuit output current

-15 V ≤ V_CANHx≤ +40 V;

-15 V ≤ V_CANLx≤ +40 V

-

115

+3

mA

I_O(sc)rec

recessive short-circuit output -27 V ≤ V_CANHx≤ +32 V;

-3

current

-27 V ≤ V_CA_[3_N_]_Lx≤ +32 V; Normal mode;

V_TXD= V_IO

I_L

leakage current

input resistance

input resistance deviation

V_CC= V_IO= 0 V or pins shorted to GND

via 47 KΩ; V_CANHx= V_CANLx= 5 V

-10

25

-3

50

-

+10

50

µA

kΩ

%

R_i

-2 V ≤ V_CANLx≤ +7 V;

-2 V ≤ V_CANHx≤ +7 V

40

-

ΔR_i

R_i(dif)

C_i(cm)

C_i(dif)

0 V ≤ V_CANLx≤ +5 V;

0 V ≤ V_CANHx≤ +5 V

+3

differential input resistance -2 V ≤ V_CANL≤ +7 V;

-2 V ≤ V_CANH≤ +7 V

80

-

100

20

kΩ

pF

[4]

common-mode input

capacitance

differential input capacitance

-

10

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TJR1448

Dual high-speed CAN transceiver with Standby mode

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Temperature detection

[4]

T_j(sd)

shutdown junction

temperature

180

175

-

200

195

°C

T_j(sd)rel

release shutdown junction

temperature

[1] All parameters are guaranteed over the virtual junction temperature range by design. Factory testing uses correlated test conditions to cover the specified

temperature and power supply voltage ranges.

[2] Undervoltage is detected between min and max values. Undervoltage is guaranteed to be detected below min value and guaranteed not to be detected

above max value.

[3] V_CCin TJR1448B

[4] Not tested in production; guaranteed by design.

[5] The test circuit used to measure the bus output voltage symmetry and the common-mode voltages (which includes C_SPLIT) is shown in Figure 15.

[6] See Figure 11

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TJR1448

Dual high-speed CAN transceiver with Standby mode

11 Dynamic characteristics

Table 9.ꢀDynamic characteristics

T_vj= -40 °C to +175 °C; V_CC= 4.5 V to 5.5 V; V_IO= 2.95 V to 5.5 V (TJR1448A/C); R_L= 60 Ω unless specified otherwise; all

voltages are defined with respect to ground.^[1]

Symbol

Parameter

Conditions

Min

Typ

Max Unit

CAN timing characteristics; t_bit(TXD)> 200 ns; see Figure 9, Figure 10 and Figure 14

t_{d(TXD-busdom)}delay time from TXD to bus dominant

t_{d(TXD-busrec)}delay time from TXD to bus recessive

t_{d(busdom-RXD)}delay time from bus dominant to RXD

t_{d(busrec-RXD)}delay time from bus recessive to RXD

t_d(TXDL-RXDL)delay time from TXD LOW to RXD LOW

t_d(TXDH-RXDH)delay time from TXD HIGH to RXD HIGH

Normal mode

-

102.5 ns

127.5 ns

230

ns

CAN FD timing characteristics according to ISO 11898-2:2016; see Figure 10 and Figure 14

t_bit(bus)

transmitted recessive bit width

receiver timing symmetry

bit time on pin RXD

t_bit(TXD)= 500 ns

t_bit(TXD)= 200 ns

t_bit(TXD)= 500 ns

t_bit(TXD)= 200 ns

t_bit(TXD)= 500 ns

t_bit(TXD)= 200 ns

435

155

-65

-

530

210

+40

+15

550

220

ns

Δt_rec

-45

t_bit(RXD)

400

120

Dominant time-out time; pins TXD1 and TXD2

t_to(dom)TXDTXD dominant time-out time

[2]

[3]

V_TXD= 0 V; Normal mode

0.8

-

9

ms

Bus wake-up times; pins CANH1, CANH2 and CANL1, CANL2; see Figure 7 and Figure 8

[2]

[4]

t_wake(busdom)bus dominant wake-up time

Standby mode

0.5

0.8

-

1.8

9

µs

ms

µs

[2]

[4]

t_wake(busrec)

t_to(wake)bus

t_{fltr(wake)bus}

bus recessive wake-up time

bus wake-up time-out time

bus wake-up filter time

Standby mode

[2]

[3]

Standby mode

[2]

TJR1448A/B; Standby mode

1.8

Mode transitions

[2]

t_t(moch)

mode change transition time

-

50

1

µs

ms

µs

t_startup

start-up time

-

[2]

[5]

t_startup(RXD)

RXD start-up time

to Standby mode after wake-

up

4

20

IO filter; pins STB1 and STB2

t_fltr(IO)IO filter time

Undervoltage detection; see Figure 4 and Figure 5

[6]

1

-

5

µs

[2]

t_det(uv)

undervoltage detection time

on pin VCC

-

30

µs

t_uvd(swoff)

switch-off undervoltage detection time

on pin VCC; TJR1448B

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TJR1448

Dual high-speed CAN transceiver with Standby mode

Symbol

Parameter

Conditions

Min

Typ

Max Unit

[2]

on pin VIO; TJR1448A/C

on pin VCC

30

50

µs

t_rec(uv)

undervoltage recovery time

-

[1] All parameters are guaranteed over the junction temperature range by design. Factory testing uses correlated test conditions to cover the specified

temperature and power supply voltage ranges.

[2] Not tested in production; guaranteed by design.

[3] Time-out occurs between the min and max values. Time-out is guaranteed not to occur below the min value; time-out is guaranteed to occur above the

max value.

[4] A dominant/recessive phase shorter than the min value is guaranteed not be seen as a dominant/recessive bit; a dominant/recessive phase longer than

the max value is guaranteed to be seen as a dominant/recessive bit.

[5] When a wake-up is detected, RXD start-up time is between the min and max values. RXD cannot be relied on below the min value; RXD can be relied on

above the max value; see Figure 7 and Figure 8.

[6] Pulses shorter than the min value are guaranteed to be filtered out; pulses longer than the max value are guaranteed to be processed.

HIGH

70 %

TXD

30 %

LOW

CANH

CANL

dominant

0.9 V

V

O(dif)

0.5 V

recessive

HIGH

70 %

RXD

30 %

LOW

t

d(TXD-busrec)

d(TXD-busdom)

t

d(busdom-RXD)

t

d(busrec-RXD)

aaa-029311

Figure 9.ꢀCAN transceiver timing diagram

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TJR1448

Dual high-speed CAN transceiver with Standby mode

70 %

TXD

30 %

t

5 x t

bit(TXD)

d(TXDL-RXDL)

t

bit(TXD)

0.9 V

V

O(dif)

0.5 V

t

bit(bus)

70 %

RXD

30 %

t

d(TXDH-RXDH)

t

bit(RXD)

aaa-029312

Figure 10.ꢀCAN FD timing definitions according to ISO 11898-2:2016

CANH

CANL

V

cm(step)

V

CANH

+ V

CANL

V

cm(p-p)

aaa-037830

Figure 11.ꢀCAN bus common-mode voltage

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TJR1448

Dual high-speed CAN transceiver with Standby mode

12 Application information

12.1 Application diagrams

3.3 V

BAT

(1)

on/off control

(1)

5 V

VCC

VIO

11

3

VDD

CANH1

Pxx

Pyy

Pzz

13

STB1

STB2

14

8

TXD1

RXD1

MICRO-

CONTROLLER

1

4

TX0

RX0

CANL1

CANH2

12

10

TXD2

RXD2

6

7

TX1

RX1

GND

2

5

CANL2

9

aaa-038145

(1) Optional, depends on regulator.

Figure 12.ꢀTypical TJR1448A/C application with a 3.3 V microcontroller

TJR1448

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TJR1448

Dual high-speed CAN transceiver with Standby mode

5 V

BAT

(1)

VCC

3

CANH1

13

STB1

STB2

VDD

14

11

Pxx

Pyy

TXD1

RXD1

1

4

TX0

RX0

MICRO-

CONTROLLER

CANL1

CANH2

12

10

TXD2

RXD2

5

8

TX1

RX1

GND

2

6

CANL2

9

aaa-038146

(1) Optional, depends on regulator.

Figure 13.ꢀTypical TJR1448B application with a 5 V microcontroller

12.2 Application hints

Further information on the application of the TJR1448 can be found in NXP application

hints AH2002 'TJx144x/TJx146x Application Hints', available on request from NXP

Semiconductors.

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TJR1448

Dual high-speed CAN transceiver with Standby mode

13 Test information

TXD

RXD

CANH

CANL

R

60 Ω

C

L

100 pF

L

15 pF

aaa-030850

Figure 14.ꢀCAN transceiver timing test circuit

TXD

RXD

CANH

CANL

30 Ω

f

TXD

C

4.7 nF

SPLIT

aaa-030851

Figure 15.ꢀTest circuit for measuring transceiver driver symmetry

13.1 Quality information

This product has been qualified in accordance with the Automotive Electronics Council

(AEC) standard Q100 Rev-H - Failure mechanism based stress test qualification for

integrated circuits, and is suitable for use in automotive applications.

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Dual high-speed CAN transceiver with Standby mode

14 Package outline

SO14: plastic small outline package; 14 leads; body width 3.9 mm

SOT108-1

D

E

A

X

v

c

y

H

M

A

E

Z

8

14

Q

A

2

A

(A )

3

A

1

pin 1 index

θ

L

p

L

1

7

e

detail X

w

M

b

p

0

2.5

scale

5 mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A

(1)

UNIT

A

b

c

D

E

e

H

L

p

Q

v

w

y

Z

θ

1

2

3

p

E

max.

0.25

0.10

1.45

1.25

0.49

0.36

0.25

0.19

8.75

8.55

4.0

3.8

6.2

5.8

1.0

0.4

0.7

0.6

0.7

0.3

mm

1.75

1.27

0.05

1.05

0.25

0.1

0.25

0.01

8^o

0^o

0.010 0.057

0.004 0.049

0.019 0.0100 0.35

0.014 0.0075 0.34

0.16

0.15

0.244

0.228

0.039 0.028

0.016 0.024

0.028

0.012

inches

0.041

0.01 0.01 0.004

0.069

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

99-12-27

03-02-19

SOT108-1

076E06

MS-012

Figure 16.ꢀPackage outline SOT108-1 (SO14)

TJR1448

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Product data sheet

Rev. 1 — 7 September 2020

28 / 37

NXP Semiconductors

TJR1448

Dual high-speed CAN transceiver with Standby mode

HVSON14: plastic, thermal enhanced very thin small outline package; no leads;

14 terminals; body 3 x 4.5 x 0.85 mm

SOT1086-2

X

B

A

E

D

A

1

c

terminal 1

index area

detail X

e

1

terminal 1

index area

C

v

w

C A

C

B

e

b

y

1

y

C

1

7

L

k

E

h

14

8

D

h

0

2.5

5 mm

w

scale

Dimensions

Unit

A

b

c

D

h

E

e

1

k

L

v

y

1

h

max 1.00 0.05 0.35

mm nom 0.85 0.03 0.32 0.2 4.5 4.20 3.0 1.60 0.65 3.9 0.30 0.40 0.1 0.05 0.05 0.1

min 0.80 0.00 0.29 4.4 4.15 2.9 1.55 0.25 0.35

4.6 4.25 3.1 1.65

0.35 0.45

sot1086-2

References

Outline

version

European

projection

Issue date

IEC

- - -

JEDEC

MO-229

JEITA

- - -

10-07-14

10-07-15

SOT1086-2

Figure 17.ꢀPackage outline SOT1086-2 (HVSON14)

TJR1448

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TJR1448

Dual high-speed CAN transceiver with Standby mode

15 Handling information

All input and output pins are protected against ElectroStatic Discharge (ESD) under

normal handling. When handling ensure that the appropriate precautions are taken as

described in JESD625-A or equivalent standards.

16 Soldering of SMD packages

This text provides a very brief insight into a complex technology. A more in-depth account

of soldering ICs can be found in Application Note AN10365 “Surface mount reflow

soldering description”.

16.1 Introduction to soldering

Soldering is one of the most common methods through which packages are attached

to Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides

both the mechanical and the electrical connection. There is no single soldering method

that is ideal for all IC packages. Wave soldering is often preferred when through-hole

and Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is

not suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high

densities that come with increased miniaturization.

16.2 Wave and reflow soldering

Wave soldering is a joining technology in which the joints are made by solder coming

from a standing wave of liquid solder. The wave soldering process is suitable for the

following:

• Through-hole components

• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board

Not all SMDs can be wave soldered. Packages with solder balls, and some leadless

packages which have solder lands underneath the body, cannot be wave soldered. Also,

leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,

due to an increased probability of bridging.

The reflow soldering process involves applying solder paste to a board, followed by

component placement and exposure to a temperature profile. Leaded packages,

packages with solder balls, and leadless packages are all reflow solderable.

Key characteristics in both wave and reflow soldering are:

• Board specifications, including the board finish, solder masks and vias

• Package footprints, including solder thieves and orientation

• The moisture sensitivity level of the packages

• Package placement

• Inspection and repair

• Lead-free soldering versus SnPb soldering

16.3 Wave soldering

Key characteristics in wave soldering are:

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NXP Semiconductors

TJR1448

Dual high-speed CAN transceiver with Standby mode

• Process issues, such as application of adhesive and flux, clinching of leads, board

transport, the solder wave parameters, and the time during which components are

exposed to the wave

• Solder bath specifications, including temperature and impurities

16.4 Reflow soldering

Key characteristics in reflow soldering are:

• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads

to higher minimum peak temperatures (see Figure 18) than a SnPb process, thus

reducing the process window

• Solder paste printing issues including smearing, release, and adjusting the process

window for a mix of large and small components on one board

• Reflow temperature profile; this profile includes preheat, reflow (in which the board

is heated to the peak temperature) and cooling down. It is imperative that the peak

temperature is high enough for the solder to make reliable solder joints (a solder

paste characteristic). In addition, the peak temperature must be low enough that the

packages and/or boards are not damaged. The peak temperature of the package

depends on package thickness and volume and is classified in accordance with

Table 10 and Table 11

Table 10.ꢀSnPb eutectic process (from J-STD-020D)

Package thickness (mm)

Package reflow temperature (°C)

Volume (mm³)

< 350

235

≥ 350

< 2.5

≥ 2.5

220

Table 11.ꢀLead-free process (from J-STD-020D)

Package thickness (mm)

Package reflow temperature (°C)

Volume (mm³)

< 350

260

350 to 2000

> 2000

260

< 1.6

260

250

245

1.6 to 2.5

> 2.5

260

245

250

245

Moisture sensitivity precautions, as indicated on the packing, must be respected at all

times.

Studies have shown that small packages reach higher temperatures during reflow

soldering, see Figure 18.

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NXP Semiconductors

TJR1448

Dual high-speed CAN transceiver with Standby mode

maximum peak temperature

= MSL limit, damage level

temperature

minimum peak temperature

= minimum soldering temperature

peak

temperature

time

001aac844

MSL: Moisture Sensitivity Level

Figure 18.ꢀTemperature profiles for large and small components

For further information on temperature profiles, refer to Application Note AN10365

“Surface mount reflow soldering description”.

17 Soldering of HVSON packages

Section 16 contains a brief introduction to the techniques most commonly used to solder

Surface Mounted Devices (SMD). A more detailed discussion on soldering HVSON

leadless package ICs can be found in the following application note:

• AN10365 “Surface mount reflow soldering description”

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Dual high-speed CAN transceiver with Standby mode

18 Appendix: ISO 11898-2:2016 parameter cross-reference list

Table 12.ꢀISO 11898-2:2016 to NXP data sheet parameter conversion

ISO 11898-2:2016

NXP data sheet

Notation Symbol Parameter

Parameter

HS-PMA dominant output characteristics

Single ended voltage on CAN_H

Single ended voltage on CAN_L

Differential voltage on normal bus load

Differential voltage on effective resistance during arbitration

Optional: Differential voltage on extended bus load range

HS-PMA driver symmetry

V_{CAN_H}

V_{CAN_L}

V_Diff

V_O(dom)

dominant output voltage

differential output voltage

V_O(dif)

Driver symmetry

V_SYM

V_TXsym

transmitter voltage symmetry

short-circuit output current

Maximum HS-PMA driver output current

Absolute current on CAN_H

I_{CAN_H}

I_{CAN_L}

I_O(sc)

Absolute current on CAN_L

HS-PMA recessive output characteristics, bus biasing active/inactive

Single ended output voltage on CAN_H

Single ended output voltage on CAN_L

Differential output voltage

V_{CAN_H}

V_{CAN_L}

V_Diff

V_O(rec)

recessive output voltage

differential output voltage

TXD dominant time-out time

V_O(dif)

Optional HS-PMA transmit dominant time-out

Transmit dominant time-out, long

t_dom

t_to(dom)TXD

Transmit dominant time-out, short

HS-PMA static receiver input characteristics, bus biasing active/inactive

Recessive state differential input voltage range

Dominant state differential input voltage range

V_Diff

V_th(RX)dif

differential receiver threshold

voltage

V_rec(RX)

receiver recessive voltage

receiver dominant voltage

V_dom(RX)

HS-PMA receiver input resistance (matching)

Differential internal resistance

R_Diff

R_{CAN_H}

R_{CAN_L}

R_i(dif)

R_i

differential input resistance

input resistance

Single ended internal resistance

Matching of internal resistance

HS-PMA implementation loop delay requirement

Loop delay

MR

ΔR_i

input resistance deviation

t_Loop

t_d(TXDH-RXDH)delay time from TXD HIGH to

RXD HIGH

t_d(TXDL-RXDL)

delay time from TXD LOW to

RXD LOW

TJR1448

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Product data sheet

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NXP Semiconductors

TJR1448

Dual high-speed CAN transceiver with Standby mode

ISO 11898-2:2016

Parameter

NXP data sheet

Notation Symbol

Parameter

Optional HS-PMA implementation data signal timing requirements for use with bit rates above 1 Mbit/s up to 2

Mbit/s and above 2 Mbit/s up to 5 Mbit/s

Transmitted recessive bit width @ 2 Mbit/s / @ 5 Mbit/s,

intended

t_Bit(Bus)

t_bit(bus)

transmitted recessive bit width

Received recessive bit width @ 2 Mbit/s / @ 5 Mbit/s

Receiver timing symmetry @ 2 Mbit/s / @ 5 Mbit/s

HS-PMA maximum ratings of V_{CAN_H}, V_{CAN_L}and V_Diff

Maximum rating V_Diff

t_Bit(RXD)

Δt_Rec

t_bit(RXD)

Δt_rec

bit time on pin RXD

receiver timing symmetry

V_Diff

V_(CANH-CANL)voltage between pin CANH and

pin CANL

General maximum rating V_{CAN_H}and V_{CAN_L}

V_{CAN_H}

V_{CAN_L}

V_x

voltage on pin x

Optional: Extended maximum rating VCAN_H and VCAN_L

HS-PMA maximum leakage currents on CAN_H and CAN_L, unpowered

Leakage current on CAN_H, CAN_L

I_{CAN_H}

I_{CAN_L}

I_L

leakage current

HS-PMA bus biasing control timings

CAN activity filter time, long

CAN activity filter time, short

Wake-up time-out, short

[1]

t_Filter

t_wake(busdom)

t_wake(busrec)

bus dominant wake-up time

bus recessive wake-up time

t_Wake

t_to(wake)bus

bus wake-up time-out time

Wake-up time-out, long

[1] t_{fltr(wake)bus}- bus wake-up filter time, in devices with basic wake-up functionality

TJR1448

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NXP Semiconductors

TJR1448

Dual high-speed CAN transceiver with Standby mode

19 Legal information

19.1 Data sheet status

Document status^[1][2]

Product status^[3]

Definition

Objective [short] data sheet

Development

This document contains data from the objective specification for product

development.

Preliminary [short] data sheet

Product [short] data sheet

Qualification

Production

This document contains data from the preliminary specification.

This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term 'short data sheet' is explained in section "Definitions".

[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple

devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

19.2 Definitions

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes

no representation or warranty that such applications will be suitable

for the specified use without further testing or modification. Customers

are responsible for the design and operation of their applications and

products using NXP Semiconductors products, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suitable and fit for the customer’s applications

and products planned, as well as for the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with

their applications and products. NXP Semiconductors does not accept any

liability related to any default, damage, costs or problem which is based

on any weakness or default in the customer’s applications or products, or

the application or use by customer’s third party customer(s). Customer is

responsible for doing all necessary testing for the customer’s applications

and products using NXP Semiconductors products in order to avoid a

default of the applications and the products or of the application or use by

customer’s third party customer(s). NXP does not accept any liability in this

respect.

Draft — A draft status on a document indicates that the content is still

under internal review and subject to formal approval, which may result

in modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included in a draft version of a document and shall have no

liability for the consequences of use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is

intended for quick reference only and should not be relied upon to contain

detailed and full information. For detailed and full information see the

relevant full data sheet, which is available on request via the local NXP

Semiconductors sales office. In case of any inconsistency or conflict with the

short data sheet, the full data sheet shall prevail.

Product specification — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product

is deemed to offer functions and qualities beyond those described in the

Product data sheet.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those

given in the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

19.3 Disclaimers

Limited warranty and liability — Information in this document is believed

to be accurate and reliable. However, NXP Semiconductors does not

give any representations or warranties, expressed or implied, as to the

accuracy or completeness of such information and shall have no liability

for the consequences of use of such information. NXP Semiconductors

takes no responsibility for the content in this document if provided by an

information source outside of NXP Semiconductors. In no event shall NXP

Semiconductors be liable for any indirect, incidental, punitive, special or

consequential damages (including - without limitation - lost profits, lost

savings, business interruption, costs related to the removal or replacement

of any products or rework charges) whether or not such damages are based

on tort (including negligence), warranty, breach of contract or any other

legal theory. Notwithstanding any damages that customer might incur for

any reason whatsoever, NXP Semiconductors’ aggregate and cumulative

liability towards customer for the products described herein shall be limited

in accordance with the Terms and conditions of commercial sale of NXP

Semiconductors.

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

No offer to sell or license — Nothing in this document may be interpreted

or construed as an offer to sell products that is open for acceptance or

the grant, conveyance or implication of any license under any copyrights,

patents or other industrial or intellectual property rights.

Suitability for use in automotive applications — This NXP

Semiconductors product has been qualified for use in automotive

applications. Unless otherwise agreed in writing, the product is not designed,

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

Right to make changes — NXP Semiconductors reserves the right to

make changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

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NXP Semiconductors

TJR1448

Dual high-speed CAN transceiver with Standby mode

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors and its suppliers accept no liability for

inclusion and/or use of NXP Semiconductors products in such equipment or

applications and therefore such inclusion and/or use is at the customer's own

risk.

Security — While NXP Semiconductors has implemented advanced

security features, all products may be subject to unidentified vulnerabilities.

Customers are responsible for the design and operation of their applications

and products to reduce the effect of these vulnerabilities on customer’s

applications and products, and NXP Semiconductors accepts no liability for

any vulnerability that is discovered. Customers should implement appropriate

design and operating safeguards to minimize the risks associated with their

applications and products.

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

19.4 Trademarks

Notice: All referenced brands, product names, service names and

trademarks are the property of their respective owners.

Translations — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

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Product data sheet

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NXP Semiconductors

TJR1448

Dual high-speed CAN transceiver with Standby mode

Contents

1

General description ............................................ 1

1.1

2

TJR1448 variants .............................................. 1

Features and benefits .........................................1

General .............................................................. 1

Predictable and fail-safe behavior ..................... 2

Low-power management ................................... 2

Protection ...........................................................2

Quick reference data .......................................... 3

Ordering information .......................................... 4

Block diagrams ................................................... 5

Pinning information ............................................ 7

Pinning ...............................................................7

Pin description ...................................................8

Functional description ......................................10

Operating modes ............................................. 10

Off mode ..........................................................12

Standby mode ................................................. 12

Normal mode ...................................................13

Operating modes and gap-free operation ........ 13

Remote wake-up (via the CAN bus) ................ 14

Fail-safe features .............................................16

TXD dominant timeout function ....................... 16

Internal biasing of TXDx and STBx input pins ...16

Undervoltage detection on pins VCC and

2.1

2.2

2.3

2.4

3

4

5

6

6.1

6.2

7

7.1

7.1.1

7.1.2

7.1.3

7.1.4

7.2

7.3

7.3.1

7.3.2

7.3.3

VIO ...................................................................16

Overtemperature protection .............................16

I/O levels ..........................................................16

Limiting values ..................................................17

Thermal characteristics ....................................18

Static characteristics ........................................18

Dynamic characteristics ...................................22

Application information ....................................25

Application diagrams ....................................... 25

Application hints .............................................. 26

Test information ................................................27

Quality information ...........................................27

Package outline .................................................28

Handling information ........................................30

Soldering of SMD packages .............................30

Introduction to soldering .............................

Wave and reflow soldering .........................

Wave soldering ...........................................

Reflow soldering .........................................

Soldering of HVSON packages ........................32

Appendix: ISO 11898-2:2016 parameter

cross-reference list ...........................................33

Legal information ..............................................35

7.3.4

7.3.5

8

9

10

11

12

12.1

12.2

13

13.1

14

15

16

16.1

16.2

16.3

16.4

17

18

19

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section 'Legal information'.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 7 September 2020

Document identifier: TJR1448


型号：	TJR1448CTK
厂家：	NXP
描述：	Dual high-speed CAN transceiver with Standby mode
文件：	总37页 (文件大小：384K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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