XC7SET32GV,125 [NXP]
XC7SET32 - 2-input OR gate TSOP 5-Pin;
| 型号： | XC7SET32GV,125 |
| 厂家： | 
NXP |
| 描述： | XC7SET32 - 2-input OR gate TSOP 5-Pin PC 光电二极管 逻辑集成电路 |
| 文件： | 总11页 (文件大小：58K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
XC7SET32
2-input OR gate
Rev. 01 — 3 September 2009
Product data sheet
1. General description
XC7SET32 is a high-speed Si-gate CMOS device. It provides a 2-input OR function.
2. Features
I Symmetrical output impedance
I High noise immunity
I ESD protection:
N HBM JESD22-A114E: exceeds 2000 V
N MM JESD22-A115-A: exceeds 200 V
N CDM JESD22-C101C: exceeds 1000 V
I Low power dissipation
I Balanced propagation delays
I SOT353-1 and SOT753 package options
I Specified from −40 °C to +125 °C
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range
−40 °C to +125 °C
Name
Description
Version
XC7SET32GW
XC7SET32GV
TSSOP5
plastic thin shrink small outline package; 5 leads; SOT353-1
body width 1.25 mm
−40 °C to +125 °C
SC-74A
plastic surface-mounted package; 5 leads
SOT753
XC7SET32
NXP Semiconductors
2-input OR gate
4. Marking
Table 2.
Marking codes
Type number
XC7SET32GW
XC7SET32GV
Marking code[1]
gG
g32
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
1
2
1
2
B
A
≥1
Y
4
4
mna165
mna164
Fig 1. Logic symbol
Fig 2. IEC logic symbol
B
A
Y
mna166
Fig 3. Logic diagram
6. Pinning information
6.1 Pinning
XC7SET32
1
2
3
5
4
B
A
V
Y
CC
GND
001aak116
Fig 4. Pin configuration SOT353-1 (TSSOP5) and SOT753 (SC-74A)
XC7SET32_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 3 September 2009
2 of 11
XC7SET32
NXP Semiconductors
2-input OR gate
6.2 Pin description
Table 3.
Pin description
Symbol
Pin
1
Description
data input
B
A
2
data input
GND
Y
3
ground (0 V)
data output
supply voltage
4
VCC
5
7. Functional description
Table 4.
Function table
H = HIGH voltage level; L = LOW voltage level
Inputs
Output
A
L
B
L
Y
L
L
H
L
H
H
H
H
H
H
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VCC
VI
Parameter
Conditions
Min
−0.5
−0.5
−20
-
Max
+7.0
+7.0
-
Unit
V
supply voltage
input voltage
V
IIK
input clamping current
output clamping current
output current
VI < −0.5 V
mA
mA
mA
mA
mA
°C
[1]
IOK
VO < −0.5 V or VO > VCC + 0.5 V
−0.5 V < VO < VCC + 0.5 V
±20
±25
75
IO
-
ICC
supply current
-
IGND
Tstg
Ptot
ground current
−75
−65
-
-
storage temperature
total power dissipation
+150
250
[2]
Tamb = −40 °C to +125 °C
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For both TSSOP5 and SC-74A packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
XC7SET32_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 3 September 2009
3 of 11
XC7SET32
NXP Semiconductors
2-input OR gate
9. Recommended operating conditions
Table 6.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions
Min
4.5
0
Typ
Max
5.5
Unit
V
VCC
VI
supply voltage
5.0
input voltage
-
5.5
V
VO
output voltage
0
-
VCC
+125
20
V
Tamb
∆t/∆V
ambient temperature
input transition rise and fall rate
−40
-
+25
-
°C
ns/V
10. Static characteristics
Table 7.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 °C
−40 °C to +85 °C −40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
VIH
VIL
HIGH-level
input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
2.0
-
-
2.0
-
2.0
-
V
V
LOW-level
-
-
0.8
-
0.8
-
0.8
input voltage
VOH
HIGH-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = −50 µA
4.4
4.5
-
-
-
4.4
3.8
-
-
4.4
-
-
V
V
IO = −8.0 mA
3.94
3.70
VOL
LOW-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 50 µA
-
-
-
0
-
0.1
0.36
0.1
-
-
-
0.1
0.44
1.0
-
-
-
0.1
0.55
2.0
V
IO = 8.0 mA
V
II
input leakage VI = 5.5 V or GND;
current CC = 0 V to 5.5 V
-
µA
V
ICC
∆ICC
supply current VI = VCC or GND; IO = 0 A;
CC = 5.5 V
-
-
-
-
1.0
-
-
10
-
-
40
µA
V
additional
per input pin; VI = 3.4 V;
1.35
1.5
1.5
mA
supply current other inputs at VCC or GND;
IO = 0 A; VCC = 5.5 V
CI
input
-
1.5
10
-
10
-
10
pF
capacitance
XC7SET32_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 3 September 2009
4 of 11
XC7SET32
NXP Semiconductors
2-input OR gate
11. Dynamic characteristics
Table 8.
Dynamic characteristics
GND = 0 V. For waveform see Figure 5. For test circuit see Figure 6.
Symbol Parameter Conditions 25 °C
Min Typ Max
−40 °C to +85 °C −40 °C to +125 °C Unit
Min
Max
Min
Max
[1]
[2]
tpd
propagation A and B to Y;
delay
see Figure 5;
V
CC = 4.5 V to 5.5 V
CL = 15 pF
-
-
-
3.3
4.8
17
6.9
7.9
-
1.0
1.0
-
8.0
9.0
-
1.0
1.0
-
9.0
10
-
ns
ns
pF
CL = 50 pF
[3]
CPD
power
per buffer;
dissipation
CL = 50 pF; f = 1 MHz;
capacitance VI = GND to VCC
[1] tpd is the same as tPLH and tPHL
.
[2] Typical values are measured at VCC = 5.0 V.
[3] CPD is used to determine the dynamic power dissipation PD (µW).
PD = CPD × VCC2 × fi + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V.
XC7SET32_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 3 September 2009
5 of 11
XC7SET32
NXP Semiconductors
2-input OR gate
12. Waveforms
V
A, B input
M
t
t
PLH
PHL
V
Y output
M
mna167
Measurement points are given in Table 9.
Fig 5. The input (A and B) to output (Y) propagation delays
Table 9. Measurement points
Type number
Input
Output
VI
VM
VM
XC7SET32
GND to 3.0 V
1.5 V
0.5 × VCC
V
CC
V
V
O
I
PULSE
GENERATOR
DUT
C
L
R
T
mna101
Test data is given in Table 10.
Definitions for test circuit:
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
Fig 6. Load circuitry for switching times
Table 10. Test data
Type
Input
VI
Load
Test
tr, tf
CL
XC7SET32
3.0 V
≤ 3.0 ns
15 pF, 50 pF
tPLH, tPHL
XC7SET32_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 3 September 2009
6 of 11
XC7SET32
NXP Semiconductors
2-input OR gate
13. Package outline
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm
SOT353-1
D
E
A
X
c
y
H
v
M
A
E
Z
5
4
A
2
A
(A )
3
A
1
θ
L
L
p
1
3
e
w M
b
p
detail X
e
1
0
1.5
3 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
A
A
A
b
c
D
E
e
e
1
H
L
L
p
UNIT
v
w
y
Z
θ
1
2
3
p
E
max.
0.1
0
1.0
0.8
0.30
0.15
0.25
0.08
2.25
1.85
1.35
1.15
2.25
2.0
0.46
0.21
0.60
0.15
7°
0°
mm
1.1
0.65
1.3
0.15
0.425
0.3
0.1
0.1
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
00-09-01
03-02-19
SOT353-1
MO-203
SC-88A
Fig 7. Package outline SOT353-1 (TSSOP5)
XC7SET32_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 3 September 2009
7 of 11
XC7SET32
NXP Semiconductors
2-input OR gate
Plastic surface-mounted package; 5 leads
SOT753
D
B
E
A
X
y
H
v
M
A
E
5
4
Q
A
A
1
c
L
p
1
2
3
detail X
e
b
p
w
M B
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A
b
c
D
E
e
H
L
Q
v
w
y
p
1
p
E
0.100
0.013
0.40
0.25
1.1
0.9
0.26
0.10
3.1
2.7
1.7
1.3
3.0
2.5
0.6
0.2
0.33
0.23
mm
0.95
0.2
0.2
0.1
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
02-04-16
06-03-16
SOT753
SC-74A
Fig 8. Package outline SOT753 (SC-74A)
XC7SET32_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 3 September 2009
8 of 11
XC7SET32
NXP Semiconductors
2-input OR gate
14. Abbreviations
Table 11. Abbreviations
Acronym
CDM
DUT
Description
Charged Device Model
Device Under Test
ElectroStatic Discharge
Human Body Model
Machine Model
ESD
HBM
MM
15. Revision history
Table 12. Revision history
Document ID
Release date
20090903
Data sheet status
Change notice
Supersedes
XC7SET32_1
Product data sheet
-
-
XC7SET32_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 3 September 2009
9 of 11
XC7SET32
NXP Semiconductors
2-input OR gate
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
16.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
XC7SET32_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 3 September 2009
10 of 11
XC7SET32
NXP Semiconductors
2-input OR gate
18. Contents
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 1
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
7
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
Dynamic characteristics . . . . . . . . . . . . . . . . . . 5
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 9
8
9
10
11
12
13
14
15
16
Legal information. . . . . . . . . . . . . . . . . . . . . . . 10
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
16.1
16.2
16.3
16.4
17
18
Contact information. . . . . . . . . . . . . . . . . . . . . 10
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 3 September 2009
Document identifier: XC7SET32_1
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