ML64P168 [OKI]
4-Bit Microcontroller with Built-in RC Oscillation Type A/D Converter and LCD Driver; 4 -bit微控制器内建RC振荡型A / D转换器和LCD驱动器型号: | ML64P168 |
厂家: | OKI ELECTRONIC COMPONETS |
描述: | 4-Bit Microcontroller with Built-in RC Oscillation Type A/D Converter and LCD Driver |
文件: | 总51页 (文件大小:302K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
FEDL64P168-01
This version: Sep. 27,1999
Previous version: Jun. 22,1999
Semiconductor
ML64P168
4-Bit Microcontroller with Built-in RC Oscillation Type A/D Converter and LCD Driver
GENERAL DESCRIPTION
The ML64P168 is a one-time-programmable ROM-version product, which has one-time PROM (OTP)
as internal program memory. On the other hand, the ML64168 is a mask ROM-version product, which
has mask ROM as internal program memory.
Unlike the mask ROM-version product (ML64168), the ML64P168 cannot be supplied in the form of a
chip.
The ML64P168 has two operation modes, microcontroller operation mode and PROM mode. The
microcontroller operation mode is used to operate the ML64P168 like a ML64168 and the PROM
mode is used to program or read the PROM.
The ML64P168 is a low power 4-bit microcontroller incorporating the Oki’s original CPU core nX-
4/30.
The ML64P168 provides a minimum instruction execution time of 4.3µs (@700kHz).
The ML64P168 contains 8160-byte program memory, 512-nibble data memory, three 4-bit input-output
ports, 4-bit input port, 4-bit output port, 2-channel RC oscillation type A/D converter, LCD driver for
up to 120 segments, and buzzer output port.
APPLICATION
The ML64P168 is best suited for low power, high precision thermometers and hygrometers.
FEATURES
∙ Processing speed
Minimum instruction execution time
: 4.3 µs @700 kHz
91.6 µs @32.768 kHz
∙ Clock generation circuit
Low-speed clock
: 32.768 kHz crystal oscillator
High-speed clock
: 700 kHz RC oscillator ( with an external resistor )
CPU clock is selectable as Low-speed clock / High-speed clock by software.
∙ Operating voltage
: 1.5 V spec. / 3.0 V spec. ( selectable by mask option )
1.45 to 1.70 V (1.5V spec.)
2.7 to 3.5 V (3.0V spec.)
∙ Operating temperature
: 0 to +65°C
The information contained herein can change without notice owing to product and/or technical improvements.
Before using the product, please make sure that the information being referred to is up-to-date.
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ML64P168
∙ Memory space
Internal program memory
Internal data memory
: 8160 bytes
: 512 nibbles
∙ RC oscillation type A/D converter
: 2 channels
Time division 2-channel method
: 1 / ( 104 × 8 ) × 1
: 1 / 214 × 1
Counter A
Counter B
∙ I/O port
Input-output port
Input port
Output port
: 3 ports × 4 bits
: 1 port × 4 bits
: 1 port × 4 bits
( 8 out of the 34 LCD driver outputs can be used as
output-only ports by mask option. )
: 34 outputs
: 120 segments (max.)
: 93 segments (max.)
∙ LCD driver
(1) At 1/4 duty and 1/3 bias
(2) At 1/3 duty and 1/3 bias
(3) At 1/2 duty and 1/2 bias
: 64 segments (max.)
Voltage Regulator for LCD Driver (selectable by mask option)
The LCD panel display is stable regardless of temporary supply voltage drop, because the
voltage generated by the voltage regulator for LCD driver is supplied to the bias voltage
generator as a reference voltage.
LCD Operating Voltage
When the voltage regulator for LCD driver is used
: 3.6 V ( Duty cycle = 1/4 or 1/3 )
: 2.4 V ( Duty cycle = 1/2 )
When the voltage regulator for LCD driver is not used
: 4.5 V ( Duty cycle = 1/4 or 1/3 )
: 3.0 V ( Duty cycle = 1/2 )
: 1 output ( 4 output modes selectable )
: Synchronous 8-bit transfer
∙ Buzzer driver
∙ Serial port
Selectable as external clock / internal clock
Selectable as MSB first / LSB first
: 2 channels ( 32Hz, 64Hz, 128Hz, 256Hz )
: 1 ( incorporated into the input-only port )
∙ Capture circuit
∙ Battery check circuit
∙ Watchdog timer
∙ Interrupt
External interrupt
Internal interrupt
∙ Package:
: 2 sources
: 8 sources
80-pin plastic QFP ( QFP80-P-1420-0.80-BK )
Product name : ML64P168 - xxxGP ( written PROM )
ML64P168 - NGP ( blanked PROM )
80-pin plastic QFP ( QFP80-P-1414-0.65-K )
Product name : ML64P168 - xxxGA ( written PROM )
ML64P168 - NGA ( blanked PROM )
xxx indicates a code number.
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Semiconductor
ML64P168
PROGRAM DEVELOPMENT ENVIRONMENT
∙ Structured Assembler
∙ In Circuit Emulator
∙ Debugger
:
:
:
SASM64K
EASE64168
DT64K
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ML64P168
BLOCK DIAGRAM
CPU CORE: nX-4/30
VPP
IR
DATA BUS ( 8 )
DECORDER
TR2
TR0
TR1
BSR
MIEF
HALT
IR
PROM
8160
Bytes
ROMR
PCH
PCM PCL
C
ALU
H
L
X Y
B A
DATA BUS ( 8 )
TIMING
CONTROLLER
SP
RAM
512
Nibbles
BC
INT
5
OSC1
OSC2
XT
XT
SIOP
V
V
V
DD1
DD2
DD3
2CLK
TBC
BIAS
LCD
INT
C1
C2
BD
BD
RSTC
TST
RST
L0
L1
TST1
TST2
L33
CAPR
V
DDI
P2.0
P2.1
P2
P3
P4
INTC
WDT
P4.3
INT
V
DDI
INT
P1.0
P1.1
P1.2
P1
IN0
CS0
RS0
P1.3
CRT0
RT0
V
DDI
ADC
IN1
CS1
RS1
P0.0
P0.1
P0.2
P0.3
P0
RT1
INT
INT
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ML64P168
PIN CONFIGURATION (TOP VIEW)
L0
L1
1
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
L33 / P6.3
L32 / P6.2
2
3
L2
L3
L31 / P6.1
L30 / P6.0
L29 / P5.3
L28 / P5.2
L27 / P5.1
L26 / P5.0
4
5
L4
6
L5
7
L6
8
L7
9
L25
L24
L23
L22
L21
L20
L19
L18
L17
C2
L8
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
L9
L10
L11
L12
L13
L14
L15
L16
P2.0
P2.1
P2.2
P2.3
P3.0
P3.1
P3.2
C1
V
V
V
V
DD3
DD2
DDI
DD1
RT1
( GP : QFP80-P-1420-0.80-BK )
80-Pin Plastic QFP
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Semiconductor
ML64P168
PIN CONFIGURATION (TOP VIEW) ( continued )
1
2
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
L2
L3
L31 / P6.1
L30 / P6.0
L29 / P5.3
L28 / P5.2
L27 / P5.1
L26 / P5.0
3
L4
4
L5
5
L6
6
L7
L25
L24
L23
L22
L21
L20
L19
L18
L17
C2
7
L8
8
L9
9
L10
L11
L12
L13
L14
L15
L16
P2.0
P2.1
P2.2
P2.3
P3.0
10
11
12
13
14
15
16
17
18
19
20
C1
V
DD3
V
DD2
V
DDI
( GA : QFP80-P-1414-0.65-K )
80-Pin Plastic QFP
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Semiconductor
ML64P168
PIN DESCRIPTIONS
The basic functions of each pin of the ML64P168 is described in Table 1.
A symbol with a slash ( / ) denotes a pin that has a secondary function.
Refer to Table 2 for secondary functions.
For Type, “ - ” denotes a power supply pin, “ I ” an input pin, “O” an output pin, and “I/O” an input-
output pin.
Table 1 Pin Descriptions ( Basic Functions )
Pin No.
Function
Symbol
Type
Description
GP
GA
VSS
VDD
VDD1
VDD2
VDD3
VDDI
VPP
32 30
67 65
42 40
44 42
45 43
43 41
31 29
46 44
47 45
69 67
68 66
66 64
65 63
71 69
72 70
-
-
0V power supply
Positive power supply
-
Bias output for driving LCD (+1.5 V, +1.2 V* )
Bias output for driving LCD (+3.0 V, +2.4 V* )
Bias output for driving LCD (+4.5 V, +3.6 V* )
Positive power supply for I/O port interface
Power supply (+12.5 V) for PROM writing
-
Power
Supply
-
-
-
C1
-
Pins for connecting a capacitor for generating LCD driving
bias
C2
-
I
XT
XT
Low-speed clock oscillation input and output pins.
Connect to a crystal ( 32.768 kHz ).
O
I
Oscillation
OSC1
OSC2
TST1
TST2
High-speed clock oscillation input and output pins.
Connect to an external resistor for oscillation ( ROS ).
O
I
Input pins for testing.
A pull-up resistor is internally connected to these pins.
Test
I
System reset input pin.
Setting this pin to ″ L ″ level puts this device into a reset state.
Then, setting this pin to ″ H ″ level starts executing an
instruction from address 0000H.
Reset
70 68
I
RESET
*When the voltage regulator for LCD driver is used.
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Semiconductor
Table 1 Pin Descriptions ( Basic Functions ) ( continued )
Pin No.
Function
Symbol
Type
Description
GP
GA
P0.0/
INT1/
CAPIN0
P0.1/
4-bit input port ( Port 0 )
77 75
Selectable as pull-up resistor input, pull-down resistor input,
or high impedance input by the port 01 control register
( P01CON ).
INT1/
CAPIN1
P0.2/
INT1
P0.3/
78 76
79 77
80 78
I
INT1/
CMP
4-bit output port ( Port 1 )
P1.0
P1.1
P1.2
P1.3
73 71
74 72
75 73
76 74
Selectable as NMOS open drain output or CMOS output by
the port 01 control register ( P01CON ).
P1.0 is a high current drive output port.
O
P2.0/
INT0
P2.1/
INT0
P2.2/
INT0
P2.3/
INT0
P3.0/
INT0
P3.1/
INT0
P3.2/
INT0
P3.3/
INT0/
SIN
P4.0/
INT0/
SOUT
P4.1/
INT0/
SPR
P4.2/
INT0/
SCLK
P4.3/
INT0/
MON
4-bit input-output port ( Port 2 )
18 16
19 17
20 18
21 19
22 20
23 21
24 22
Fllowing can be specified for each bit by the port 2 control
registers 0 to 3 ( P20CON to P23CON ).
(1) input or output
(2) pull-up/pull-down resistor input or high impedance input
(3) NMOS open drain output or CMOS output
I/O
Ports
4-bit input-output port ( Port 3 )
Following can be specified for each bit by the port 3 control
registers 0 to 3 ( P30CON to P33CON ).
(1) input or output
(2) pull-up/pull-down resistor input or high impedance input
(3) NMOS open drain output or CMOS output
I/O
25 23
26 24
27 25
28 26
29 27
4-bit input-output port ( Port 4 )
Following can be specified for each bit by the port 4 control
registers 0 to 3 ( P40CON to P43CON ).
(1) input or output
(2) pull-up/pull-down resistor input or high impedance input
(3) NMOS open drain output or CMOS output
I/O
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ML64P168
Semiconductor
Table 1 Pin Descriptions ( Basic Functions ) ( continued )
Pin No.
Function
Symbol
Type
Description
Output pin for the buzzer driver.
GP
GA
Buzzer
BD
30 28
33 31
O
O
Resistance temperature sensor connection pin
( for channel 0 )
RT0
Resistance/capacitance temperature sensor connection pin
( for channel 0 )
Reference resistor connection pin
( for channel 0 )
Reference capacitor connection pin
( for channel 0 )
Input pin for RC oscillator circuit
( for channel 0 )
Resistance temperature sensor connection pin
( for channel 1 )
Reference resistor connection pin
( for channel 1 )
Reference capacitor connection pin
( for channel 1 )
Input pin for RC oscillator circuit
( for channel 1 )
CRT0
RS0
CS0
IN0
34 32
35 33
36 34
O
O
O
I
A/D
Converter
37
41
35
39
RT1
RS1
CS1
IN1
O
O
O
I
40 38
39 37
38
36
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ML64P168
Table 1 Pin Descriptions ( Basic Functions ) ( continued )
Pin No.
Function
Symbol
Type
Description
GP
GA
LCD segment and common signals output pins.
L0
L1
1
2
79
80
1
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
L2
3
L3
4
2
L4
5
3
L5
6
4
L6
7
5
L7
8
6
L8
9
7
L9
10
11
8
L10
L11
L12
L13
L14
L15
L16
L17
L18
L19
L20
L21
L22
L23
L24
L25
9
12 10
13 11
14 12
15 13
16 14
17 15
48 46
49 47
50 48
51 49
52 50
53 51
54 52
55 53
56 54
LCD
Driver
LCD segment and common signals output pins.
These pins can be configured to be output ports by a mask
option.
L26 / P5.0 57 55
L27 / P5.1 58 56
L28 / P5.2 59 57
L29 / P5.3 60 58
L30 / P6.0 61 59
L31 / P6.1 62 60
L32 / P6.2 63 61
L33 / P6.3 64 62
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ML64P168
Table 2 Pin Descriptions ( Secondary Functions )
Pin No.
Function
Symbol
Type
Description
GP
GA
P2.0/
INT0
P2.1/
INT0
P2.2/
INT0
P2.3/
INT0
P3.0/
INT0
P3.1/
INT0
P3.2/
INT0
P3.3/
INT0
P4.0/
INT0
P4.1/
INT0
P4.2/
INT0
P4.3/
INT0
P0.0/
INT1
P0.1/
INT1
P0.2/
INT1
P0.3/
INT1
Secondary functions of P2.0 to P2.3, P3.0 to P3.3, and P4.0
to P4.3:
Level-triggered external 0 interrupt input pins.
The change of input signal level causes an interrupt to occur.
18 16
19 17
20 18
21 19
22 20
23 21
24 22
25 23
26 24
27 25
28 26
29 27
77 75
78 76
79 77
80 78
I
I
I
External
Interrupt
Secondary functions of P0.0 to P0.3:
Level-triggered external 1 interrupt input pins.
The change of input signal level causes an interrupt to occur.
I
I
Secondary functions of P0.0:
This pin is assigned the capture circuit trigger input pin of
CAPR0 function .
Secondary functions of P0.1:
This pin is assigned the capture circuit trigger input pin of
CAPR1 function .
P0.0/
CAPIN0
77 75
78 76
Capture
trigger
P0.1/
CAPIN1
P3.3/
SIN
P4.0/
SOUT
P4.1/
SPR
Secondary functions of P3.3:
This pin is assigned the data input of a serial port.
Secondary functions of P4.0:
This pin is assigned the data output of a serial port.
Secondary functions of P4.1:
This pin is assigned the ready output of a serial port.
Secondary functions of P4.2:
25 23
26 24
27 25
28 26
I
O
Serial
port
O
P4.2/
SCLK
I/O
This pin is assigned the clock input-output of a serial port.
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ML64P168
Semiconductor
Table 2 Pin Descriptions ( Secondary Functions ) ( continued )
Pin No.
Function
Symbol
Type
Description
Secondary functions of P4.3:
This pin is a monitor output of the RC oscillation clock for an
A/D converter and a 700kHz RC oscillation clock for a system
GP
GA
RC
Oscillation
Monitor
P4.3/
MON
29 27
80 78
O
I
clock.
Secondary functions of P0.3:
This pin is an analog comparator input pin for battery check
circuit.
Battery
Check
P0.3/
CMP
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Semiconductor
ML64P168
MEMORY MAPS
Program Memory ( PROM )
Test program area
1FFFH
1FE0H
32 bytes
Contents of interrupt area
003BH
0038H
0035H
0032H
002FH
002CH
0029H
0026H
0023H
0020H
Watchdog interrupt
External 0 interrupt
Serial port interrupt
External 1 interrupt
A/D converter interrupt
256Hz interrupt
8160 bytes
003EH
32Hz interrupt
16Hz interrupt
1Hz interrupt
0.1Hz interrupt
Interrupt area
0020H
CZP area
0010H
Start address
0000H
8 bits
Program Memory Map
Address 0000H is the instruction execution start address by the system reset.
The CZP area from address 0010H to address 001FH is the start address for the CZP subroutine of 1-
byte call instruction.
The start address of interrupt subroutine is assigned to the interrupt address from address 0020H to
003DH.
The user area has 8160 bytes of address 0000H to 1FDFH. No program can be stored in the test
program area.
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ML64P168
Data Memory
The data memory area consists of 8 banks and each bank has 256 nibbles ( 256 × 4 bits ).
The data RAM is assigned to BANK 6, BANK 7 and peripheral ports are assigned to BANK 0.
7FFH
BANK7
Data RAM area
( 256 nibbles )
Data / Stack area ( 128 nibbles )
780H
700H
6FFH
512 nibbles
BANK6
Data RAM area
( 256 nibbles )
600H
Contents of 000H to 07FH
07FH
Inaccessible area
SFR area
100H
0FFH
Unused area
BANK0
4 bits
080H
07FH
000H
000H
Data Memory Map
Half the BANK 7 of Data RAM area ( 128 nibbles ) is shared by the stack area. The stack is a memory
starting from address 7FFH toward the low-order addresses where 4 nibbles are used by Subroutine
Call Instruction and 8 nibbles are used by an interrupt.
The addresses 080H to 0FFH of BANK 0 are not assigned as the data memory, so access to these
addresses has no effect. Moreover, it is impossible to access BANK 1 to BANK 5.
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ML64P168
ABSOLUTE MAXIMUM RATINGS ( 1.5 V Spec. )
(VSS = 0V)
Parameter
Power supply voltage 1
Power supply voltage 2
Power supply voltage 3
Power supply voltage 4
Power supply voltage 5
Input voltage 1
Symbol
VDD1
VDD2
VDD3
VDDI
Condition
Ta = 25°C
Rating
Unit
V
-0.3 to + 2.0
Ta = 25°C
-0.3 to + 4.0
V
-0.3 to + 5.5
V
Ta = 25°C
-0.3 to + 5.5
V
Ta = 25°C
VDD
-0.3 to + 2.0
V
Ta = 25°C
VIN1
-0.3 to VDD+ 0.3
-0.3 to VDDI+ 0.3
-0.3 to VDD1+ 0.3
-0.3 to VDD2+ 0.3
-0.3 to VDD3+ 0.3
-0.3 to VDD+ 0.3
-0.3 to VDD+ 0.3
V
VDD input, Ta = 25°C
VDDI input, Ta = 25°C
VDD1 output, Ta = 25°C
VDD2 output, Ta = 25°C
VDD3 output, Ta = 25°C
VDD output, Ta = 25°C
VDDI output, Ta = 25°C
Input voltage 2
VIN2
V
Output voltage 1
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
V
Output voltage 2
V
Output voltage 3
V
Output voltage 4
V
Output voltage 5
V
Ta = 0 to + 65°C
QFP80-P-1420-0.80-BK
Ta = 0 to + 65°C
381
mW
Power Dissipation
Storage temperature
PD
334
mW
QFP80-P-1414-0.65-K
TSTG
-
-55 to + 150
°C
RECOMMENDED OPERATING CONDITIONS ( 1.5V Spec. )
(VSS = 0V)
Parameter
Symbol
Top
Condition
Rating
Unit
°C
V
Operating Temperature*
-
-
-
0 to + 65
VDD,VDD1
VDDI
1.45 to 1.70
2.70 to 5.25
Operating Voltage*
V
External 700kHz RC Oscillator
Resistance*
Crystal oscillation frequency*
ROS
fXT
-
-
60 to 200
30 to 35
kΩ
kHz
* : At Non-regulated LCD driver.
In case of select a voltage regulated LCD driver, see P.37/51.
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ML64P168
ELECTRICAL CHARACTERISTICS ( 1.5 V Spec. )
DC Characteristics ( 1.5 V Spec. )
(VSS=0V, VDD1=VDD=1.5V, VDDI=2.7V, Ta=0 to +65°C unless otherwise specified )
Measuring
Circuit
Parameter
VDD2 Voltage*
Symbol
Condition
Min.
Typ.
Max.
Unit
+100%
-50%
VDD2
2.8
3.0
3.2
V
Ca, Cb, C12=0.1µF
+100%
-50%
VDD3 Voltage*
VDD3
4.3
4.5
4.7
V
Ca, Cb, C12=0.1µF
Crystal Oscillation
Start Voltage
Crystal Oscillation
Hold Voltage
Crystal Oscillation
Stop Detection Time
Internal Crystal
Oscillator Capacitance
External Crystal
Oscillator Capacitance
Internal Crystal
Oscillator Capacitance
Internal 700kHz RC
Oscillator Capacitance
700kHz RC Oscillation
Frequency
POR Generation
Voltage
Oscillation start time:
within 5 seconds
VSTA
VHOLD
TSTOP
CG
1.47
1.40
0.1
10
10
10
8
-
-
-
-
V
V
-
-
1000
20
ms
pF
-
15
-
-
1
CGEX
CD
When external CG used
30
pF
-
-
15
12
280
-
20
pF
COS
16
pF
External resistor ROS=160kΩ
VDD = 1.45 to 1.70V
When VDD is between
VPOR1 and 1.5V
No POR when VDD is
between VPOR2 and 1.5V
fOSC
80
0
350
0.4
1.5
0.70
-
kHz
V
VPOR1
VPOR2
VRB
POR Non-generation
Voltage
Battery Check
Reference Voltage
VRB Temperature
Variation
1.4
0.50
-
-
V
0.60
-2
V
Ta = 25°C
2
∆VRB
mV/°C
-
Notes: 1.”POR” denotes Power On Reset.
2.”TSTOP” indicates that if the crystal oscillator stops over the value of TSTOP, the system reset occurs.
* : At Non-regulated LCD driver.
In case of select a voltage regulated LCD driver, see P.37/51.
16/51
FEDL64P168-01
Semiconductor
ML64P168
DC Characteristics ( 1.5V Spec. ) ( Continued )
(VSS=0V, VDD1=VDD=1.5V, VDDI=2.7V, Ta=0 to +65°C unless otherwise specified )
Measur-
Max
Parameter
Symbol
Condition
CPU in halt state
(700kHz RC oscillation stop)
CPU in operating state
(700kHz RC oscillation stop)
CPU in operating state
(700kHz RC oscillation in operation)
Serial transfer, fSCK=300kHz,
CPU in operating state
(700kHz RC oscillation stop)
CPU in halt state
(700kHz RC oscillation
stop)
RC oscillation for A/D
converter is in operating
state
Battery check circuit in operating state,
CPU in operating state
Min. Typ.
Unit
ing
.
Circuit
Supply current 1*
Supply current 2*
Supply current 3
IDD1
IDD2
IDD3
-
-
-
2
5
µA
µA
µA
15
30
300
200
Supply current 4
Supply current 5
Supply current 6
IDD4
IDD5
IDD6
-
-
60
100
230
µA
µA
1
150
RT0=10kΩ
-
-
600
25
900
125
RT0=2kΩ
µA
µA
(700kHz RC oscillation stop)
* : At Non-regulated LCD driver.
In case of select a voltage regulated LCD driver, see P.37/51.
17/51
FEDL64P168-01
Semiconductor
ML64P168
DC Characteristics (1.5 V Spec. ) ( Continued )
(VSS=0V, VDD1=VDD=1.5V, VDD2=3.0V, VDD3=4.5V, VDDI=2.7V, Ta=0 to +65°C unless otherwise specified )
Measuring
Circuit
Parameter
Symbol
Condition
VOH1 = VDDI - 0.5V
Min.
Typ.
Max.
Unit
IOH1
IOL1
-6.0
2
-1.7
5
-0.7
20
VOL1 = 0.5V
Output current 1
( P1.0 )
IOH1S
IOL1S
IOH2
IOL2
VDDI = 5.0V, VOH1S = VDDI - 0.5V
VDDI = 5.0V, VOL1S = 0.5V
VOH2 = VDDI - 0.5V
VOL2 = 0.5V
-9
-3.0
8
-1
4
25
-6.0
0.7
-9
-2.0
2.0
-3
-0.7
6.0
-1
Output current 2
( P1.1 to P1.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
IOH2S
IOL2S
IOH3
IOL3
VDDI = 5.0V, VOH2S = VDDI - 0.5V
VDDI= 5.0V, VOL2S = 0.5V
VOH3 = VDD - 0.7V
1
3
9
-1.8
0.2
-1.1
-0.6
2
-0.1
4
Output current 3
( BD )
mA
2
VOL3 = 0.7V
Output current 4
( RT0, RT1, RS0,
RS1, CRT0, CS0,
CS1 )
IOH4
VOH4 = VDD - 0.1V
-0.6
-0.2
IOL4
VOL4 = 0.1V
0.3
0.6
1.1
IOH5
IOL5
VOH5 = VDDI - 0.5V
VOL5 = 0.5V
-1.5
0.15
-2.0
0.2
-2.1
0.15
-
-0.8
-0.15
4
Output current 5
( When the pins
L26 to L33 are
configured as
1.0
IOH5S
IOL5S
IOH6
VDDI = 5V, VOH5S = VDDI - 0.5V
VDDI = 5V, VOL5S = 0.5V
VOH6 = VDD - 0.5V
VOL6 = 0.5V
-1.5
-0.2
5.0
-0.15
2.1
-4
output ports )
3.0
-0.7
Output current 6
( OSC2 )
IOL6
0.7
IOH7
VOH7 = VDD3 - 0.2V
(VDD3 level)
-
-
-
-
-
-
-
IOMH7
IOMH7S
IOML7
IOML7S
IOL7
VOMH7 = VDD2 + 0.2V (VDD2 level)
VOMH7S = VDD2 - 0.2V (VDD2 level)
VOML7 = VDD1 + 0.2V (VDD1 level)
VOML7S = VDD1 - 0.2V (VDD1 level)
4
-
-
-4
Output current 7
( L0 to L33 )
4
-
-
-4
VOL7 = VSS + 0.2V
VOH = VDD
(VSS level)
4
-
-
µA
Output Leakage
Current
IOOH
-
0.3
( P1.0 to P1.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
(RT0, RT1, RS0,
RS1, CRT0, CS0,
CS1 )
IOOL
VOL = VSS
-0.3
-
-
18/51
FEDL64P168-01
Semiconductor
ML64P168
DC Characteristics (1.5 V Spec. ) ( Continued )
( VSS=0V, VDD1=VDD=1.5V, VDD2=3.0V, VDD3=4.5V, VDDI=2.7V, Ta=0 to +65°C unless otherwise specified )
Measuring
Circuit
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
IIH1
IIL1
VIH1 = VDDI ( when pulled down )
VIL1 = VSS ( when pulled up )
VIH1 = VDDI = 5V ( when pulled down )
VIL1 = VSS, VDDI = 5V ( when pulled up )
VIH1 = VDDI ( in a high impedance )
VIL1 = VSS (in a high impedance )
VIH2 = VDD ( when pulled down )
VIH2 = VDD ( in a high impedance )
VIL2 = VSS ( in a high impedance )
VIL3 = VSS ( when pulled up )
VIH3 = VDD ( in a high impedance )
VIL3 = VSS ( in a high impedance )
VIH = VDD
30
-300
80
-800
0
90
300
-30
800
-80
1
-90
Input Current 1
( P0.0 to P0.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
IIH1S
IIL1S
IIH1Z
IIL1Z
IIH2
250
-250
-
-1
-
0
2
8
60
1
µA
3
Input Current 2
( IN0, IN1 )
IIH2Z
IIL2Z
IIL3
0
-
-1
-
-18
-
0
-60
0
-5
Input Current 3
( OSC1 )
IIH3Z
IIL3Z
IIH4
1
-1
-
0
Input Current 4
( RESET, TST1,
TST2 )
0
-
1
IIL4
VIL4 = VSS
-1.0
-0.3
-0.05
mA
VIH1
VIL1
VIH1S
VIL1S
VIH2
VIL2
VIH3
VIL3
-
1.2
0
-
-
-
-
-
-
-
-
1.5
0.3
5
Input Voltage 1
( P0.0 to P0.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
-
VDDI = 5.0V
4
VDDI = 5.0V
0
1
V
4
-
-
-
-
1.2
0
1.5
0.3
1.5
0.3
Input Voltage 2
( IN0, IN1, OSC1 )
Input Voltage 3
( RESET, TST1,
TST2 )
1.2
0
19/51
FEDL64P168-01
Semiconductor
ML64P168
DC Characteristics (1.5 V Spec. ) ( Continued )
(VSS=0V, VDD1=VDD=1.5V, VDD2=3.0V, VDD3=4.5V, VDDI=2.7V, Ta=0 to +65°C unless otherwise specified )
Measuring
Circuit
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Hysteresis Width
( P0.0 to P0.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
Hysteresis Width
( RESET, TST1,
-
0.05
0.1
0.3
∆VT1
VDDI = 5.0V
0.25
0.05
1.0
0.1
1.5
0.3
∆VT1S
∆VT2
V
4
-
-
TST2 )
Input Pin
Capacitance
( P0.0 to P0.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
CIN
-
-
5
pF
1
20/51
FEDL64P168-01
Semiconductor
ML64P168
Measuring circuit 1
R
T0
C
S0
R
I0
RT0
CS0
IN0
XT
XT
OSC1
32.768kHz
Crystal
R
OS
OSC2
V
C1
C2
C
12
SS
V
DD
V
DD1
V
DD2
V
DD3
V
DDI
C
R
R
C
R
A
,C
B
,C
C
,C12
: 0.1µF
A
C
A
C
B
C
C
OS
: 160kΩ
: 10kΩ/2kΩ
: 820pF
V
V
V
T0
S0
I0
: 10kΩ
Measuring circuit 2
*2
A
V
IH
*1
V
IL
V
SS
V
DD1
V
DD2
V
DD3
V
DD
V
DDI
21/51
FEDL64P168-01
Semiconductor
ML64P168
Measuring circuit 3
*3
A
V
SS
V
DD1
V
DD2
V
DD3
V
DD
V
DDI
Measuring circuit 4
V
IH
Waveform
Monitoring
*3
V
IL
V
SS
V
DD1
V
DD2
V
DD3
V
DD
V
DDI
*1 Input logic circuit to determine the specified measuring conditions.
*2 Measured at the specified output pins.
*3 Measured at the specified input pins.
22/51
FEDL64P168-01
Semiconductor
ML64P168
A/D Converter Characteristics (1.5 V Spec. )
( VSS=0V, VDD1=VDD=1.5V, VDDI=2.7V, Ta=0 to +65°C unless otherwise specified )
Measur-
ing
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Circuit
RS0,
RS1,
RT0,
RT0-1,
RT1
Resistor
for Oscillation
2
-
-
CS0, CT0, CS1 ≥ 740pF
kΩ
Input Current
Limiting
Resistor
RI0,
RI1
-
1
10
-
kΩ
5
fOSC1
fOSC2
fOSC3
Kf1
165
41.8
2.55
3.89
0.990
221
52.2
3.04
4.18
1.000
256
kHz
Resistor for oscillation =2 kΩ
Resistor for oscillation =10 kΩ
Resistor for oscillation =200 kΩ
RT0, RT0-1, RT1 = 2 kΩ
Oscillation
Frequency
60.6 kHz
3.53 kHz
4.35
-
-
-
RS•RT Oscillation
Frequency Ratio (*)
1.010
Kf2
RT0, RT0-1, RT1 = 10 kΩ
0.0561 0.0584 0.0637
Kf3
RT0, RT0-1, RT1 = 200 kΩ
*
Kfx is the ratio of the oscillation frequency by a sensor resistor to the oscillation frequency by a
reference resistor in the same condition.
fOSCX(RT0 - CS0 Oscillation)
OSCX(RS0 - CS0 Oscillation)
(X = 1, 2, 3)
fOSCX(RT0-1 - CS0 Oscillation)
fOSCX(RS0 - CS0 Oscillation)
fOSCX(RT1 - CS1 Oscillation)
fOSCX(RS1 - CS1 Oscillation)
Kfx=
f
,
,
23/51
FEDL64P168-01
Semiconductor
ML64P168
Measuring circuit 5
(CROSC1)
(CROSC0)
RT1 RS1 CS1 IN1
IN0 CS0 RS0 CRT0 RT0
P4.3
Frequency
Measurement
(fOSCX)
RESET
TST1
TST2
P0.0
D.U.T
P0.1
RT0,RT0-1,RT1=2k
RS0,RS1=10k
RI0,RI1=10k
CS0,CT0,CS1=820pF
/10k /200k
Ω Ω Ω
P0.2
Ω
Ω
P0.3
VSS
VDD
VDDI
24/51
FEDL64P168-01
Semiconductor
ML64P168
AC Characteristics (1.5 V Spec. ) ( Serial Interface )
( VSS=0v, VDD=1.5V , VDDI=2.7V, Ta=0 to +65°C unless otherwise specified )
Parameter
Symbol
Condition
Min.
Typ.
15
15
-
Max.
Unit
SCLK Input Fall Time
tf
-
-
-
-
-
-
50
50
-
ns
SCLK Input Rise Time
tr
-
ns
SCLK Input “L” Level Pulse Width
SCLK Input “H” Level Pulse Width
SCLK Input Cycle Time
tCWL
tCWH
tCYC
0.8
0.8
2.0
µs
-
-
µs
-
-
µs
CPU is operating at
32.768kHz
SCLK Output Cycle Time
tCYC1(O)
-
30.5
-
µs
SCLK Output Cycle Time
SOUT Output Delay Time
SIN Input Setup Time
SIN Input Hold Time
tCYC2(O)
tDDR
tDS
CPU is operating at 700kHz
-
1.43
-
0.4
-
µs
µs
µs
µs
-
-
-
-
-
-
-
0.5
0.8
tDH
-
Synchronous communication timing
( “H” level = 4.0V, “L” level = 1.0V )
t
CYC
5V
SCLK
(P4.2)
t
r
t
f
t
CWH
t
CWL
t
DDR
t
DDR
5V
5V
SOUT
(P4.0)
t
DS
t
DH
t
DS
SIN
(P3.3)
25/51
FEDL64P168-01
Semiconductor
ML64P168
ABSOLUTE MAXIMUM RATINGS (3.0 V Spec. )
(VSS = 0V)
Parameter
Power supply voltage 1
Power supply voltage 2
Power supply voltage 3
Power supply voltage 4
Power supply voltage 5
Input voltage 1
Symbol
VDD1
VDD2
VDD3
VDDI
Condition
Ta = 25°C
Rating
Unit
V
-0.3 to + 2.0
Ta = 25°C
-0.3 to + 4.0
V
-0.3 to + 5.5
V
Ta = 25°C
-0.3 to + 5.5
V
Ta = 25°C
VDD
-0.3 to + 4.0
V
Ta = 25°C
VIN1
-0.3 to VDD + 0.3
-0.3 to VDDI + 0.3
-0.3 to VDD2+ 0.3
-0.3 to VDD3+ 0.3
-0.3 to VDD+ 0.3
-0.3 to VDD+ 0.3
-0.3 to VDD+ 0.3
V
VDD input, Ta = 25°C
VDDI input, Ta = 25°C
VDD1 output, Ta = 25°C
VDD2 output, Ta = 25°C
VDD3output, Ta = 25°C
VDD output, Ta = 25°C
VDDI output, Ta = 25°C
Input voltage 2
VIN2
V
Output voltage 1
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
V
Output voltage 2
V
Output voltage 3
V
Output voltage 4
V
Output voltage 5
V
Ta = 0 to + 65°C
QFP80-P-1420-0.80-BK
Ta = 0 to + 65°C
381
mW
Power Dissipation
Storage temperature
PD
334
mW
QFP80-P-1414-0.65-K
TSTG
-
-55 to + 150
°C
RECOMMENDED OPERATING CONDITIONS ( 3.0V Spec. )
(VSS = 0V)
Parameter
Symbol
Top
Condition
Rating
0 to + 65
Unit
°C
V
Operating Temperature*1
-
-
-
VDD
2.7 to 3.5
VDD to 5.25
Operating Voltage*1
VDDI
V
External 700kHz RC oscillator
Resistance*1
Crystal oscillation frequency*1
ROS
fXT
-
-
60 to 200
30 to 66
kΩ
kHz
*1: At Non-regulated LCD driver.
In case of select a voltage regulated LCD driver, see P.37/51.
26/51
FEDL64P168-01
Semiconductor
ML64P168
ELECTRICAL CHARACTERISTICS ( 3.0V Spec. )
DC Characteristics ( 3.0V Spec. )
(VSS=0V, VDD2=VDDI=VDD=3.0V, Ta=0 to +65°C unless otherwise specified )
Measuring
Circuit
Parameter
VDD1 Voltage*
Symbol
Condition
Min.
Typ.
Max.
Unit
+100%
-50%
VDD1
1.3
1.5
1.7
V
Ca, Cb, C12=0.1µF
+100%
-50%
VDD3 Voltage*
VDD3
4.3
4.5
4.7
V
Ca, Cb, C12=0.1µF
Crystal Oscillation
Start Voltage
Crystal Oscillation
Hold Voltage
Crystal Oscillation
Stop Detection Time
Internal Crystal
Oscillator Capacitance
External Crystal
Oscillator Capacitance
Internal Crystal
Oscillator Capacitance
Internal 700kHz RC
Oscillator Capacitance
700kHz RC Oscillation
Frequency
POR Generation
Voltage
Oscillation start time:
within 5 seconds
VSTA
VHOLD
TSTOP
CG
2.7
2.7
0.1
10
10
10
8
-
-
-
-
V
V
-
-
1000
20
ms
pF
-
15
-
-
1
CGEX
CD
When external CG used
30
pF
-
-
15
12
700
-
20
pF
COS
16
pF
External resistor ROS=60kΩ
VDD = 2.7 to 3.5V
When VDD is between
VPOR1 and 3.0V
No POR when VDD is
between VPOR2 and 3.0V
fOSC
600
0
1000
0.7
3
kHz
V
VPOR1
VPOR2
VRB
POR Non-generation
Voltage
Battery Check
Reference Voltage
VRB Temperature
Variation
2.7
0.50
-
-
V
0.60
-2
0.70
-
V
Ta = 25°C
2
∆VRB
mV/°C
Notes: 1.”POR” denotes Power On Reset.
2.”TSTOP” indicates that if the crystal oscillator stops over the value of TSTOP, the system reset occurs.
*: At Non-regulated LCD driver.
In case of select a voltage regulated LCD driver, see P.37/51.
27/51
FEDL64P168-01
Semiconductor
ML64P168
DC Characteristics ( 3.0V Spec. ) ( Continued )
(VSS=0V, VDD2=VDDI=VDD=3.0V, Ta=0 to +65°C unless otherwise specified )
Measuring
Circuit
Parameter
Symbol
IDD1
Condition
CPU in halt state
(700kHz RC oscillation stop)
CPU in operating state
(700kHz RC oscillation stop)
CPU in operating state
(700kHz RC oscillation in operation)
Serial transfer, fSCK=300kHz,
CPU in operating state
(700kHz RC oscillation stop)
CPU in halt state
(700kHz RC oscillation stop)
RC oscillation for A/D
converter is in operating state
Battery check circuit in operating state,
CPU in operating state
Min.
Typ.
7
Max.
12
Unit
µA
µA
µA
Supply current 1*
Supply current 2*
Supply current 3
-
-
-
IDD2
35
50
IDD3
800
1400
Supply current 4
Supply current 5
Supply current 6
IDD4
IDD5
IDD6
-
40
70
µA
1
-
-
300
450
RT0=10kΩ
RT0=2kΩ
µA
µA
1200
1800
-
55
150
µA
(700kHz RC oscillation stop)
*: At Non-regulated LCD driver.
In case of select a voltage regulated LCD driver, see P.37/51.
28/51
FEDL64P168-01
Semiconductor
ML64P168
DC Characteristics (3.0 V Spec. ) ( Continued )
( VSS=0V, VDD1=1.5V, VDD2=VDDI=VDD=3.0V, VDD3=4.5V, Ta=0 to +65°C unless otherwise specified )
Measuring
Circuit
Parameter
Symbol
Condition
VOH1 = VDDI - 0.5V
Min.
Typ.
Max.
Unit
IOH1
IOL1
-6.0
2
-1.7
5
-0.7
20
VOL1 = 0.5V
Output current 1
( P1.0 )
IOH1S
IOL1S
IOH2
IOL2
VDDI = 5.0V, VOH1S = VDDI - 0.5V
VDDI = 5.0V, VOL1S = 0.5V
VOH2 = VDDI - 0.5V
VOL2 = 0.5V
-9
-3
-1
4
8
25
-6.0
0.7
-9
-2.0
2.0
-3
-0.7
6.0
-1
Output current 2
( P1.1 to P1.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
IOH2S
IOL2S
IOH3
IOL3
VDDI = 5.0V, VOH2S = VDDI - 0.5V
VDDI = 5.0V, VOL2S = 0.5V
VOH3 = VDD - 0.7V
1
3
9
-6.0
0.7
-2.5
-2.0
6.0
-0.8
-0.7
10.0
-0.3
Output current 3
( BD )
mA
2
VOL3 = 0.7V
Output current 4
( RT0, RT1, RS0,
RS1, CRT0, CS0,
CS1 )
IOH4
VOH4 = VDD - 0.1V
IOL4
VOL4 = 0.1V
0.7
1.3
2.5
IOH5
IOL5
VOH5 = VDDI - 0.5V
VOL5 = 0.5V
-1.5
0.15
-2.0
0.2
-4.0
0.7
-
-0.8
-0.15
4.0
-0.2
5.0
-0.3
6.0
-4
Output current 5
( When the pins
L26 to L33 are
configured as
2.0
IOH5S
IOL5S
IOH6
VDDI = 5V, VOH5S = VDDI - 0.5V
VDDI = 5V, VOL5S = 0.5V
VOH6 = VDD - 0.5V
VOL6 = 0.5V
-1.5
output ports )
3.0
-0.8
Output current 6
( OSC2 )
IOL6
3.0
IOH7
VOH7 = VDD3 - 0.2V
(VDD3 level)
-
-
-
-
-
-
-
IOMH7
IOMH7S
IOML7
IOML7S
IOL7
VOMH7 = VDD2 + 0.2V (VDD2 level)
VOMH7S = VDD2 - 0.2V (VDD2 level)
VOML7 = VDD1 + 0.2V (VDD1 level)
VOML7S = VDD1 - 0.2V (VDD1 level)
4
-
-
-4
Output current 7
( L0 to L33 )
4
-
-
-4
VOL7 = VSS + 0.2V
VOH = VDD
(VSS level)
4
-
-
µA
Output Leakage
Current
IOOH
-
0.3
( P1.0 to P1.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
(RT0, RT1, RS0,
RS1, CRT0, CS0,
CS1 )
IOOL
VOL = VSS
-0.3
-
-
29/51
FEDL64P168-01
Semiconductor
ML64P168
DC Characteristics (3.0 V Spec. ) ( Continued )
(VSS=0V, VDD1=1.5V, VDD2=VDDI=VDD=3.0V, VDD3=4.5V, Ta=0 to +65°C unless otherwise specified )
Measuring
Circuit
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
IIH1
IIL1
VIH1 = VDDI ( when pulled down )
VIL1 = VSS ( when pulled up )
30
-300
80
90
300
-30
800
-80
1
-90
Input Current 1
( P0.0 to P0.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
IIH1S
IIL1S
IIH1Z
IIL1Z
IIH2
VIH1 = VDDI = 5V ( when pulled down )
VIL1 = VSS, VDD = 5V ( when pulled up )
VIH1 = VDDI ( in a high impedance )
VIL1 = VSS (in a high impedance )
VIH2 = VDD ( when pulled down )
VIH2 = VDD ( in a high impedance )
VIL2 = VSS ( in a high impedance )
VIL3 = VSS ( when pulled up )
250
-800
0
-250
-
-1
-
0
30
90
300
1
µA
3
Input Current 2
( IN0, IN1 )
IIH2Z
IIL2Z
IIL3
0
-
-1
-
0
-300
0
-110
-10
1
Input Current 3
( OSC1 )
IIH3Z
IIL3Z
IIH4
VIH3 = VDD ( in a high impedance )
VIL3 = VSS ( in a high impedance )
VIH4 = VDD
-
-1
-
-
0
Input Current 4
( RESET, TST1,
TST2 )
0
1
IIL4
VIL4 = VSS
-3.00
-1.50
-0.75
mA
VIH1
VIL1
VIH1S
VIL1S
VIH2
VIL2
VIH3
VIL3
-
2.4
0
-
-
-
-
-
-
-
-
3.0
0.6
5
Input Voltage 1
( P0.0 to P0.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
-
VDDI = 5.0V
4
VDDI = 5.0V
0
1
V
4
-
-
-
-
2.4
0
3.0
0.6
3.0
0.6
Input Voltage 2
( IN0, IN1, OSC1 )
Input Voltage 3
( RESET, TST1,
TST2 )
2.4
0
30/51
FEDL64P168-01
Semiconductor
ML64P168
DC Characteristics (3.0 V Spec. ) ( Continued )
(VSS=0V, VDD1=1.5V, VDD2=VDDI=VDD=3.0V, VDD3=4.5V, Ta=0 to +65°C unless otherwise specified)
Measuring
Circuit
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Hysteresis Width
( P0.0 to P0.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
Hysteresis Width
( RESET, TST1,
-
0.2
0.5
1.0
∆VT1
VDDI=5.0V
0.25
0.2
1.00
0.5
1.50
1.0
∆VT1S
∆VT2
V
4
-
-
TST2 )
Input Pin
Capacitance
( P0.0 to P0.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
CIN
-
-
5
pF
1
31/51
FEDL64P168-01
Semiconductor
ML64P168
Measuring circuit 1
R
T0
C
S0
R
I0
RT0
CS0
IN0
XT
XT
OSC1
32.768kHz
Crystal
R
OS
OSC2
C1
C2
C
12
V
SS
V
DD
V
DD1
V
DD2
V
DD3
V
DDI
C
R
R
C
R
A
,C
B
,C
C
,C12
: 0.1µF
: 60kΩ
: 10kΩ/2kΩ
: 820pF
: 10kΩ
A
C
A
C
B
C
C
OS
V
V
V
T0
S0
I0
Measuring circuit 2
*2
A
V
IH
*1
V
IL
V
SS
V
DD1
V
DD2
V
DD3
V
DD
V
DDI
32/51
FEDL64P168-01
Semiconductor
ML64P168
Measuring circuit 3
*3
A
V
SS
V
DD1
V
DD2
V
DD3
V
DD
V
DDI
Measuring circuit 4
V
IH
Waveform
Monitoring
*3
V
IL
V
SS
V
DD1
V
DD2
V
DD3
V
DD
V
DDI
*1 Input logic circuit to determine the specified measuring conditions.
*2 Measured at the specified output pins.
*3 Measured at the specified input pins.
33/51
FEDL64P168-01
Semiconductor
ML64P168
A/D Converter Characteristics (3.0 V Spec. )
( VSS=0V, VDDI=VDD=3.0V, Ta=0 to +65°C unless otherwise specified)
Measur-
ing
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Circuit
RS0,
RS1,
RT0,
RT0-1,
RT1
RI0,
RI1
Resistor for
Oscillation
1
1
-
-
-
CS0, CT0, CS1 ≥ 740pF
kΩ
kΩ
Input Current
Limiting Resistor
-
10
5
fOSC1
fOSC2
fOSC3
Kf1
200
46.5
2.79
239
55.4
3.32
277
64.3
3.85
kHz
Resistor for oscillation =2 kΩ
Resistor for oscillation =10 kΩ
Resistor for oscillation =200 kΩ
RT0, RT0-1, RT1 = 2 kΩ
Oscillation
Frequency
kHz
kHz
4.272 4.380 4.490
0.990 1.000 1.010
0.0573 0.0616 0.0659
-
-
-
RS•RT Oscillation
Frequency Ratio(*)
Kf2
RT0, RT0-1, RT1 = 10 kΩ
Kf3
RT0, RT0-1, RT1 = 200 kΩ
*
Kfx is the ratio of the oscillation frequency by a sensor resistor to the oscillation frequency by a
reference resistor in the same condition.
fOSCx(RT0 - CS0 Oscillation)
fOSCx(RT0-1 - CS0 Oscillation)
fOSCx(RS0 - CS0 Oscillation)
fOSCx(RT1 - CS1 Oscillation)
fOSCx(RS1 - CS1 Oscillation)
Kfx=
fOSCx(RS0 - CS0 Oscillation)
(x=1, 2, 3)
,
,
34/51
FEDL64P168-01
Semiconductor
ML64P168
Measuring circuit 5
(CROSC1)
(CROSC0)
RT1 RS1 CS1 IN1
IN0 CS0 RS0 CRT0 RT0
P4.3
Frequency
Measurement
(fOSCX)
RESET
TST1
TST2
P0.0
D.U.T
P0.1
RT0,RT0-1,RT1=2k
RS0,RS1=10k
RI0,RI1=10k
CS0,CT0,CS1=820pF
/10k /200k
Ω Ω Ω
P0.2
Ω
Ω
P0.3
VSS
VDD
VDDI
35/51
FEDL64P168-01
Semiconductor
ML64P168
AC Characteristics ( 3.0V Spec. ) ( Serial Interface )
( VSS=0V, VDD2=VDD=3.0V, VDDI=5.0V , Ta=0 to +65°C unless otherwise specified)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
SCLK Input Fall Time
SCLK Input Rise Time
tf
tr
-
-
-
-
15
15
50
50
ns
ns
SCLK Input “L” Level Pulse Width
tCWL
-
0.8
-
-
µs
SCLK Input “H” Level Pulse Width
SCLK Input Cycle Time
tCWH
tCYC
-
-
0.8
2.0
-
-
-
-
µs
µs
CPU is operating at
32.768kHz
SCLK Output Cycle Time
tCYC1(O)
-
30.5
-
µs
SCLK Output Cycle Time
SOUT Output Delay Time
SIN Input Setup Time
SIN Input Hold Time
tCYC2(O)
tDDR
tDS
CPU is operating at 700kHz
-
-
0.5
0.8
1.43
-
0.4
-
µs
µs
µs
µs
-
-
-
-
-
-
tDH
-
Synchronous communication timing
( “H” level = 4.0V, “L” level = 1.0V )
t
CYC
5V
SCLK
(P4.2)
t
r
t
f
t
CWH
t
CWL
t
DDR
t
DDR
5V
5V
SOUT
(P4.0)
t
DS
t
DH
t
DS
SIN
(P3.3)
36/51
FEDL64P168-01
Semiconductor
ML64P168
RECOMMENDED OPERATING CONDITIONS
( When Voltage Regulator for LCD Driver Used )
(VSS = 0V)
Parameter
Operating Temperature
Operating Voltage
Symbol
Top
Condition
Rating
0 to + 65
2.7 to 3.5
30 to 66
Unit
°C
-
-
-
VDD
fXT
V
Crystal oscillation frequency
kHz
ELECTRICAL CHARACTERISTICS
( When Voltage Regulator for LCD Driver Used )
DC Characteristics
(VSS=0V, VDD=3.0V, Ta=0 to +65°C unless otherwise specified )
Measur-
ing
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Circuit
VDD1
∆VDD1
VDD2
1.00
1.2
-4
1.4
V
VDD=2.7 to 3.5, Ta=25°C
-
VDD1 Voltage
-
-
mV/°C
Typ. - 0.1
Typ. + 0.1
VDD2 Voltage
VDD3 Voltage
VDD=2.7 to 3.5
2×VDD1
V
Typ. - 0.2
Typ. + 0.2
VDD3
VDD=2.7 to 3.5
3×VDD1
1
VDD=1.5V , CPU in halt state
VDD=3.0V, CPU in halt state
VDD=1.5V, CPU in operating state
VDD=3.0V, CPU in operating state
-
-
-
-
2
7
5
Supply Current 1
Supply Current 2
IDD1
12
30
50
µA
15
35
IDD2
Notes: The other electrical characteristics are the same as those for the 1.5V and 3.0V specifications.
37/51
FEDL64P168-01
Semiconductor
ML64P168
Power Supply Circuit
V
DDI
V
DD
C1
CI
C
S
C2
C
12
ML64P168
V
DD3
C
C
VDD2
C
B
V
DD1
2.7 to 5V
1.5V
V
SS
ML64P168 1.5V Version
VDDI
V
DD
C1
C2
CI
C
S
C12
ML64P168
V
DD3
VDD2
VDD1
CC
C
B
1.5V
2.7 to 5V
CA
V
SS
ML64P168 1.5V Version (The LCD bias is regulated.)
VDDI
V
DD
C1
CS
CI
C2
C
12
ML64P168
VDD3
C
C
VDD2
3.0V
V
DD1
CA
V
SS
ML64P168 3.0V Version
VDDI
V
DD
C1
C2
C
I
C
S
C
12
ML64P168
V
DD3
DD2
DD1
C
C
V
C
B
3.0V
V
CA
V
SS
ML64P168 3.0V Version (The LCD bias is regulated.)
+100%
µ
,C ,C12:0.1 F -50%
Note:C
A
,C
B
,C
C
,C
S
I
38/51
FEDL64P168-01
Semiconductor
ML64P168
PROM MODE
ABSOLUTE MAXIMUM RATINGS
(VSS = 0V)
Parameter
PROM power supply voltage
Program voltage
Symbol
VCC
VPP
Condition
VCC=VDD, Ta=25°C
Ta = 25°C
Rating
Unit
V
-0.3 to + 6.7
-0.3 to + 14.0
-0.3 to VCC + 0.3
-0.3 to VCC + 0.3
-55 to + 150
V
PROM input voltage
PROM output voltage
Storage temperature
VI
V
VCC system input, Ta=25°C
VCC system output, Ta=25°C
-
VO
V
TSTG
°C
RECOMMENDED OPERATING CONDITIONS
(VSS = 0V)
Parameter
Operating Temperature
VCC power supply voltage
Symbol
Top
Condition
Rating
0 to + 65
4.75 to 5.25
4.75 to 5.25
12.0 to 13.0
4 to VCC
Unit
°C
V
-
VCC
VCC=VDD=VDDI
In read
V
VPP power supply voltage
Input voltage
VPP
In write
V
VIH
VIL
VCC=VDD=VDDI
-
V
0 to 1
V
39/51
FEDL64P168-01
Semiconductor
ML64P168
READ OPERATION ( PROM MODE )
DC Characteristics
(VDD=VPP=5.0V±5%, Ta=25 ±5°C unless otherwise specified )
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
VCC = VDD
CE=VIH
VCC power supply current
(standby)
VCC power supply current
(operation)
ICC1
-
-
35
mA
VCC = VDD
CE=VIL
ICC2
-
-
100
mA
VIH
VIL
VCC = VDD
4
0
-
-
VCC
1
V
V
Input voltage
-
VCC = VDD
VOH = VCC - 0.5V
VOL = 0.5V
IOH
IOL
-2.0
0.2
-0.7
0.7
-0.2
2.0
mA
mA
Output voltage
AC Characteristics
(VCC =5.0V±5%, VPP=VCC, Ta=0 to 65°C unless otherwise specified)
Parameter
Symbol
tACC
tCE
tOE
tDF
Condition
Min.
Typ.
Max.
120
120
50
Unit
Address access time
CE access time
-
-
-
-
-
-
-
ns
ns
ns
ns
OE=CE=VIL
OE=VIL
CE=VIL
CE=VIL
OE access time
Output disable time
0
40
Measurement conditions: Input pulse level
Input rise / fall time
0.45 to 4.55V
5ns
Timing judgement level Input 0.8V, 2V / Output 0.8V , 2V
Timing chart
Address Input
CE
tCE
OE
tDF
tOE
tACC
Data output
40/51
FEDL64P168-01
Semiconductor
ML64P168
WRITE OPERATION ( PROM MODE )
DC Characteristics
( VSS=0V, VDD=5.0V ± 5%, VPP=12.5V ± 5V, Ta=25 ± 5°C unless otherwise specified )
Parameter
Symbol
IPP
Condition
Min.
Typ.
Max.
50
Unit
mA
mA
V
VPP power supply current
VCC power supply current
-
-
-
-
-
-
CE=VIL
VCC = VDD
ICC
100
VCC
1
VIH
VCC = VDD
4
0
Input voltage
VIL
-
V
VCC = VDD
VOH = VCC - 0.5V
IOH
IOL
-2.0
0.2
-0.7
0.7
-0.2
2.0
mA
mA
Output voltage
VOL = 0.5V
AC Characteristics
( VSS=0V, VDD=5.0V ± 5%, VPP=12.5 ± 5V, Ta=25 ± 5°C unless otherwise specified )
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Address set-up time
OE set-up time
tAS
tOES
tDS
tAH
tDH
tDEP
tVS
-
-
-
-
-
-
-
2
2
2
0
2
0
2
-
-
-
-
-
-
-
-
-
-
-
-
µs
µs
µs
µs
µs
ns
µs
Data set-up time
Address hold time
Data hold time
130
-
OE output floating delay time
VPP power supply set-up time
VDD=VDDI
6V ± 0.25V
VDD1=VDD2
6V ± 0.25V
-
Initial program pulse width
tPW
0.95
1.0
1.05
ms
Additional program pulse width
tOPW
tOE
2.85
-
-
-
78.75
150
ms
ns
OE output effective delay time
Measurement conditions: Input pulse level
Input rise / fall time
0.45 to 4.55V
Less than 20ns
Timing judgement level Input 0.8V, 2V / Output 0.8V , 2V
41/51
FEDL64P168-01
Semiconductor
ML64P168
Program timing chart
Address Input
Address N
t
t
AS
DS
t
AH
Data Input/Output
Data Input
Data Output
t
OE
tDH
t
DEP
VPP
t
VS
CE
OE
t
OES
t
PW
t
OPW
42/51
FEDL64P168-01
Semiconductor
ML64P168
FUNCTIONAL DESCRIPTION
CPU Peripheral Function
∙ A/D converter ( ADC )
The ML64P168 has a built-in two-channel RC oscillation A/D converter. The A/D converter is
composed of a two-cannel oscillation circuit, Counter A ( CNTA0-4, a 4.8-digit decade counter ),
Counter B ( CNTB0-3, a 14-bit binary counter ), and A/D Converter Control Registers 0 and 1
( ADCON0, ADCON1 ).
By counting oscillation frequencies that vary depending on a resistor or capacitor connected to the
RC oscillation circuit, the A/D converter converts resistance values or capacitance values to
corresponding digital values. By using a thermistor or humidity sensor as a resistance, a
thermometer or a hygrometer can be constructed. By applying a separate sensor to each cannel of
the 2-channel RC oscillation circuit, it is also possible to extend measure ranges or measure at two
places.
∙ Serial port ( SIOP )
The ML64P168 has an 8-bit synchronous serial port. Receive/transmit operation of the serial port is
performed simultaneously and the serial transfer clock can select either internal or external mode.
Direction of transfer data can be big endian or little endian. Each pin of the serial port is assigned as
secondary functions of P3.3 and P4.0 to P4.2. Setting each bit of SIN,SOUT, SPR and SCLK of
P33CON and P40CON to P42CON to “1” makes each pin valid.
∙ LCD driver ( LCD )
The ML64P168 has a built-in LCD driver for 34 outputs.
The LCD driver consists of 31× 4-bit display registers ( DSPR0-30 ), the Display Control Register
( DSPCON ), a 34-output LCD driver circuit, and a bias generation circuit ( BIAS ).
The bias generation circuit for LCD driver ( BIAS ) generates bias voltages for the LCD driver by
rising or dropping the power supply voltage by externally installing capacitors. Alternatively, it
generates bias voltages by rising the constant voltage ( VDD1 = 1.2V ) generated by the voltage
regulator for LCD driver. Which way is to be used is specified by mask option.
There are three types of driving methods: 1/4duty, 1/3duty and 1/2duty. Software selects the duty
mode.
A mask option can select either a common driver or a segment driver for each LCD driver pin. A
mask option can also specify assignment of each bit of the display register to each segment. All the
display registers must be selected by a mask option.
L26 to L33 of the LCD driver can be configured to be output ports by a mask option.
The relationship between the duty, the bias method, and the maximum segment number follows:
1/4duty, 1/3 bias method ----------- 120 segments
1/3duty, 1/3 bias method ----------- 93 segments
1/2duty, 1/2 bias method ----------- 64 segments
∙ Buzzer driver ( BD )
The ML64P168 has a built-in buzzer driver with 15 buzzer output frequencies and 4 buzzer output
modes. Each buzzer output is selected by the Buzzer Control Register ( BDCON ) and the Buzzer
Frequency Control Register ( BFCON ).
43/51
FEDL64P168-01
Semiconductor
ML64P168
∙ Capture circuit ( CAPR )
The ML64P168 captures 32Hz to 256Hz output of the time base counter at the falling of Port 0.0 or
Port 0.1 ( P0.0 or P0.1 ) to “L” level when the pull-up resistor input is chosen, or at the rising to “H”
level when the pull-down resistor input is chosen. The capture circuit is composed of the Capture
Control Register ( CAPCON ) and the Capture Registers ( CAPR0, CAPR1 ) that fetch output from
the time base counter.
∙ Watchdog timer ( WDT )
The ML64P168 has a built-in watchdog timer to detect CPU malfunction. The watchdog timer is
composed of a 6-bit watchdog timer counter ( WDTC ) to count a 16Hz output and a watchdog
timer control register ( WDTCON ) to reset WDTC.
∙ Clock generation circuit ( 2CLK )
The clock generation circuit ( 2CLK ) in the ML64P168 contains a 32.768kHz crystal oscillation
circuit, a 700kHz RC oscillation circuit, and a clock control port. This circuit generates the system
clock ( CLK ) and the time base clock ( 32.768kHz ).
The system clock drives the CPU while the time base clock drives the time base counter and the
buzzer driver.
Via the contents of the Frequency Control Register ( FCON ), the system clock can be switched
between 32.768kHz ( the output of the crystal oscillation circuit ) and 700kHz ( the output of the RC
oscillation circuit ).
Note: The oscillation frequency of the RC oscillation circuit varies depending on the value of an
external resistor ( ROS ), operating power supply voltage ( VDD ), and ambient temperatures
(Ta).
∙ Time base counter ( TBC )
The ML64P168 has a built-in time base counter ( TBC ) that generates clocks to be supplied to
internal peripheral circuit. The time base counter is composed of 15 binary counters, and a 1/10
frequency dividing circuit. The count clock of the time base is driven by the oscillation clock
( 32.768kHz ) of the crystal oscillation circuit. The output of the time base counter is used for the
buzzer driver, the system reset circuit, the watchdog timer, the time base interrupt, the sampling
clocks of each port, and the capture circuit.
∙ I/O port
Input-output ports ( P2, P3, P4 )
: 3 ports × 4bits
Pull-up ( pull-down ) resistor input or high-impedance input, CMOS output or NMOS open
drain output: these can be specified for each bit; external 0 interrupt
Input port ( P0 )
: 1 port × 4bits
Pull-up ( pull-down ) resistor input or high-impedance input; external 1 interrupt
Output port ( P1 )
: 1 port × 4bits
CMOS output or NMOS open drain output
44/51
FEDL64P168-01
Semiconductor
ML64P168
∙ Interrupt ( INTC )
The ML64P168 has 10 interrupt sources ( 10 vector address ), of which two are external interrupts
from ports and eight are internal interrupts.
Of the ten interrupt sources, only the watchdog timer interrupt cannot be disabled ( non-maskable
interrupt ). The other nine interrupts are controlled by the master interrupt enable flag ( MI ) and the
interrupt enable registers ( IE0, IE1, and IE2 ). When an interrupt condition is met, the CPU
branches to a vector address corresponding to the interrupt source.
∙ Battery check circuit ( BC )
The battery check circuit ( BC ) detects the level of the supply voltage by comparing the voltage
generated by an external supply-voltage dividing resistor ( RBLD ) with the internal reference voltage
( Vrb ).
45/51
FEDL64P168-01
Semiconductor
ML64P168
APPLICATION CIRCUITS (1.5 V Spec. )
IN0
CS0
RS0
CRT0
RT0
IN1
CS1
RS1
RT1
BD
P4.3
P4.2
P4.1
P4.0
P3.3
P3.1
1.5V Spec. Application Circuit ( Voltage Regulator for LCD Driver not Used )
46/51
FEDL64P168-01
Semiconductor
ML64P168
APPLICATION CIRCUITS (1.5 V Spec. ) ( continued )
IN0
CS0
RS0
CRT0
RT0
IN1
CS1
RS1
RT1
BD
P4.3
P4.2
P4.1
P4.0
P3.3
P3.1
1.5V Spec. Application Circuit ( Voltage Regulator for LCD Driver Used )
47/51
FEDL64P168-01
Semiconductor
ML64P168
APPLICATION CIRCUITS (3.0 V Spec. )
IN0
CS0
RS0
CRT0
RT0
IN1
CS1
RS1
RT1
BD
P4.3
P4.2
P4.1
P4.0
P3.3
P3.1
3.0V Spec. Application Circuit ( Voltage Regulator for LCD Driver not Used )
48/51
FEDL64P168-01
Semiconductor
ML64P168
APPLICATION CIRCUITS (3.0 V Spec. ) ( continued )
IN0
CS0
RS0
CRT0
RT0
IN1
CS1
RS1
RT1
BD
P4.3
P4.2
P4.1
P4.0
P3.3
P3.1
3.0V Spec. Application Circuit ( Voltage Regulator for LCD Driver Used )
49/51
FEDL64P168-01
Semiconductor
ML64P168
PACKAGE DIMENSIONS
ML64P168-XXXGP
25.0±0.2
20.0±0.2
0.17±0.05
41
64
40
0.12
SEATING PLANE
65
2.5TYP.
0~10°
80
25
1.3TYP.
24
1.38±0.15
1
INDEX MARK
+0.08
0.32
-0.07
0.8
0.16 M
0.8TYP.
Figure C-1 80-Pin QFP:GP Package Dimension Diagram
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are
very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product
name, package name, pin number, package code and desired mounting conditions (reflow method,
temperature and times).
50/51
FEDL64P168-01
Semiconductor
ML64P168
PACKAGE DIMENSIONS
ML64P168-XXXGA
60
41
40
0.17±0.05
61
SEATING PLANE
1.4±0.2
0.10
80
0~10°
21
20
0.6TYP.
0.67±0.15
1
INDEX MARK
+0.08
0.65
0.13 M
0.83TYP.
0.32
-0.07
Figure C-2 80-Pin QFP:GA Package Dimension Diagram
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are
very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product
name, package name, pin number, package code and desired mounting conditions (reflow method,
temperature and times).
51/51
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