ML66Q525B-XXTB
更新时间：2024-09-18 13:08:41
品牌：OKI
描述：Microcontroller, 16-Bit, FLASH, 24MHz, CMOS, PQFP100, 14 X 14 MM, 0.50 MM PITCH, PLASTIC, TQFP-100
概述
规格参数
数据手册ML66Q525B-XXTB 概述
Microcontroller, 16-Bit, FLASH, 24MHz, CMOS, PQFP100, 14 X 14 MM, 0.50 MM PITCH, PLASTIC, TQFP-100 微控制器
ML66Q525B-XXTB 规格参数
| 生命周期： | Transferred | 零件包装代码： | QFP |
| 包装说明： | TFQFP, | 针数： | 100 |
| Reach Compliance Code： | unknown | HTS代码： | 8542.31.00.01 |
| 风险等级： | 5.47 | Is Samacsys： | N |
| 具有ADC： | YES | 地址总线宽度： | 20 |
| 位大小： | 16 | 最大时钟频率： | 24 MHz |
| DAC 通道： | NO | DMA 通道： | YES |
| 外部数据总线宽度： | 8 | JESD-30 代码： | S-PQFP-G100 |
| 长度： | 14 mm | I/O 线路数量： | 71 |
| 端子数量： | 100 | 最高工作温度： | 70 °C |
| 最低工作温度： | -30 °C | PWM 通道： | YES |
| 封装主体材料： | PLASTIC/EPOXY | 封装代码： | TFQFP |
| 封装形状： | SQUARE | 封装形式： | FLATPACK, THIN PROFILE, FINE PITCH |
| 认证状态： | Not Qualified | ROM可编程性： | FLASH |
| 座面最大高度： | 1.2 mm | 速度： | 24 MHz |
| 最大供电电压： | 3.6 V | 最小供电电压： | 2.4 V |
| 标称供电电压： | 3 V | 表面贴装： | YES |
| 技术： | CMOS | 温度等级： | OTHER |
| 端子形式： | GULL WING | 端子节距： | 0.5 mm |
| 端子位置： | QUAD | 宽度： | 14 mm |
| uPs/uCs/外围集成电路类型： | MICROCONTROLLER | Base Number Matches： | 1 |
ML66Q525B-XXTB 数据手册
通过下载ML66Q525B-XXTB数据手册来全面了解它。这个PDF文档包含了所有必要的细节，如产品概述、功能特性、引脚定义、引脚排列图等信息。
PDF下载FEDL66525-02
Issue Date: July 19, 2002
OKI Semiconductor
ML66525 Family
16-Bit Microcontroller
GENERAL DESCRIPTION
The ML66525 family devices are high-performance 16-bit CMOS microcontrollers that utilize the nX-8/500S,
Oki’s proprietary CPU core.
Data from a personal computer with a USB connector can be automatically, quickly written or read to and from
NAND type Flash Memory via USB I/F and NAND Flash Memory I/F.
The ML66525 family devices support clock gear functions, a sub-clock and HALT/STOP mode, which are
suitable for low power applications.
The ML66525 family devices are provided with interfaces to external devices such as a 4-channel multi-functional
serial interface with internal 32-byte FIFO and a high-speed bus interface that has separate address and data buses
and does not require external address latches.
A wide variety of internal multi-functional timers enable various timing controls such as periodic and timed
measurements.
With a 16-bit CPU core that enables high-speed arithmetic computations and a variety of bit processing functions,
these general-purpose microcontrollers are optimally suited for Digital Audio devices such as MP3 players, voice
recorders, handy games, and PC peripheral control systems (to control devices that can be connected to USB and
store data into memory).
The ML66525 family devices also include the flash ROM version device (ML66Q525B) that is programmable
with a single 3 V power supply (2.4 to 3.6 V).
[ Note ] ML66525A/ML66Q525A are supplied as stock lasts.
APPLICATIONS
• Small-sized handy systems that require USB control and Storage control (Digital Audio players, etc)
• PC Peripheral Control Systems
ORDERING INFORMATION
Order Code or Product Name
ML66525B-xxTB *1
ML66Q525B-NTB *2
ML66525B-xxLA *1
Package
Remark
100-pin plastic TQFP
(TQFP100-P-1414-0.50-K)
144-pin plastic LFBGA
(P-LFBGA144-1111-0.80)
mask ROM version (2.4 to 3.6 V)
ML66525B flash ROM version (2.4 to 3.6 V)
ML66525B BGA package version (2.4 to 3.6 V)
ML66Q525B BGA package version (2.4 to 3.6 V)
ML66Q525B-NLA *2
*1 : The “xx” of “-xx” stands for the code number.
*2 : The “N” of “-N” stands for the flash ROM blank version.
When OKI programs and ship the flash ROM, the part number is changed from ”–N” to ”–XX” (code
number ) , for example, ML66Q525B-999TB.
1/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
FEATURES
Parameter
Operating temperature
ML66525B
–30 to +70°C
Power supply voltage/
VDD = 2.4 to 3.6 V / f = 24 MHz
Maximum operating frequency
83 nsec@24 MHz
61 µsec@32.768 kHz
Minimum instruction execution time
6 input-only pins
I/O ports
1 output-only pin
16-bit auto-reload timer × 2ch
8-bit auto-reload timer × 1ch
8-bit auto-reload timer
× 1ch
Watch timer × 1ch
Timers
8-bit PWM × 2ch (can also be used as 16-bit PWM ×
× 1ch
× 1ch
Synchronous/UART × 2ch
Serial port
A/D converter
10-bit × 4ch
Non-maskable × 1ch
Maskable × 6ch
External interrupts
Compliant with USB spec. version 1.1
High-speed transfer at 12 Mbps
Internal PLL(x2 , x3 , x4) -> 48 MHz
Internal transceiver
Bus power available
USB control
EP0 (IN 32 bytes, OUT 32 bytes), control transfer
EP1 (64 bytes × 2), bulk/interrupt transfer
EP2 (64 bytes × 2), bulk/interrupt transfer
EP3 (32 bytes), bulk/interrupt transfer
EP4 (64 bytes × 2), bulk/isochronous/interrupt transfer
EP5 (64 bytes × 2), bulk/isochronous/interrupt transfer
Automatic, high-speed data transfer
ECC circuit
NAND Flash Memory control
Automatic, high-speed 512-byte data transfer
3 levels
Dual clocks function
Others
Clock gear function
Different power available among USB, CPU core, and I/O port
ML66Q525B
Flash ROM version
2/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
FUNCTIONAL DESCRIPTION
1. High-performance CPU
The ML66525 family devices include the high-performance CPU, powerful bit manipulation instruction set, a
variety of symmetrical addressing modes, and ROM WINDOW function, and also supports the best-optimized
C compiler.
2. A variety of power saving modes
Attaching a 32.768-kHz crystal produces a real time clock signal from the internal clock timer. A single clock
can be used in place of dual clocks.
Switching the CPU clock to the dual clocks (1/2 or 1/4 of the main clock) enables operation in a low power
consumption mode. The clock gear function allows a 1/2 or 1/4 clock signal of the main clock to be selected as
the CPU operating clock.
The ML66525 family devices are provided with a wide range of standby control functions such as the STOP
mode that stops the oscillation circuit, the quick restart STOP mode that stops the CPU and peripherals while
the oscillation circuit is operating, and the HALT mode that shuts down the CPU while peripherals are
operating.
3. USB control
The family include USB controller which compliant with USB specification version 1.1 and can be transferred
data with 12Mbps circuit.
Also, USB controller have 6 kinds of endpoint and apply for control/bulk/isochronous/interrupt transfer.
With NAND Flash Memory control circuit, high speed data transfer is possible.
4. NAND Flash Memory control
The family include control circuit of NAND Flash Memory. Automatically data read from and write to outside
NAND Flash Memory with 528 byte.
Also, include ECC circuit which detect data error and correct data error.
5. ML66Q525B with flash memory programmable with single power supply
In addition to mask ROM version devices, the ML66525 family devices include the ML66Q525B with internal
128 Kbytes of flash memory that can be programmed with a single power supply. The flash memory of the
ML66Q525B can be programmed with a low power supply (2.4 to 3.6 V) using the internal voltage booster
circuit.
6. Multifunctional, high-precision analog-to-digital converter
The family devices include a high-precision 10-bit analog-to-digital converter with four channels and are ideal
for such analog control functions as processing audio signals, processing sensor inputs, detecting key switch
states, and controlling battery use in portable equipment. Each channel has its own result register readily
accessible from the software.
3/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
7. Multifunctional PWM
The family devices support both 8- and 16-bit PWM operations. Choosing between the time base counter
output and the overflow from an 8-bit auto-reload time as the PWM counter clock source provides a great
number of possibilities over a broad frequency range. The 16-bit PWM configuration supports a high-speed
synchronization mode that generates a high-precision output signal with less ripple suitable for
digital-to-analog applications.
8. Programmable pull-up resistors
Building the pull-up resistors into the chip contributes overall design compactness.
Making them programmable on a per-bit basis allows complete flexibility in circuit board layout and system
design. These programmable pull-up resistors are available for all I/O pins except ports that have specific
functions such as oscillator connection pins.
9. High-speed bus interface
The interface to external devices uses separate data and address buses.
This arrangement permits a rapid bus access for controlling the system from the microcontroller.
10. A variety of external interrupts
There are a total of seven interrupt channels for use in communicating with external devices; six channels for
maskable interrupts and one channel for non-maskable interrupts.
4/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
BLOCK DIAGRAM
NMI
EXINT0
Interrupt
CPU Core
to
RESn
OSC0
OSC1n
XT0
EXINT8/9
System
Control
16-bit Timer0
XT1n
RXD1
TXD1
RXC1
TXC1
SIO1
(UART/SYNC)
ALU
Control Registers
SSP
LRB
DSR TSR CSR
PSW
PC
8-bit
ALU Control
ACC
Timer4/BRG
RXD6
TXD6
RXC6
TXC6
SIO6
(UART/SYNC)
8-bit
Timer3/BRG
Memory Control
Pointing Registers
Local Registers
Instruction
Decoder
SIOI3
SIOO3
SIO3
(SYNC)
SIOCK3
8-bit
EAn
Timer5/BRG
ROM
RAM
PSENn
RDn
128 Kbyte
4Kbyte
SIOI4
SIOO4
SIO4
(32-byte FIFO
SYNC)
WRn
+ 2Kbyte
Also functions as transfer RAM
SIOCK4
D0 to D7
8-bit
A0 to A19
Timer6/WDT
P0 (8 bit)
P1 (8 bit)
P2 (4 bit)
P3 (3 bit)
P4 (8 bit)
P6 (4 bit)
16-bit Timer7
TBC
RTC
8-bit PWM0
8-bit PWM1
PWMOUT0
PWMOUT1
P7 (2 bit)
P8 (4 bit)
P9 (1 bit)
P10 (6 bit)
P12 (4 bit)
P13 (2 bit)
P15 (4 bit)
8-bit Timer9
VREF
AGND
10-bit A/D
Converter
AI0 to AI3
P20 (8 bit)
P21 (5 bit)
FLASH media
USB DMA
transfer
DMA transfer bus
FD0 to FD7
FRDn
Flash media
DMA
(USB ↔
Transfer
RAM)
Transfer
RAM
USB
(Compliant
with ver1.1)
PUCTL
D+/D–
control
DMA
FWRn
FCLE
(512 bytes
× 4 banks)
(Media ↔
FALE
FRB
5/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
PIN CONFIGURATION (TOP VIEW)
VBUS
P9_0/VBUSIN
P6_0/EXINT0
P6_1/EXINT1
P6_2/EXINT2
P6_3/EXINT3
P7_6/PWM0OUT
P7_7/PWM1OUT
FLAMOD
VDD_CORE
P2_3/A19
P2_2/A18
P2_1/A17
P2_0/A16
VTM
1
5
75
70
65
60
55
P1_7/A15
P1_6/A14
P1_5/A13
P1_4/A12
P1_3/A11
P1_2/A10
P1_1/A9
P1_0/A8
P4_7/A7
P4_6/A6
P4_5/A5
P4_4/A4
P4_3/A3
P4_2/A2
P4_1/A1
P4_0/A0
P8_0/RXD1
P8_1/TXD1
P8_2/RXC1
P8_3/TXC1
10
15
20
25
GND
V
DD_IO
P10_0/SIOCK3
P10_1/SIOI3
P10_2/SIOO3
P10_3/SIOCK4
P10_4/SIOO4
P10_5/SIOI4
P15_0/RXD6
P15_1/TXD6
P15_2/RXC6
P15_3/TXC6
V
DD_CORE
GND
DD_IO
V
100-pin Plastic TQFP
A symbol with “n” suffixed indicates an active Low pin.
6/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
PIN CONFIGURATION (TOP VIEW)
P3_2/
RDn
P0_5/ P0_3/ P13_1/
D5 D3 EXINT9
VDD
_
NC
VDD_IO
NC
OSC0
GND
XT0
NMI
NC
N
M
L
CORE
P3_3/ P3_1/ P0_4/ P0_2/ P0_1/
WRn PSENn D4 D2 D1
P15.2/ P15_3/
RXC6 TXC6
GND
V
DD_IO OSC1n TEST
XT1n VDD_IO
P4_0/
A0
VDD
_
P0_7/ P0_6/ P0_0/ P13_0/
P15_0/ P15_1/
RXD6 TXD6
NC
NC
NC
NC
NC
NC
EAn
NC
NC
NC
NC
NC
RESn
CORE
D7
D6
D0
EXINT8
P4_2/
A2
P4_1/
A1
P10_4/ P10_2/ P10_5/
SIOO4 SIOO3 SIOI4
NC
NC
NC
NC
K
J
P4_4/ P4_5/ P4_3/
A4 A5 A3
P10_3/
NC
NC
NC
NC
NC
NC
NC
NC
SIOCK4
P4_6/ P4_7/ P1_0/
P10_0/ P10_1/
SIOCK3 SIOI3
V
DD_IO
H
G
F
A6
A7
A8
P1_1/ P1_2/
A9 A10
P8_3/ P8_2/
TXC1 RXC1
NC
GND
NC
P1_5/ P1_4/ P1_3/
P8_1/ P8_0/
TXD1 RXD1
A13
A12
A11
P7_6/
P7_7/
PWM1O
UT
P1_7/
A15
FLAMO
NC
NC
NC PWM0O
UT
E
D
C
B
A
D
P1_6/
A14
P6_2/
NC
P6_3/
NC
VTM
VREF
NC
NC
NC
NC
NC
NC
NC
EXINT2
EXINT3
P2_1/ P2_0/
A17 A16
P12_1/ P12_3/ P21_4/
P20_1/ P20_7/
P6_0/
NC
P6_1/
VDD_IO
GND
NC
D-
AI1
AI3
FRB
FD1
FD7
EXINT0
EXINT1
P2_3/ P2_2/
P21_1/ P21_3/
FWRn FALE
P20_2/ P20_3/ P20_5/
P9_0/
AGND
PUCTL
A19
NC
13
A18
FD2
FD3
FD5
GND
4
VBUSIN
VDD
_
P12_0/ P12_2/ P21_0/ P21_2 P20_0 P20_4/ P20_6/
D+
VBUS
NC
CORE
AI0
AI2
FRDn /FCLE
/FD0
FD4
FD6
12
11
10
9
8
7
6
5
3
2
1
144-pin Plastic LFBGA
A symbol with “n” suffixed indicates an active Low pin.
[Note] Don’t connect NC pins with others.
7/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
PIN DESCRIPTIONS
In the Type column, “I” indicates an input pin, “O” indicates an output pin, and “I/O” indicates an I/O pin.
A symbol with “n” suffixed indicates an active Low pin.
Classification
Port
Symbol
Description
Type
Type
I/O
Primary function
8-bit I/O port
Pull-up resistors can be
specified for each bit.
Secondary function
External memory access
data I/O port
P0_0/D0
to
P0_7/D7
I/O
P1_0/A8
to
I/O
I/O
I/O
8-bit I/O port
Pull-up resistors can be
specified for each bit.
4-bit I/O port
Pull-up resistors can be
specified for each bit.
1-bit I/O port
Pull-up resistors can be
specified.
O
O
O
External memory access
address output port
P1_7/A15
P2_0/A16
to
P2_3/A19
External memory access
address output port
P3_1/PSENn
External program memory
access read strobe output pin
P3_2/RDn
P3_3/WRn
O
1-bit output port
1-bit I/O port
Pull-up resistors can be
specified.
O
O
External data memory access
read strobe output pin
External data memory access
write strobe output pin
I/O
P4_0/A0
to
I/O
I/O
8-bit I/O port
Pull-up resistors can be
specified for each bit.
4-bit I/O port
Pull-up resistors can be
specified for each bit.
O
External memory access
address output port
P4_7/A7
P6_0/EXINT0
P6_1/EXINT1
P6_2/EXINT2
P6_3/EXINT3
P7_6/PWM0OUT
P7_7/PWM1OUT
I
I
I
I
O
O
External interrupt 0 input pin
External interrupt 1 input pin
External interrupt 2 input pin
External interrupt 3 input pin
PWM0 output pin
I/O
I/O
2-bit I/O port
Pull-up resistors can be
specified for each bit.
4-bit I/O port
Pull-up resistors can be
specified for each bit.
PWM1 output pin
P8_0/RXD1
P8_1/TXD1
P8_2/RXC1
P8_3/TXC1
I
O
I/O
I/O
SIO1 receive data input pin
SIO1 transmit data output pin
SIO1 receive clock I/O pin
SIO1 transmit clock I/O pin
8/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
Description
Classification
Symbol
Type
I/O
Primary function
1-bit I/O port
Type
I
Secondary function
Port
P9_0/VBUSIN
Vbus detect external interrupt
input pin (5V tolerant input)
Pull-up resistors can be
specified.
I/O
6-bit I/O port
Pull-up resistors can be
specified for each bit.
I/O
SIO3 transmit-receive clock I/O
pin
SIO3 receive data input pin
SIO3 transmit data input pin
P10_0/SIOCK3
P10_1/SIOI3
P10_2/SIOO3
I
O
I/O
SIO4 (with internal 32-byte
FIFO) transmit-receive clock I/O
pin
P10_3/SIOCK4
O
I
SIO4 (with internal 32-byte
P10_4/SIOO4
P10_5/SIOI4
FIFO) transmit data output pin
SIO4 (with internal 32-byte
FIFO) receive data output pin
P12_0/AI0 to
P12_3/AI3
I
I
4-bit input port
2-bit input port
4-bit I/O port
I
A/D converter analog input port
P13_0/EXINT8
P13_1/EXINT9
P15_0/RXD6
P15_1/TXD6
P15_2/RXC6
P15_3/TXC6
P20_0/FD0
to
P20_7/FD7
I
I
I
External interrupt 8 input pin
External interrupt 9 input pin
SIO6 receive data input pin
SIO6 transmit data output pin
SIO6 receive clock I/O pin
SIO6 transmit clock I/O pin
I/O
Pull-up resistors can be
specified for each bit.
O
I/O
I/O
I/O
I/O
8-bit I/O port
Pull-up resistors can be
specified for each bit.
NAND Flash Memory access
data I/O port
I/O
I/O
I/O
I/O
I/O
5-bit I/O port
Pull-up resistors can be
specified for each bit.
O
O
O
O
I
NAND Flash Memory access
read strobe output pin
NAND Flash Memory access
write strobe output pin
NAND Flash Memory access
CLE strobe output pin
NAND Flash Memory access
ALE strobe output pin
P21_0/FRDn
P21_1/FWRn
P21_2/FCLE
P21_3/FALE
P21_4/FRB
NAND Flash Memory access
Ready/Busy input pin
9/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
Classification
Power supply
Symbol
VDD_IO
Type
I
Description
IO Power supply pin
Connect all the VDD _IO pins.*
Core Power supply pin
VDD_CORE
I
Connect all the VDD _CORE pins.*
USB Power supply pin (Vbus input pin)
GND pin
VBUS
GND
I
I
Connect all the GND pins to GND.*
VREF
AGND
XT0
I
I
I
Analog reference voltage pin (Connect to the VDD pin when A/D converter
is not used.)
Analog GND pin (Connect to the GND pin when A/D converter is not
used.)
Oscillation
Sub-clock oscillation input pin
Connect to a crystal of f = 32.768 kHz.
Sub-clock oscillation output pin
Connect to a crystal of f = 32.768 kHz.
The clock output is opposite in phase to XT0.
Main clock oscillation input pin
Connect to a crystal or ceramic oscillator.
When an external clock is used, this pin is configured to be clock input.
Main clock oscillation output pin
Connect to a crystal or ceramic oscillator.
The clock output is opposite in phase to OSC0.
Leave this pin unconnected when an external clock is used.
D+ pin
XT1n
OSC0
OSC1n
O
I
O
USB I/F
D+
D–
I/O
I/O
D– pin
PUCTL
RESn
NMI
O
I
I
External control output pin
Reset input pin
Non-maskable interrupt input pin
Test pin
Reset
Others
TEST
I
Connect to the GND pin for normal operation.
Test pin
Connect to the GND pin for normal operation.
Flash ROM programming mode input pin
VTM
I
I
FLAMOD
When the FLAMOD pin is set to “L”, the device enters a programming
mode.
Connect to the VDD_IO pin when using as normal operation.
External program memory access input pin
EAn
I
When the EA pin is enabled (low level), the internal program memory is
masked and the CPU executes the program code in external program
memory through all address space.
* Connect all VDD_IO pins, all VDD_CORE pins and all GND pins.
If a device has one or more VDD_IO, VDD_CORE, or GND pins to which the power supply or the ground
potential is not connected, the family devices are not guaranteed to have normal operations.
10/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
DD_CORE
Condition
Rated value
Unit
V
V
GND = AGND = 0 V
Ta = 25°C
Digital power supply voltage
–0.3 to +4.6
V
DD_IO
VBUS
Other than P9_0
P9_0 (5 V tolerant input)
–0.3 to VDD_IO + 0.3
–0.3 to +0.6
–0.3 to VDD_IO + 0.3
–0.3 to +4.6
–0.3 to VREF
680
V
V
V
V
V
mW
mW
°C
Input voltage
VI
Output voltage
Analog reference voltage
Analog input voltage
VO
VREF
VAI
Ta = 70°C
per package
100-pin TQFP
144-pin LFBGA
Power dissipation
PD
595
–50 to +150
Storage temperature
TSTG
—
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
VDD_CORE
VDD_IO
VREF
Condition
fOSC ≤ 24 MHz
DD_CORE ≤ VDD_IO
Range
Unit
V
Digital power supply voltage
2.4 to 3.6
V
Analog reference voltage
Analog input voltage
VBUS input voltage
Memory hold voltage
VDD_CORE ≤ VREF
2.4 to 3.6
AGND to VREF
3.0 to 3.6
2.0 to 3.6
12, 16, 24
2 to 24
32.768
–30 to +70
20
V
V
V
V
VAI
VBUS
VDDH
—
—
fOSC = 0 Hz
USB is used
USB is unused
—
fOSC
MHz
Operating frequency
Ambient temperature
fXT
Ta
kHz
°C
—
—
MOS load
P7, P10_0 to P10_2
6
—
P0, P1, P2, P3, P4,
P6, P8, P9,
P10_3 to P10_5, P15,
P20, P21
Fan out
N
TTL load
1
—
11/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
ALLOWABLE OUTPUT CURRENT VALUES
(VDD_IO = 2.4 to 3.6 V, Ta = –30 to +70°C)
Parameter
“H” output pin (1 pin)
“H” output pins (sum total)
“L” output pin (1 pin)
Pin
All output pins
Sum total of all output pins
All output pins
Symbol
IOH
∑ IOH
IOL
Min.
—
—
Typ.
—
—
Max.
–10
–70
10
Unit
—
—
Sum total of P0, P3
mA
Sum total of P1, P2, P4
Sum total of P6, P7, P8, P9
Sum total of P10, P15
Sum total of P20, P21
Sum total of all output pins
35
“L” output pins (sum total)
∑ IOL
—
—
70
160
[Note] Connect all VDD_CORE and VDD_IO pins to the power supply voltage and all GND pins to the
ground voltage. If there is a pin or pins that are not connected to the power supply voltage on
ground voltage, the device cannot be guaranteed for normal operation.
INTERNAL FLASH ROM PROGRAMMING CONDITIONS
Parameter
Supply voltage
Symbol
Condition
Rating
Unit
V
V
DD_CORE
V
DD_CORE ≤ VDD_IO
2.4 to 3.6
VDD_IO
During Read
During Programming
–30 to +70
+0 to +50
100
°C
°C
Cycles
bytes
Ambient temperature
Ta
Endurance
Blocks size
CEP
—
—
—
128
12/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
ELECTRICAL CHARACTERISTICS
DC Characteristics 1 (Except USB port)
(VDD_CORE = VDD_IO = VREF = 2.4 to 3.6 V, GND = AGND = 0 V, Ta = –30 to +70°C)
Parameter
“H” input voltage
“H” input voltage
“L” input voltage
Symbol
Condition
Min.
0.80 VDD
0.80 VDD
–0.3
Typ.
—
—
Max.
5.5
VDD + 0.3
0.2VDD
Unit
*1
VIH
—
VIL
—
—
VDD
–
IO = –400 µA
—
—
—
—
—
—
—
—
0.4
“H” output voltage
“H” output voltage
*2
*3
VDD
0.8
VDD
0.4
VDD
0.8
–
IO = –2.0 mA
IO = –200 µA
IO = –1.0 mA
VOH
V
–
–
IO = 3.2 mA
IO = 5.0 mA
IO = 1.6 mA
IO = 2.5 mA
—
—
—
—
—
—
—
—
40
—
—
—
—
—
—
—
—
—
—
—
—
100
5
0.5
0.9
0.5
“L” output voltage
“L” output voltage
*2
*3
VOL
0.9
Input leakage current
Input current
Input current
Output leakage current
Pull-up resistance
Input capacitance
Output capacitance
*4, *6
*5
*7
*2, *3
1/–1
1/–90
15/–15
±10
200
—
—
5
5
IIH/IIL
VI = VDD/0 V
µA
ILO
Rpull
CI
VO = VDD/0 V
VI = 0 V
µA
kΩ
f
OSC = 1 MHz, Ta = 25°C
pF
CO
7
1.8
—
During A/D operation
When A/D is stopped
mA
µA
Analog reference supply current
VDD = VDD_IO
*1. Applicable to P9_0 (5 V tolerant input)
*2. Applicable to P7 and P10_0 to P10_2
IREF
*3. Applicable to P0, P1, P2, P3, P4, P6, P8, P9, P10_3 to P10_5, P15, P20 and P21
*4. Applicable to P12 and P13
*5. Applicable to RESn and FLAMOD
*6. Applicable to EAn, NMI, and TEST
*7. Applicable to OSC0
13/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
Supply Current
• Mask ROM version
(VDD_CORE = VDD_IO = VREF = 2.4 to 3.6 V, VBUS = 3.0 to 3.6 V, GND = AGND = 0 V, Ta = –30 to +70°C)
Applicable
Symbol
Condition
Min.
Typ.
Max.
Unit
power
supply
Mode
—
28
18
60
50
fosc = 24 MHz, No load
mA
fosc = 24 MHz, DMA/media
control stopped. No load
V
DD_CORE
CPU operation mode
IDD
+ VDD_IO
f
XT = 32.768 kHz, DMA/media
—
100
300
µA
control stopped. No load *1
Setting of 48 MHz for
multiplication selection.
No Load
fosc = 24 MHz, DMA/media
control stopped. No load
IBUS
—
—
25
9
45
18
mA
VBUS
USB operation mode
V
DD_CORE
+ VDD_IO
IDDH
IDDS
mA
HALT mode
STOP mode
—
—
15
10
160
150
XT is used *2
XT is not used *2
OSC is
stopped *1
V
DD_CORE
+ VDD_IO
µA
Suspend state
OSC is stopped, XT is not used * 1
Suspend current
ISUSP
—
1
100
µA
VBUS
The values in the Typ. Column indicate reference values at 25°C and 3.0 V (The VBUS currents indicate
values at 3.3 V).
*1: The temperature condition ranges from –30 to +50°C
*2: The ports used as inputs are at VDD_IO or 0 V. Other ports are unloaded.
• Flash ROM version
(VDD_CORE = VDD_IO = VREF = 2.4 to 3.6 V, VBUS = 3.0 to 3.6 V, GND = AGND = 0 V, Ta = –30 to +70°C)
Applicable
Symbol
IDD
Condition
Min.
—
Typ.
Max.
Unit
power
supply
Mode
28
18
60
50
fosc = 24 MHz, No load
mA
fosc = 24 MHz, DMA/media
control stopped. No load
V
DD_CORE
CPU operation mode
+ VDD_IO
fXT = 32.768 kHz, DMA/media
control stopped. No load *1
—
100
300
µA
Setting of 48 MHz for
multiplication selection
No Load
IBUS
—
—
25
10
45
20
mA
VBUS
USB operation mode
fosc = 24 MHz, DMA/media
control stopped. No load
V
DD_CORE
+ VDD_IO
IDDH
IDDS
mA
HALT mode
STOP mode
—
—
15
10
160
150
XT is used *2
XT is not used *2
OSC is
stopped *1
V
DD_CORE
+ VDD_IO
µA
Suspend state, D+/D– fixed
OSC is stopped, XT is not used * 1
Suspend current
ISUSP
—
1
100
µA
VBUS
The values in the Typ. Column indicate reference values at 25°C and 3.0 V (The VBUS currents indicate
values at 3.3 V).
*1: The temperature condition ranges from –30 to +50°C
*2: The ports used as inputs are at VDD_IO or 0 V. Other ports are unloaded.
14/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
DC Characteristics 2 (USB port)
(VBUS = 3.0 to 3.6V, Ta = –30 to +70°C)
Applicable
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
pin
Differential input sensitivity
VDI
VCM
VSE
|(D+) – (D–)|
Includes VDI
0.2
0.8
0.8
2.8
—
—
—
—
—
—
—
—
2.5
2.0
—
V
D+, D–
Differential common mode range
Single ended receiver threshold
15 kΩ to GND
V
V
V
D+, D–
PUCTL
“H” output voltage
VOH
IOH = –100 µA VBUS – 0.2
—
IOH = –4 mA
2.4
—
—
“L” output voltage
VOL
1.5 kΩ to 3.6 V
0.3
D+, D–
D+, D–
V
O = VBUS/0
V
—
—
—
—
±10
±10
Output leakage current
ILO
µA
VO = VBUS/0
V
PUCTL
15/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
AC Characteristics (Except USB port)
(1) External program memory control
(VDD_CORE = VDD_IO = VREF = 2.4 to 3.6 V, GND = AGND = 0 V, Ta = –30 to +70°C)
Parameter
Symbol
tcyc
Condition
fOSC = 24 MHz
Min.
41.67
Max.
—
Unit
Cycle time
Clock pulse width (HIGH level)
Clock pulse width (LOW level)
PSENn pulse width
tφWH
tφWL
tPW
16.25
16.25
(2 + 2n)tφ – 25
—
—
—
PSENn pulse delay time
Address setup time
Address hold time
Instruction setup time
Instruction hold time
tPD
tAS
tAH
tIS
—
2tφ – 25
–10
40
55
—
—
—
—
ns
VDD_CORE =
CL = 50 pF
tIH
0
Read data access time
tACC
—
(3 + 2n)tφ – 50
(Note) tφ = tcyc/2
n = 0 to 3 ( n wait cycles inserted)
tcyc
CPUCLK
PSENn
tφWH
tφWL
tPD
tPW
PC0 to 19
A0 to A19
D0 to D7
tAS
tAH
INST0 to 7
tIS
tACC
tIH
Bus timing during no wait cycle time
16/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
(2) External data memory control
(VDD_CORE = VDD_IO = VREF = 2.4 to 3.6 V, GND = AGND = 0 V, Ta = –30 to +70°C)
Parameter
Symbol
tcyc
Condition
fOSC = 24 MHz
Min.
41.67
Max.
—
Unit
Cycle time
Clock pulse width (HIGH level)
Clock pulse width (LOW level)
RDn pulse width
tφWH
tφWL
tRW
tWW
tRD
tWD
tAS
tAH
tRS
tRH
16.25
16.25
(2 + 2n)tφ – 25
(2 + 2n)tφ – 25
—
—
—
—
—
55
55
—
—
WRn pulse width
RDn pulse delay time
WRn pulse delay time
Address setup time
—
ns
CL = 50 pF
tφ – 20
tφ – 20
40
0
—
Address hold time
Read data setup time
Read data hold time
Read data access time
Write data setup time
Write data hold time
—
—
tACC
tWS
tWH
(3 + 2n)tφ – 50
2tφ – 30
tφ – 6
—
—
(Note) tφ = tcyc/2
n = 0 to 7 ( n wait cycles inserted)
tcyc
CPUCLK
RDn
tφWH
tφWL
tRW
RAP0 to 19
tRD
A0 to A19
tAS
tACC
tWD
tAS
tAH
DIN0 to 7
tRS
D0 to D7
WRn
tRH
tWW
RAP0 to 19
A0 to A19
D0 to D7
tAH
DOUT0 to 7
tWS
tWH
Bus timing during no wait cycle time
17/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
(3) Serial port control
1. Serial port 1, 6 (SIO1, 6)
Master mode (Clock synchronous serial port)
(VDD_CORE = VDD_IO = VREF = 2.4 to 3.6 V, GND = AGND = 0 V, Ta = –30 to +70°C)
Parameter
Symbol
tcyc
tSCKC
tSTMXS
tSTMXH
tSRMXS
tSRMXH
Condition
fOSC = 24 MHz
Min.
41.67
4 tcyc
2tφ – 10
5tφ – 20
21
Max.
—
—
—
—
Unit
Cycle time
Serial clock cycle time
Output data setup time
Output data hold time
Input data setup time
Input data hold time
ns
CL = 50 pF
—
—
0
(Note) tφ = tcyc/2
tcyc
CPUCLK
TXC/RXC
tSCKC
SDOUT
(TXD)
tSTMXH
tSTMXS
SDIN
(RXD)
tSRMXS
tSRMXH
18/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
Slave mode (Clock synchronous serial port)
(VDD_CORE = VDD_IO = VREF = 2.4 to 3.6 V, GND = AGND = 0 V, Ta = –30 to +70°C)
Parameter
Symbol
tcyc
tSCKC
tSTMXS
tSTMXH
tSRMXS
tSRMXH
Condition
fOSC = 24 MHz
Min.
41.67
4tcyc
2tφ – 30
4tφ – 20
21
Max.
—
—
—
—
Unit
Cycle time
Serial clock cycle time
Output data setup time
Output data hold time
Input data setup time
Input data hold time
ns
CL = 50 pF
—
—
7
(Note) tφ = tcyc/2
tcyc
CPUCLK
TXC/RXC
tSCKC
SDOUT
(TXD)
tSTMXH
tSTMXS
SDIN
(RXD)
tSRMXS
tSRMXH
19/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
2. Serial port 4 (SIO4)
Master mode (Clock synchronous serial port)
(VDD_CORE = VDD_IO = VREF = 2.4 to 3.6 V, GND = AGND = 0 V, Ta = –30 to +70°C)
Parameter
Symbol
tcyc
tSCKC
tSTMXS
tSTMXH
tSRMXS
tSRMXH
Condition
fOSC = 24 MHz
Min.
41.67
400
190
130
21
Max.
—
—
—
—
Unit
Cycle time
Serial clock cycle time
Output data setup time
Output data hold time
Input data setup time
Input data hold time
ns
CL = 50 pF
—
—
0
tcyc
CPUCLK
TXC/RXC
tSCKC
SDOUT
(TXD)
tSTMXH
tSTMXS
SDIN
(RXD)
tSRMXS
tSRMXH
20/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
Slave mode (Clock synchronous serial port)
(VDD_CORE = VDD_IO = VREF = 2.4 to 3.6 V, GND = AGND = 0 V, Ta = –30 to +70°C)
Parameter
Symbol
tcyc
tSCKC
tSTMXS
tSTMXH
tSRMXS
tSRMXH
Condition
fOSC = 24 MHz
Min.
41.67
400
70
180
21
Max.
—
—
—
—
Unit
Cycle time
Serial clock cycle time
Output data setup time
Output data hold time
Input data setup time
Input data hold time
ns
CL = 50 pF
—
—
7
tcyc
CPUCLK
TXC/RXC
tSCKC
SDOUT
(TXD)
tSTMXH
tSTMXS
SDIN
(RXD)
tSRMXS
tSRMXH
Measurement points for AC timing (except the serial port)
VDD_IO
0.44VDD_IO 0.44VDD_IO
0.16VDD_IO 0.16VDD_IO
0 V
Measurement points for AC timing (the serial port)
VDD_IO
0.8VDD_IO
0.2VDD_IO
0.8VDD_IO
0.2VDD_IO
0 V
21/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
A/D Converter Characteristics
(Ta = –30 to +70°C, VREF = 2.4 to 3.6 V, AGND = GND = 0 V)
Parameter
Resolution
Linearity error
Symbol
Condition
Min.
—
—
Typ.
10
—
Max.
—
±3
Unit
Bit
n
EL
Refer to measurement
circuit 1
Analog input source
Differential Linearity error
Zero scale error
Full-scale error
ED
EZS
EFS
—
—
—
—
—
—
±2
+3
–3
impedance
LSB
RI ≤ 5 kΩ
Refer to measurement
circuit 2
Set according to ADTM set
data
Cross talk
ECT
—
—
—
±1
Conversion time
tCONV
16
3906.3
µs/ch
Reference
voltage
VREF
VDD_IO
GND
+3 V
+
+
0.1
µF
47
µF
0.1
µF
47
µF
RI
–
+
AI0 to AI3
AGND
0 V
Analog input
CI
RI (impedance of analog input source) ≤ 5 kΩ
CI ≅ 0.1 µF
Measurement Circuit 1
22/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
Cross talk is the difference
Ω
5 k
–
+
between the A/D conversion
results when the same
analog input is applied to
AI0 through AI3 and the A/D
conversion results of the
circuit to the left.
AI0
AI1
Analog input
µ
0.1 F
to
AI3
VREF or AGND
Measurement Circuit 2
Definition of Terminology
1. Resolution
Resolution is the value of minimum discernible analog input.
With 10 bits, since 210 = 1024, resolution of (VREF – AGND) ÷ 1024 is possible.
2. Linearity error
Linearity error is the difference between ideal conversion characteristics and actual conversion characteristics
of a 10-bit A/D converter (not including quantization error).
Ideal conversion characteristics can be obtained by dividing the voltage between VREF and AGND into 1024
equal steps.
3. Differential linearity error
Differential linearity error indicates the smoothness of conversion characteristics. Ideally, the range of analog
input voltage that corresponds to 1 converted bit of digital output is 1LSB = (VREF – AGND) ÷ 1024.
Differential error is the difference between this ideal bit size and bit size of an arbitrary point in the conversion
range.
4. Zero scale error
Zero scale error is the difference between ideal conversion characteristics and actual conversion characteristics
at the point where the digital output changes from 000H to 001H.
5. Full-scale error
Full-scale error is the difference between ideal conversion characteristics and actual conversion characteristics
at the point where the digital output changes from 3FEH to 3FFH.
23/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
PACKAGE DIMENSIONS
(Unit: mm)
TQFP100-P-1414-0.50-K
Mirror finish
Package material
Lead frame material
Pin treatment
Package weight (g)
Rev. No./Last Revised
Epoxy resin
42 alloy
Solder plating (≥5µm)
0.55 TYP.
4/Oct. 28, 1996
5
Notes for Mounting the Surface Mount Type Packages
The surface mount type packages are very susceptible to heat in reflow mounting and humidity
absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person on the product
name, package name, pin number, package code and desired mounting conditions (reflow method,
temperature and times).
24/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
PACKAGE DIMENSIONS
(Unit: mm)
P-LFBGA144-1111-0.80
Package material
Ball material
Epoxy resin
Sn/Pb
Package weight (g)
Rev. No./Last Revised
0.30 TYP.
1/Aug. 25, 1999
5
Notes for Mounting the Surface Mount Type Packages
The surface mount type packages are very susceptible to heat in reflow mounting and humidity
absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person on the product
name, package name, pin number, package code and desired mounting conditions (reflow method,
temperature and times).
25/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
REVISION HISTORY
Page
Document
No.
Date
Description
Previous Current
Edition
–
Edition
–
PEDL66525-01
Oct. 2000
Preliminary edition 1
- Modified contents of P3_2 and P3_3 in the
table on Page 8.
- Added contents of P9_0 in the table on Page 9.
- Modified contents of PUCTL in the table on
Page 10.
- Partially added contents of “ABSOLUTE
MAXIMUM RATINGS”.
PEDL66525-02
Mar. 2001
–
–
- Partially added contents of “RECOMMENDED
OPERATING CONDITIONS”.
- Partially added contents of “ALLOWABLE
OUTPUT CURRENT VALUES”.
- Partially added contents of “INTERNAL FLASH
ROM PROGRAMMING CONDITIONS”.
- Partially added contents of “ELECTRICAL
CHARACTERISTICS”.
- Changed the name from ML66525 to
ML66525A.
- Changed the name from ML66Q525 to
ML66Q525A.
FEDL66525-01
FEDL66525-02
Oct. 2001
–
–
–
–
- Modified supply current values for ML66Q525
on Page 14.
- Modified contents of the table on Page 21.
- Changed the name from ML66525A to
ML66525B.
Jul. 19, 2002
- Changed the name from ML66Q525A to
ML66Q525B.
26/27
FEDL66525-02
OKI Semiconductor
ML66525 Family
NOTICE
1. The information contained herein can change without notice owing to product and/or technical improvements.
Before using the product, please make sure that the information being referred to is up-to-date.
2. The outline of action and examples for application circuits described herein have been chosen as an
explanation for the standard action and performance of the product. When planning to use the product, please
ensure that the external conditions are reflected in the actual circuit, assembly, and program designs.
3. When designing your product, please use our product below the specified maximum ratings and within the
specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating
temperature.
4. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation
resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or
unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified
maximum ratings or operation outside the specified operating range.
5. Neither indemnity against nor license of a third party’s industrial and intellectual property right, etc. is
granted by us in connection with the use of the product and/or the information and drawings contained herein.
No responsibility is assumed by us for any infringement of a third party’s right which may result from the use
thereof.
6. The products listed in this document are intended for use in general electronics equipment for commercial
applications (e.g., office automation, communication equipment, measurement equipment, consumer
electronics, etc.). These products are not authorized for use in any system or application that requires special
or enhanced quality and reliability characteristics nor in any system or application where the failure of such
system or application may result in the loss or damage of property, or death or injury to humans.
Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace
equipment, nuclear power control, medical equipment, and life-support systems.
7. Certain products in this document may need government approval before they can be exported to particular
countries. The purchaser assumes the responsibility of determining the legality of export of these products
and will take appropriate and necessary steps at their own expense for these.
8. No part of the contents contained herein may be reprinted or reproduced without our prior permission.
Copyright 2002 Oki Electric Industry Co., Ltd.
27/27
ML66Q525B-XXTB 相关器件
| 型号 | 制造商 | 描述 | 价格 | 文档 |
| ML66Q592-XXXTCZ200 | OKI | Microcontroller, 16-Bit, FLASH, 28MHz, CMOS, PQFP144, 20 X 20 MM, 0.50 MM PITCH, PLASTIC, LQFP-144 | 获取价格 |
|
| ML670100 | OKI | OKIs High-Performance CMOS 32-Bit Single Chip Microcontroller | 获取价格 |
|
| ML6701A | MITSUBISHI | AIGaAs Laser Diodes emitting light beams around 780nm wavelength | 获取价格 |
|
| ML671000 | OKI | OKI’s CMOS 32-Bit Single-Chip Microcontroller with Built-in USB Device Controller | 获取价格 |
|
| ML672 | PYRAMID | Quad 2-Input “Nand” Gate | 获取价格 |
|
| ML674000 | OKI | 32-bit General-purpose, ARM-based Microcontroller | 获取价格 |
|
| ML674000TB | OKI | RISC Microcontroller, 32-Bit, 33.333MHz, CMOS, PQFP128, 14 X 14 MM, 0.40 MM PITCH, PLASTIC, TQFP-128 | 获取价格 |
|
| ML674001 | OKI | 32-bit ARM-Based General-Purpose Microcontroller | 获取价格 |
|
| ML674001LA | OKI | RISC Microcontroller, 32-Bit, MROM, 33.333MHz, CMOS, PBGA144, 11 X 11 MM, 0.80 MM PITCH, PLASTIC, LFBGA-144 | 获取价格 |
|
| ML674001TC | OKI | RISC Microcontroller, 32-Bit, MROM, 33.333MHz, CMOS, PQFP144, 20 X 20 MM, 0.50 MM PITCH, PLASTIC, LQFP-144 | 获取价格 |
|
ML66Q525B-XXTB 相关文章
Bourns 密封通孔金属陶瓷微调电位计产品选型手册(英文版)
- 2024-09-20
- 6
Bourns 精密环境传感器产品选型手册(英文版)
- 2024-09-20
- 9
Bourns POWrTher 负温度系数(NTC)热敏电阻手册 (英文版)
- 2024-09-20
- 8
Bourns GMOV 混合过压保护组件产品选型手册(英文版)
- 2024-09-20
- 6
