MSC2343257A-60DS8 [OKI]
EDO DRAM Module, 4MX32, 60ns, CMOS, SIMM-72;
| 型号： | MSC2343257A-60DS8 |
| 厂家： | 
OKI ELECTRONIC COMPONETS |
| 描述： | EDO DRAM Module, 4MX32, 60ns, CMOS, SIMM-72 动态存储器 内存集成电路 |
| 文件： | 总8页 (文件大小：65K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
¡ Semiconductor
MSC2343257A-xxBS8/DS8
4,194,304-Word ¥ 32-Bit DRAM MODULE : FAST PAGE MODE TYPE WITH EDO
1
DESCRIPTION
The Oki MSC2343257A-xxBS8/DS8 is a fully decoded 4,194,304-word ¥ 32-bit CMOS dynamic
randomaccessmemorycomposedofeight 16-MbDRAMs(4M¥4)inSOJ.Themountingofeight
DRAMs together with decoupling capacitors on a 72-pin glass epoxy SIMM Package supports
any application where high density and large capacity of storage memory are required.
FEATURES
• 4,194,304-word ¥ 32-bit organization
• 72-pin SIMM
MSC2343257A-xxBS8 : Gold tab
MSC2343257A-xxDS8 : Solder tab
• Single 5 V supply ±10% tolerance
• Input
: TTL compatible
• Output : TTL compatible, 3-state, nonlatch
• Refresh : 2048 cycles/32 ms
• CAS before RAS refresh, CAS before RAS hidden refresh, RAS-only refresh capability
• Multi-bit test mode capability
• Fast Page Mode with EDO capability
PRODUCT FAMILY
Access Time (Max.)
Power Dissipation
Cycle Time
(Min.)
Family
tRAC
60 ns
70 ns
tAA
tCAC
15 ns
20 ns
Operating (Max.) Standby (Max.)
MSC2343257A-60BS8/DS8
MSC2343257A-70BS8/DS8
5280 mW
44 mW
30 ns
35 ns
110 ns
130 ns
4840 mW
101
MSC2343257A-xxBS8/DS8
¡ Semiconductor
PIN CONFIGURATION
MSC2343257A-xxBS8/DS8
(Unit : mm)
5.28 Max.
* 1
107.95 0.2
101.19 Typ.
3.38 0.2
φ3.18
25.4 0.2
Typ.
Typ.
10.16
1
72
3.7 Min.
6.35
2.03 Typ.
R1.57
6.35
+0.1
1.04 Typ.
1.27 0.1
1.27
–0.08
6.35 Typ.
95.25
*1 The common size difference of the board width 12.5 mm of its height is
specified as 0.2. The ꢀaꢁle aboꢀe 12.5 mm is specified as 0.5.
Pin No. Pin Name Pin No. Pin Name Pin No. Pin Name Pin No. Pin Name Pin No. Pin Name
1
2
VSS
DQ0
DQ16
DQ1
DQ17
DQ2
DQ18
DQ3
DQ19
VCC
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
A4
A5
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
A8
A9
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
NC
61
62
63
64
65
66
67
68
69
70
71
72
DQ13
DQ30
DQ14
DQ31
DQ15
NC
WE
3
A6
NC
NC
4
A10
DQ4
DQ20
DQ5
DQ21
DQ6
DQ22
DQ7
DQ23
A7
RAS2
NC
DQ8
5
DQ24
DQ9
6
NC
7
NC
DQ25
DQ10
DQ26
DQ11
DQ27
DQ12
DQ28
VCC
PD1
PD2
PD3
PD4
NC
8
NC
9
VSS
10
11
12
13
14
15
CAS0
CAS2
CAS3
CAS1
RAS0
NC
NC
A0
VSS
A1
A2
NC
A3
Vcc
DQ29
Presence Detect Pins
MSC2343257A
MSC2343257A
Pin No.
Pin Name
-60BS8/DS8
-70BS8/DS8
67
68
69
70
PD1
PD2
PD3
PD4
VSS
NC
NC
NC
VSS
NC
VSS
NC
102
¡ Semiconductor
MSC2343257A-xxBS8/DS8
BLOCK DIAGRAM
A0 - A10
RAS0
CAS0
1
RAS2
CAS2
WE
DQ
DQ
DQ
DQ
DQ0
DQ1
DQ2
DQ3
DQ
DQ
DQ
DQ
DQ16
DQ17
DQ18
DQ19
A0 - A10
RAS
CAS
WE
VCC
A0 - A10
RAS
CAS
WE
VCC
OE
OE
VSS
VSS
DQ
DQ
DQ
DQ
DQ4
DQ5
DQ6
DQ7
DQ
DQ
DQ
DQ
DQ20
DQ21
DQ22
DQ23
A0 - A10
RAS
CAS
WE
VCC
A0 - A10
RAS
CAS
WE
VCC
OE
OE
VSS
VSS
DQ
DQ
DQ
DQ
DQ8
DQ9
DQ10
DQ11
DQ
DQ
DQ
DQ
DQ24
DQ25
DQ26
DQ27
A0 - A10
RAS
CAS
WE
VCC
A0 - A10
RAS
CAS
WE
VCC
OE
OE
VSS
VSS
DQ
DQ
DQ
DQ
DQ12
DQ13
DQ14
DQ15
DQ
DQ
DQ
DQ
DQ28
DQ29
DQ30
DQ31
A0 - A10
RAS
CAS
WE
VCC
A0 - A10
RAS
CAS
WE
VCC
OE
OE
VSS
VSS
CAS1
CAS3
VCC
C1
C8
VSS
103
MSC2343257A-xxBS8/DS8
¡ Semiconductor
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Parameter
Symbol
VIN, VOUT
VCC
Rating
–1.0 to 7.0
–1.0 to 7.0
50
Unit
V
Voꢁtage on Any Pin Reꢁatiꢀe to VSS
Voꢁtage VCC Slppꢁy Reꢁatiꢀe to VSS
Short Circlit Oltplt Clrrent
Power Dissipation
V
IOS
mA
W
PD
8
Operating Temperatlre
Topr
0 to 70
–40 to 125
°C
°C
Storage Temperatlre
Tstg
Note:
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to the conditions as detailed in the
operationalsectionsofthisdatasheet. Exposuretoabsolutemaximumratingconditions
for extended periods may affect device reliability.
Recommended Operating Conditions
(Ta = 0°C to 70°C)
Parameter
Symbol
VCC
Min.
4.5
0
Typ.
5.0
0
Max.
5.5
0
Unit
V
V
V
V
Power Slppꢁy Voꢁtage
VSS
VIH
2.4
–1.0
—
6.5
0.8
Inplt High Voꢁtage
Inplt Low Voꢁtage
VIL
—
Capacitance
(Ta = 25°C, f = 1 MHz)
Parameter
Symbol
CIN1
Typ.
Max.
57
Unit
pF
Inplt Capacitance (A0 - A10)
Inplt Capacitance (WE)
—
—
—
—
—
CIN2
65
pF
Inplt Capacitance (RAS0, RAS2)
Inplt Capacitance (CAS0 - CAS3)
I/O Capacitance (DQ0 - DQ31)
CIN3
35
pF
CIN4
20
pF
CDQ
16
pF
Note :
Capacitance measured with Boonton Meter.
104
¡ Semiconductor
MSC2343257A-xxBS8/DS8
DC Characteristics
(VCC = 5 V 10ꢂ, Ta = 0°C to 70°C)
MSC2343257A
-60BS8/DS8
MSC2343257A
-70BS8/DS8
Min. Max.
Parameter
Symbol
Condition
Unit Note
Min.
Max.
1
0 V £ VI £ 6.5 V;
ILI Aꢁꢁ other pins not
lnder test = 0 V
–80
80
–80
80
µA
Inplt Leakage Clrrent
DOUT disabꢁe
–10
10
–10
10
µA
Oltplt Leakage Clrrent ILO
0 V £ VO £ 5.5 V
2.4
0
VCC
0.4
2.4
0
VCC
0.4
V
V
Oltplt High Voꢁtage
Oltplt Low Voꢁtage
Aꢀerage Power
Slppꢁy Clrrent
(Operating)
VOH IOH = –5.0 mA
VOL IOL = 4.2 mA
RAS, CAS cycꢁing,
1, 2
mA
ICC1
—
960
—
880
tRC = Min.
RAS, CAS = VIH
ICC2 RAS, CAS
≥ VCC –0.2 V
—
—
16
8
—
—
16
8
mA
mA
1
1
Power Slppꢁy
Clrrent (Standby)
Aꢀerage Power
RAS cycꢁing,
ICC3 CAS = VIH,
tRC = Min.
—
—
—
960
960
—
—
—
880
880
mA
mA
mA
1, 2
1, 2
1, 3
Slppꢁy Clrrent
(RAS-onꢁy Refresh)
Aꢀerage Power
RAS cycꢁing,
Slppꢁy Clrrent
ICC6 CAS before RAS,
tRC = Min.
(CAS before RAS Refresh)
Aꢀerage Power
RAS = VIL,
ICC7 CAS cycꢁing,
tHPC = Min.
1120
1040
Slppꢁy Clrrent
(Fast Page Mode)
Notes: 1. I Max. is specified as I for output open condition.
CC
CC
2. Address can be changed once or less while RAS=V .
IL
3. Address can be changed once or less while CAS=V
.
IH
105
MSC2343257A-xxBS8/DS8
AC Characteristics (1/2)
Parameter
¡ Semiconductor
(VCC = 5 V 10ꢂ, Ta = 0°C to 70°C) Note 1,2,3,10,11
MSC2343257A
-60BS8/DS8
MSC2343257A
-70BS8/DS8
Symbol
Unit Note
Min.
110
25
—
—
—
—
0
Max.
—
—
60
15
30
35
—
—
15
15
15
50
32
—
10k
100k
—
—
10k
—
—
—
45
30
—
—
—
—
—
—
—
Min.
130
30
—
—
—
—
0
Max.
—
—
70
20
35
40
—
—
20
20
20
50
32
—
10k
100k
—
—
10k
—
—
—
50
35
—
—
—
—
—
—
—
Random Read or Write Cycꢁe Time
Fast Page Mode Cycꢁe Time
tRC
tHPC
tRAC
tCAC
tAA
ns
ns
Access Time from RAS
ns 4, 5, 6
Access Time from CAS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4, 5
4, 6
4
Access Time from Coꢁlmn Address
Access Time from CAS Precharge
Oltplt Low Impedance Time from CAS
Oltplt Hoꢁd Time from CAS Low
CAS to Data Oltplt Blffer Tlrn-off Deꢁay Time tCEZ
RAS to Data Oltplt Blffer Tlrn-off Deꢁay Time tREZ
tCPA
tCLZ
tDOH
4
5
5
0
0
7, 8
7, 8
7
0
0
WE to Data Oltplt Blffer Tlrn-off Deꢁay Time
Transition Time
tWEZ
tT
tREF
tRP
0
0
2
2
3
Refresh Period
—
40
60
60
15
10
10
40
10
35
20
15
60
0
—
50
70
70
20
10
10
45
10
40
20
15
70
0
RAS Precharge Time
RAS Plꢁse Width
tRAS
tRASP
tRSH
tCP
RAS Plꢁse Width (Fast Page Mode)
RAS Hoꢁd Time
CAS Precharge Time
CAS Plꢁse Width
tCAS
tCSH
tCRP
tRHCP
tRCD
tRAD
tRSCD
tASR
tRAH
tASC
tCAH
tAR
RAS Low to CAS High Deꢁay Time
CAS High to RAS Low Deꢁay Time
RAS Hoꢁd Time from CAS Precharge
RAS to CAS Deꢁay Time
5
6
RAS to Coꢁlmn Address Deꢁay Time
RAS to Second CAS Deꢁay Time
Row Address Set-lp Time
Row Address Hoꢁd Time
10
0
10
0
Coꢁlmn Address Set-lp Time
Coꢁlmn Address Hoꢁd Time
Coꢁlmn Address Hoꢁd Time from RAS
Coꢁlmn Address to RAS Lead Time
10
40
30
15
45
35
tRAL
106
¡ Semiconductor
AC Characteristics (2/2)
Parameter
MSC2343257A-xxBS8/DS8
(VCC = 5 V 10ꢂ, Ta = 0°C to 70°C) Note 1,2,3,10,11
MSC2343257A
-60BS8/DS8
MSC2343257A
-70BS8/DS8
Symbol
Unit Note
Min.
0
Max.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Min.
0
Max.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1
Read Command Set-lp Time
Read Command Hoꢁd Time
tRCS
tRCH
ns
0
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
9
9
Read Command Hoꢁd Time referenced to RAS tRRH
0
0
Write Command Set-lp Time
Write Command Hoꢁd Time
tWCS
tWCH
tWCR
tWP
0
0
10
45
10
5
15
50
10
10
20
20
0
Write Command Hoꢁd Time from RAS
Write Command Plꢁse Width
Write Command Plꢁse Width (Oltplt Disabꢁe) tWPE
Write Command to RAS Lead Time
Write Command to CAS Lead Time
Data-in Set-lp Time
tRWL
tCWL
tDS
15
15
0
Data-in Hoꢁd Time
tDH
15
40
10
10
20
10
10
10
20
15
45
10
10
20
10
10
10
20
Data-in Hoꢁd Time from RAS
tDHR
CAS Actiꢀe Deꢁay Time from RAS Precharge tRPC
RAS to CAS Set-lp Time (CAS before RAS) tCSR
RAS to CAS Hoꢁd Time (CAS before RAS)
tCHR
WE to RAS Precharge Time (CAS before RAS) tWRP
WE Hoꢁd Time from RAS (CAS before RAS) tWRH
RAS to WE Set-lp Time (Test Mode)
RAS to WE Hoꢁd Time (Test Mode)
tWTS
tWTH
107
MSC2343257A-xxBS8/DS8
¡ Semiconductor
Notes:
1. A start-up delay of 200 µs is required after power-up, followed by a minimum of eight
initializationcycles(RAS-onlyrefreshorCASbeforeRASrefresh)beforeproperdevice
operation is achieved.
2. The AC characteristics assume t = 5 ns.
T
3. V (Min.) and V (Max.) are reference levels for measuring input timing signals.
IH
IL
Transition times (t ) are measured between V and V .
T
IH
IL
4. This parameter is measured with a load circuit equivalent to 2 TTL loads and 100 pF.
5. Operation within the t
(Max.) limit ensures that t
(Max.) can be met.
is greater than the specified
RCD
RAC
RCD
t
(Max.) is specified as a reference point only. If t
RCD
t
(Max.) limit, access time is controlled by t
.
RCD
CAC
6. Operation within the t
(Max.) limit ensures that t
(Max.) can be met.
is greater than the specified
RAD
RAC
RAD
t
(Max.) is specified as a reference point only. If t
RAD
t
(Max.) limit, access time is controlled by t
.
RAD
AA
7. t
(Max.), t
(Max.) and t
(Max.) define the time at which the output achieves
CEZ
REZ
WEZ
the open circuit condition and are not referenced to output voltage levels.
8. t
9. t
and t
must be satisfied for open circuit condition.
CEZ
REZ
or t
must be satisfied for a read cycle.
RCH
RRH
10. The test mode is initiated by performing a WE and CAS before RAS refresh cycle.
This mode is latched and remains in effect until the exit cycle is generated.
The test mode specified in this data sheet is an 8-bit parallel test function. CA0, CA1
and CA10 are not used. In a read cycle, if all internal bits are equal, the DQ pin will
indicate a high level. If any internal bits are not equal, the DQ pin will indicate a low
level. The test mode is cleared and the memory device returned to its normal
operatingstatebyperformingaRAS-onlyrefreshcycleoraCASbeforeRAS refresh
cycle.
The 4M ¥ 32 module can be tested as an 1M ¥ 32 module in this test mode.
11. In a test mode read cycle, the access time parameters are delayed by 5 ns. The test
mode parameters are obtained by adding 5 ns to the normal read cycle values.
See ADDENDUM I for AC Timing Waveforms
108
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