MSM27C1652CZ-NTS [OKI]

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Semiconductor

MSM27C1652CZ

1,048,576-Word x 16-Bit or 2,097,152-Word x 8-Bit

8-Word x 16-Bit or 16-Word x 8-Bit Page Mode One Time PROM

DESCRIPTION

1A

The MSM27C1652CZ is a 16Mbit electrically Programmable Read-Only Memory with page mode.

Its configuration can be electrically switched between 1,048,576 word x 16bit and 2,097,152 word x

8bit. The MSM27C1652CZ operates on a single +5V power supply and is TTL compatible. The

MSM27C1652CZ provides Page mode which can greatly reduce the read access time. Since the

MSM27C1652CZ operates asynchronously , external clocks are not required , making this device

easy-to-use. The MSM27C1652CZ is suitable as large-capacity fixed memory for microcomputers

and data terminals. It is manufactured using a CMOS double silicon gate technology and is offered

in 42-pin DIP , 44-pin SOP or 48-pin TSOP packages.

FEATURES

• 1,048,576 word x 16bit / 2,097,152 word x 8bit electrically switchable configuration

• Single +5V power supply

• Access time 100ns

Page mode access time 50ns

• Input / Output TTL compatible

• Three-state output

• Packages

42-pin plastic DIP (DIP42-P-600-2.54)

44-pin plastic SOP (SOP44-P-600-1.27-K)

48-pin plastic TSOP (TSOP II 48-P-550-0.80-K)

1

MSM27C1652CZ

PIN CONFIGURATION (TOP VIEW)

NC 1

NC 2

A18 1

A17 2

A7 3

A6 4

A5 5

A4 6

A3 7

A2 8

A1 9

A0 10

CE 11

V

SS

12

OE 13

D0 14

D8 15

D1 16

D9 17

D2 18

D10 19

D3 20

D11 21

42 A19

41 A8

40 A9

39 A10

38 A11

37 A12

36 A13

35 A14

34 A15

33 A16

32 BYTE/Vpp

31 V

SS

30 D15/A-1

29 D7

28 D14

27 D6

26 D13

25 D5

24 D12

23 D4

22 V

CC

42-pin DIP

NC 1

A18 2

A17 3

A7 4

A6 5

A5 6

A4 7

A3 8

A2 9

A1 10

A0 11

CE 12

V

SS

13

OE 14

D0 15

D8 16

D1 17

D9 18

D2 19

D10 20

D3 21

D11 22

44 NC

43 A19

42 A8

41 A9

40 A10

39 A11

38 A12

37 A13

36 A14

35 A15

34 A16

33 BYTE/Vpp

32 V

SS

31 D15/A-1

30 D7

29 D14

28 D6

27 D13

26 D5

25 D12

24 D4

23 V

CC

44-pin SOP

NC 3

A18 4

A17 5

A7 6

A6 7

A5 8

A4 9

A3 10

A2 11

A1 12

A0 13

CE 14

V

SS

15

OE 16

D0 17

D8 18

D1 19

D9 20

D2 21

D10 22

D3 23

D11 24

48 NC

47 NC

46 NC

45 A19

44 A8

43 A9

42 A10

41 A11

40 A12

39 A13

38 A14

37 A15

36 A16

35 BYTE/Vpp

34 V

SS

33 D15/A-1

32 D7

31 D14

30 D6

29 D13

28 D5

27 D12

26 D4

25 V

CC

48-pin TSOP

PIN NAMES

D15/A-1

A0 - A19

D0 - D14

CE

OE

V

CC

V

SS

BYTE/V

PP

NC

Address input

Data output

Chip enable

Output enable

FUNCTIONS

Data output / Address input

Power supply voltage

GND

Mode switch / Program power supply voltage

Non connection

2

MSM27C1652CZ

BLOCK DIAGRAM

A-1

X8/X16 Switch

CE

OE

BYTE/V

PP

CE

OE

PGM

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

Row Decoder

Memory Matrix

Address Buffer

1,048,576X16-Bit or 2,097,152X8-Bit

Column Decoder

Multiplexer & Page Data Latch

Output Buffer

D0

D1

D2

D3

D4

D5

D6

D7

D8

D10

D9

D12

D14

D15

D11

D13

In 8-bit output mode, these pins are

three-stated and pin D15 functions

as the A-1 address pin.

FUNCTION TABLE

MODE

READ (16-Bit)

READ (8-Bit)

OUTPUT DISABLE

STAND-BY

PROGRAM

PROGRAM INHIBIT

PROGRAM VERIFY

* : Don't Care

3

CE

L

L

L

H

L

H

H

OE BYTE/V

PP

L

L

H

*

H

H

L

11.5V

6.25V

H

L

H

L

H

L

4.5V

to

5.5V

D

OUT

V

CC

D0 - D7

D8 - D14

D

OUT

Hi-Z

Hi-Z

*

Hi-Z

*

D

IN

Hi-Z

D

OUT

D15/A-1

L/H

MSM27C1652CZ

ABSOLUTE MAXIMUM RATINGS

Parameter

Operating temperature under bias

Storage temperature

Input voltage

Output voltage

Power supply voltage

Program power supply voltage

Power dissipation per package

Symbol

Topr

T

stg

V

I

V

O

V

CC

V

PP

P

D

-

relative to V

SS

Condition

-

Value

0 to 70

-55 to 125

-0.5 to V

CC

+ 0.5

-0.5 to V

CC

+ 0.5

-0.5 to 7

-0.5 to 12.5

1.0

Unit

°C

°C

V

V

V

V

W

RECOMMENDED OPERATING CONDITIONS FOR READ

(Ta=0 to 70

°C)

Parameter

V

CC

power supply voltage

V

PP

power supply voltage

Input "H" level

Input "L" level

Voltage is relative to Vss

Symbol

V

CC

V

PP

V

IH

V

IL

V

CC

=4.5V - 5.5V

Condition

Min.

4.5

-0.5

2.2

-0.5

Typ.

-

-

-

-

Max.

5.5

V

CC

+0.5

V

CC

+0.5

0.8

Unit

V

V

V

V

4

MSM27C1652CZ

ELECTRICAL CHARACTERISTICS (Read operation)

DC Characteristics

(V

CC

=5V

±

0.5V, Ta=0 to 70

°

C)

Parameter

Input leakage current

Output leakage current

V

CC

power supply current

(Standby)

V

CC

power supply current

(Read)

V

PP

power supply current

Input "H" level

Input "L" level

Output "H" level

Output "L" level

Voltage is relative to Vss

AC Characteristics

(V

CC

=5V

±

0.5V, Ta=0 to 70°C)

Parameter

Random access cycle time

Address access time

Page set up time

Page access cycle time

Page access time

CE access time

OE access time

Output disable time

Output hold time

Symbol

T

C

T

ACC

T

PSET

T

PC

T

PAC

T

CE

T

OE

T

CHZ

T

OHZ

T

OH

Condition

-

CE=OE=V

IL

NOTE(1)

-

-

OE=V

IL

CE=V

IL

OE=V

IL

CE=V

IL

CE=OE=V

IL

Min.

100

-

120

50

-

-

-

0

0

0

Max.

-

100

-

-

50

100

50

40

35

-

Unit

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

Symbol

I

LI

I

LO

I

CS1

I

CS2

I

CCA

I

PP

V

IH

V

IL

V

OH

V

OL

Condition

V

I

=0 to Vcc

V

O

=0 to Vcc

CE=V

CC

CE=V

IH

CE=V

IL ,

OE=V

IH

tc=100ns

V

PP

=V

CC

-

-

I

OH

=-400µA

I

OL

=2.1mA

Min.

-

-

-

-

-

-

2.2

-0.5

2.4

-

Typ.

-

-

-

-

-

-

-

-

-

-

Max.

10

10

50

1

100

10

V

CC

+0.5

0.8

-

0.45

Unit

µA

µA

µA

mA

mA

µA

V

V

V

V

NOTE(1) T

PSET

is defined as the end of either CE trailing edge or address transition in random access

term until the first page address transition.

Measurement conditions

Input signal level

Input timing reference level

Output load

Output timing reference level

0V/3V

0.8V/2.0V

1TTL gate + 100pF

0.8V/2.0V

1.7V

400

Output

100pF (including jig capacitance)

5