MSM9560GS-2K [OKI]
IC for FM Multiplex Data Demodulation; IC的FM多重数据解调
| 型号： | MSM9560GS-2K |
| 厂家： | 
OKI ELECTRONIC COMPONETS |
| 描述： | IC for FM Multiplex Data Demodulation |
| 文件： | 总8页 (文件大小：99K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
E2F0011-29-32
This version: Mar. 1999
Previous version: Jun. 1998
¡ Semiconductor
MSM9560
IC for FM Multiplex Data Demodulation
GENERAL DESCRIPTION
TheMSM9560isanICwhichdemodulatesFMcharactermultiplexsignalsintheDARC(DataRadio
*1
Channel) formattoobtaindigitaldata. TheMSM9560operatesat4.5to5.5V. IntheDARCsystem,
16kbpsofdigitaldataL-MSKmodulatedat76kHzismultiplexedonanordinaryFMbroadcastbase
band signal.
The MSM9560 contains on one chip a band pass filter using a switched capacitor filter (SCF) and a
group of circuits including a frame synchronization circuit and an error correction circuit.
By connecting an external FM receiver and memory for temporary data storage and by controlling
them by the CPU, a system for obtaining digital data can easily be constructed.
The FM multiplex demodulation ICs, the MSM9500-series devices, are configured with minimum
functions;so they will, merely by making changes to the software of the external microcomputer, be
able to respond flexibly to the many FM multiplex broadcast services that are going to come about
in the future.
The MSM9560 is best suited to radios and information processing devices that support DARC FM
multiplex broadcasting. It is also best suited to car radios and car navigation systems.
*1 DARC is a registered trademark of NHK Engineering Services.
Any manufacturer licensed by NHK Engineering Service can manufacture and sell products that
utilize the DARC technology.
For detailed information on license, please contact:
NHK Engineering Service
Phone: 81-3481-2650
FEATURES
• Pin compatible with MSM9552/MSM9553
• Built-in bandpass filter (SCF)
• Built-in block synchronization circuit and frame synchronization circuit
• Setting of the number of synchronization protection steps can be changed
• Data clocks are regenerated by digital PLL
• 1T delay detection
• Built-in vertical and horizontal error correction circuits
• Built-in layer 4 and layer 2 CRC processing circuit
• Parallel interface with microcontroller
• Clock output for external devices (64 kHz to 8.192 MHz variable)
• Compatible with the international standard frame format (ITU-R Rec. BS1194)
• Power supply: 4.5 to 5.5 V
• Package:
44-pin plastic QFP (QFP44-P-910-0.80-2K) (Product name: MSM9560GS-2K)
1/7
Limiter
Variable
gain
AMP
BPF
(SCF)
+
–
AIN
Clock
regeneration
Block
synchronization
Frame
synchronization
Timing
control
LPF
Vref
SG
Filter Section
Error
PN
34Byte RAM
Read/Write
register
correction
&
Descrambler
¥
Layer 4 CRC
2
Layer 2 CRC
IC internal
clock
D
DB2
Q
CK
WR31
Data bus
1T delay
circuit
CLR
DVDD
Address bus
Limiter
Digital Signal
Processing Section
CPU interface
LPF
+
Frequency
divider
–
Delay Detection Section
Data bus
DB0-DB7
Address
AD0-AD5
RD WR CS CLR INT
XOUTC
XOUT
XTAL2
XTAL1
¡ Semiconductor
MSM9560
PIN CONFIGURATION (TOP VIEW)
MON
1
33
32
31
30
29
28
27
26
25
24
23
A0
ADETIN
AVDD
AGND
SG
2
3
XOUT
CS
4
XTAL2
XTAL1
DVDD
5
AIN
6
XOUTC
DGND
7
DB7
DB6
DB5
MOUT0
MOUT1
MOUT2
MOUT3
8
9
10
11
DB4
NC : No-connection pin
44-Pin Plastic QFP
3/7
¡ Semiconductor
MSM9560
PIN DESCRIPTIONS
Function
Pin
16
Symbol
WR
Type
Description
Write signal to internal register.
Read signal to internal register.
Microcontroller
Interface
I
I
18
RD
15
INT
O
Interrupt signal to microcontroller. "L": An interrupt is
generated.
31
40
CS
CLR
I
I
Chip select signal.
"L": Read, write, and data bus signals become active.
"L" : the internal registers are initialized and the device enters
power down mode.
33 to 38
A0 to A5
I
I/O
I
Address signal to internal register.
Data bus signal to internal register.
FM multiplex signal input.
19 to 26 DB0 to DB7
6
5
AIN
SG
Tuner
Interface
O
Analog reference voltage output pin. Connect a capacitor
between this pin and analog ground to prevent noise.
1
MON
O
Analog section waveform monitoring pin. The analog block
mode setting is specified by the analog control register.
Analog
Section Test
2
41
ADETIN
IORD
I
I
Analog signal input pin for testing.
Digital
Section Test
Digital section test signal input pins. Internally pulled up.
42
IOWR
8 to 14
MOUT0 to
MOUT6
O
Digital section test signal output and monitor output pins.
29
30
32
XTAL1
XTAL2
XOUT
I
8.192 MHz crystal connection pin.
8.192 MHz crystal connection pin.
Clock
O
O
Pin for supply of 64 kHz to 8.192 MHz variable clock to the
outside.
7
3
XOUTC
AVDD
I
XOUT output control pin.
"L" = Clock output, "H" = Output disabled. Pulled up internally.
Power
Supply
—
—
—
—
Analog section power supply pin.
4
AGND
DVDD
Analog ground pin.
28
27
Digital section power supply pin.
Digital ground pin.
DGND
4/7
¡ Semiconductor
MSM9560
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
AVDD
DVDD
VI
Condition
Rating
Unit
Power Supply Voltage
–0.3 to +7.0
AVDD = DVDD
Ta = 25°C
V
Input Voltage
–0.3 to AVDD + 0.3
–0.3 to DVDD + 0.3
400
Output Voltage
VO
Ta = 25°C, per package
Ta = 25°C, per output
—
Maximum Power Dissipation
Storage Temperature
PD
mW
°C
50
TSTG
–55 to +150
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
AVDD
Condition
Range
Unit Applied Pin
AVDD
Power Supply Voltage
AVDD = DVDD
4.5 to 5.5
V
DVDD
DVDD
XTAL1,
Crystal Oscillation Frequency
fXTAL
—
8.192 MHz 100 ppm
—
XTAL2
Composite signals
including multiplex
signals
FM Multiplex Signal Input
Voltage
VAIN
Top
0.5 to 2
VP-P
°C
AIN
—
Operating Temperature
—
–40 to +85
ELECTRICAL CHARACTERISTICS
Parameter
Symbol
Condition
When operating, no load
f = 8.192 MHz
Min. Typ. Max. Unit Applied Pin
—
—
14
—
28 mA
AVDD
,
Supply Current
IDD
When in power down mode,
no load
DVDD
20 mA
72 to 80 kHz
Variable gain amplifier
gain: 0 dB
—
50
50
—
—
—
3.0 dB
MON
MON
MON
BPF Pass Band Attenuation
BPF Stop Band Attenuation
BPF Stop Band Attenuation
GAIN1
GAIN2
GAIN3
0 to 53 kHz
Variable gain amplifier
gain: 0 dB
—
—
dB
dB
100 to 500 kHz
Variable gain amplifier
gain: 0 dB
5/7
MSM9560
8 bits
FM multiplex
data demodulation
IC
FM
tuner
Microcomputer
Font
ROM
Buffer
RAM
LCD driver
CPU
ROM
16 kanji characters¥2 lines
LCD display
¡ Semiconductor
PACKAGE DIMENSIONS
QFP44-P-910-0.80-2K
MSM9560
(Unit : mm)
Mirror finish
Package material
Lead frame material
Pin treatment
Solder plate thickness
Package weight (g)
Epoxy resin
42 alloy
Solder plating
5 mm or more
0.41 TYP.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, TQFP, LQFP, SOJ, QFJ (PLCC), SHP, and BGA are surface mount type
packages, which are very susceptible to heat in reflow mounting and humidity absorbed in
storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person
ontheproductname,packagename,pinnumber,packagecodeanddesiredmountingconditions
(reflow method, temperature and times).
7/7
E2Y0002-29-11
NOTICE
1.
The information contained herein can change without notice owing to product and/or
technical improvements. Before using the product, please make sure that the information
being referred to is up-to-date.
2.
The outline of action and examples for application circuits described herein have been
chosen as an explanation for the standard action and performance of the product. When
planning to use the product, please ensure that the external conditions are reflected in the
actual circuit, assembly, and program designs.
3.
4.
When designing your product, please use our product below the specified maximum
ratings and within the specified operating ranges including, but not limited to, operating
voltage, power dissipation, and operating temperature.
Oki assumes no responsibility or liability whatsoever for any failure or unusual or
unexpected operation resulting from misuse, neglect, improper installation, repair, alteration
or accident, improper handling, or unusual physical or electrical stress including, but not
limited to, exposure to parameters beyond the specified maximum ratings or operation
outside the specified operating range.
5.
6.
Neither indemnity against nor license of a third party’s industrial and intellectual property
right, etc. is granted by us in connection with the use of the product and/or the information
and drawings contained herein. No responsibility is assumed by us for any infringement
of a third party’s right which may result from the use thereof.
The products listed in this document are intended for use in general electronics equipment
for commercial applications (e.g., office automation, communication equipment,
measurement equipment, consumer electronics, etc.). These products are not authorized
for use in any system or application that requires special or enhanced quality and reliability
characteristics nor in any system or application where the failure of such system or
application may result in the loss or damage of property, or death or injury to humans.
Such applications include, but are not limited to, traffic and automotive equipment, safety
devices, aerospace equipment, nuclear power control, medical equipment, and life-support
systems.
7.
Certain products in this document may need government approval before they can be
exported to particular countries. The purchaser assumes the responsibility of determining
thelegalityofexportoftheseproductsandwilltakeappropriateandnecessarystepsattheir
own expense for these.
8.
9.
No part of the contents cotained herein may be reprinted or reproduced without our prior
permission.
MS-DOS is a registered trademark of Microsoft Corporation.
Copyright 1999 Oki Electric Industry Co., Ltd.
Printed in Japan
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