74ACT139 [ONSEMI]

Dual 1−of−4 Decoder/Demultiplexer; 1 -的-4双解码器/多路解复用器
74ACT139
型号: 74ACT139
厂家: ONSEMI    ONSEMI
描述:

Dual 1−of−4 Decoder/Demultiplexer
1 -的-4双解码器/多路解复用器

解码器 解复用器
文件: 总11页 (文件大小:183K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
MC74AC139, MC74ACT139  
Dual 1−of−4  
Decoder/Demultiplexer  
The MC74AC139/74ACT139 is a highspeed, dual 1of4  
decoder/demultiplexer. The device has two independent decoders,  
each accepting two inputs and providing four mutuallyexclusive  
activeLOW outputs. Each decoder has an activeLOW Enable input  
which can be used as a data input for a 4output demultiplexer. Each  
half of the MC74AC139/74ACT139 can be used as a function  
generator providing four minterms of two variables.  
http://onsemi.com  
DIP16  
N SUFFIX  
CASE 648  
Multifunctional Capability  
16  
Two Completely Independent 1of4 Decoders  
Active LOW Mutually Exclusive Outputs  
Outputs Source/Sink 24 mA  
1
SO16  
ACT139 Has TTL Compatible Inputs  
D SUFFIX  
CASE 751B  
16  
w These devices are available in Pbfree package(s). Specifications herein  
apply to both standard and Pbfree devices. Please see our website at  
www.onsemi.com for specific Pbfree orderable part numbers, or  
contact your local ON Semiconductor sales office or representative.  
1
TSSOP16  
DT SUFFIX  
CASE 948F  
V
CC  
E
b
A
0b  
A
1b  
O
0b  
O
1b  
O
O
3b  
2b  
16  
16  
15  
14  
13  
12  
11  
10  
9
1
EIAJ16  
M SUFFIX  
CASE 966  
16  
1
1
2
3
4
5
6
7
8
ORDERING INFORMATION  
E
a
A
0a  
A
1a  
O
0a  
O
1a  
O
2a  
O
3a  
GND  
Device  
Package  
Shipping  
Figure 1. Pinout: 16Lead Packages Conductors  
MC74AC139N  
MC74ACT139N  
MC74AC139D  
MC74ACT139D  
MC74AC139DR2  
25 Units/Rail  
25 Units/Rail  
PDIP16  
PDIP16  
SOIC16  
(Top View)  
PIN ASSIGNMENT  
48 Units/Rail  
PIN  
FUNCTION  
Address Inputs  
Enable Inputs  
Outputs  
48 Units/Rail  
SOIC16  
SOIC16  
A , A  
0
1
2500 Tape & Reel  
E
MC74ACT139DR2  
MC74AC139DT  
2500 Tape & Reel  
96 Units/Rail  
SOIC16  
O O  
0
3
TSSOP16  
MC74ACT139DT  
96 Units/Rail  
TSSOP16  
TRUTH TABLE  
Inputs  
MC74AC139DTR2  
MC74AC139M  
2500 Tape & Reel  
50 Units/Rail  
TSSOP16  
EIAJ16  
Outputs  
E
A
0
A
1
O
O
O
O
3
0
1
2
50 Units/Rail  
MC74ACT139M  
MC74AC139MEL  
MC74ACT139MEL  
EIAJ16  
EIAJ16  
EIAJ16  
H
L
L
L
L
X
X
L
L
H
H
H
H
H
H
2000 Tape & Reel  
2000 Tape & Reel  
L
H
L
L
H
H
H
H
L
H
H
H
H
L
H
H
H
L
H
H
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
DEVICE MARKING INFORMATION  
See general marking information in the device marking  
section on page 6 of this data sheet.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
March, 2006 Rev. 7  
MC74AC139/D  
MC74AC139, MC74ACT139  
E
A A  
0 1  
DECODER a  
O
0
O
1
O
2
O
3
E
A A  
0 1  
DECODER b  
O
0
O O O  
1 2 3  
Figure 2. Logic Symbol  
E
a
A
0a  
A
1a  
E
b
A
0b  
A
1b  
0
0a  
0
1a  
0
2a  
0
3a  
0
0b  
0
1b  
0
2b  
0
3b  
NOTE: This diagram is provided only for the understanding of logic  
operations and should not be used to estimate propagation  
delays.  
Figure 3. Logic Diagram  
E
E
FUNCTIONAL DESCRIPTION  
A
A
O
O
O
0
1
0
1
0
0
The MC74AC139/74ACT139 is a highspeed dual  
1of4 decoder/demultiplexer. The device has two  
independent decoders, each of which accepts two binary  
A
A
E
E
A
A
0
0
O
1
1
weighted inputs (A A ) and provides four mutually  
0
1
A
A
1
1
exclusive activeLOW outputs (O O ). Each decoder has  
0
3
E
E
an activeLOW enable (E). When E is HIGH all outputs are  
forced HIGH. The enable can be used as the data input for  
a 4output demultiplexer application. Each half of the  
MC74AC139/74ACT139 generates all four minterms of  
two variables. These four minterms are useful in some  
applications, replacing multiple gate functions as shown in  
Figure 4, and thereby reducing the number of packages  
required in a logic network.  
A
0
O
O
A
O
O
2
0
1
2
A
A
1
E
E
A
3
A
3
0
1
0
1
A
A
Figure 4. Gate Functions (Each Half)  
http://onsemi.com  
2
 
MC74AC139, MC74ACT139  
MAXIMUM RATINGS*  
Symbol  
Parameter  
Value  
Unit  
V
V
V
V
DC Supply Voltage (Referenced to GND)  
0.5 to +7.0  
CC  
DC Input Voltage (Referenced to GND)  
DC Output Voltage (Referenced to GND)  
DC Input Current, per Pin  
0.5 to V +0.5  
V
IN  
CC  
0.5 to V +0.5  
V
OUT  
CC  
I
I
I
±20  
±50  
mA  
mA  
mA  
°C  
IN  
DC Output Sink/Source Current, per Pin  
OUT  
CC  
DC V or GND Current per Output Pin  
±50  
CC  
T
stg  
Storage Temperature  
65 to +150  
*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recom-  
mended Operating Conditions.  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
2.0  
4.5  
0
Typ  
5.0  
5.0  
Max  
6.0  
Unit  
AC  
V
V
Supply Voltage  
V
V
CC  
ACT  
5.5  
, V  
OUT  
DC Input Voltage, Output Voltage (Ref. to GND)  
V
CC  
IN  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
@ 3.0 V  
@ 4.5 V  
@ 5.5 V  
@ 4.5 V  
@ 5.5 V  
150  
40  
25  
10  
8.0  
Input Rise and Fall Time (Note 1)  
AC Devices except Schmitt Inputs  
ns/V  
t , t  
r
f
Input Rise and Fall Time (Note 2)  
ACT Devices except Schmitt Inputs  
t , t  
ns/V  
r
f
T
J
Junction Temperature (PDIP)  
Operating Ambient Temperature Range  
Output Current High  
140  
85  
°C  
°C  
T
A
40  
25  
I
I
24  
24  
mA  
mA  
OH  
OL  
Output Current Low  
1. V from 30% to 70% V ; see individual Data Sheets for devices that differ from the typical input rise and fall times.  
IN  
CC  
2. V from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.  
IN  
http://onsemi.com  
3
MC74AC139, MC74ACT139  
DC CHARACTERISTICS  
74AC  
74AC  
T
A
=
40°C to  
+85°C  
T
A
= +25°C  
V
CC  
Typ  
Guaranteed Limits  
(V)  
Symbol  
Parameter  
Minimum High Level  
Input Voltage  
Unit  
Conditions  
3.0  
4.5  
5.5  
1.5  
2.25  
2.75  
2.1  
2.1  
V
= 0.1 V  
V
V
V
OUT  
IH  
3.15  
3.85  
3.15  
3.85  
V
or V 0.1 V  
CC  
3.0  
4.5  
5.5  
1.5  
2.25  
2.75  
0.9  
1.35  
1.65  
0.9  
1.35  
1.65  
V
= 0.1 V  
Maximum Low Level  
Input Voltage  
OUT  
IL  
V
V
or V 0.1 V  
CC  
3.0  
4.5  
5.5  
2.99  
4.49  
5.49  
2.9  
4.4  
5.4  
2.9  
4.4  
5.4  
Minimum High Level  
Output Voltage  
I
= 50 mA  
OH  
OUT  
*V = V or V  
IH  
IN  
IL  
3.0  
4.5  
5.5  
2.56  
3.86  
4.86  
2.46  
3.76  
4.76  
12 mA  
24 mA  
24 mA  
V
V
I
OH  
3.0  
4.5  
5.5  
0.002  
0.001  
0.001  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
V
OL  
Maximum Low Level  
Output Voltage  
I
= 50 mA  
OUT  
*V = V or V  
IN  
IL  
IH  
3.0  
4.5  
5.5  
0.36  
0.36  
0.36  
0.44  
0.44  
0.44  
12 mA  
24 mA  
24 mA  
V
I
OL  
I
IN  
Maximum Input  
Leakage Current  
5.5  
±0.1  
±1.0  
mA  
V = V , GND  
I
CC  
I
I
I
5.5  
5.5  
75  
mA  
mA  
V
V
= 1.65 V Max  
= 3.85 V Min  
†Minimum Dynamic  
Output Current  
OLD  
OHD  
CC  
OLD  
75  
OHD  
Maximum Quiescent  
Supply Current  
5.5  
8.0  
80  
mA  
V
= V or GND  
IN CC  
*All outputs loaded; thresholds on input associated with output under test.  
†Maximum test duration 2.0 ms, one output loaded at a time.  
NOTE:  
I
IN  
and I @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V  
.
CC  
CC  
AC CHARACTERISTICS (For Figures and Waveforms See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)  
74AC  
74AC  
T
= 40°C  
A
T
A
= +25°C  
to +85°C  
C = 50 pF  
C = 50 pF  
L
L
V
(V)  
*
Fig.  
No.  
CC  
Min  
Typ  
Max  
Min  
Max  
Symbol  
Parameter  
Unit  
3.3  
5.0  
4.0  
3.0  
8.0  
6.5  
11.5  
8.5  
3.5  
2.5  
13  
9.5  
Propagation Delay  
A to O  
t
t
t
t
ns  
36  
36  
36  
36  
PLH  
n
n
3.3  
5.0  
3.0  
2.5  
7.0  
5.5  
10  
7.5  
2.5  
2.0  
11  
8.5  
Propagation Delay  
A to O  
ns  
ns  
ns  
PHL  
PLH  
PHL  
n
n
3.3  
5.0  
4.5  
3.5  
9.5  
7.0  
12  
8.5  
3.5  
3.0  
13  
10  
Propagation Delay  
E to O  
n
n
3.3  
5.0  
4.0  
2.5  
8.0  
6.0  
10  
7.5  
3.0  
2.5  
11  
8.5  
Propagation Delay  
E to O  
n
n
*Voltage Range 3.3 V is 3.3 V ±0.3 V.  
*Voltage Range 5.0 V is 5.0 V ±0.5 V.  
http://onsemi.com  
4
MC74AC139, MC74ACT139  
DC CHARACTERISTICS  
74ACT  
74ACT  
T
A
=
40°C to  
+85°C  
T
A
= +25°C  
V
CC  
Typ  
Guaranteed Limits  
(V)  
Symbol  
Parameter  
Minimum High Level  
Input Voltage  
Unit  
Conditions  
4.5  
5.5  
1.5  
1.5  
2.0  
2.0  
2.0  
2.0  
V
= 0.1 V  
V
V
V
OUT  
IH  
V
or V 0.1 V  
CC  
4.5  
5.5  
1.5  
1.5  
0.8  
0.8  
0.8  
0.8  
V
= 0.1 V  
Maximum Low Level  
Input Voltage  
OUT  
IL  
V
V
or V 0.1 V  
CC  
4.5  
5.5  
4.49  
5.49  
4.4  
5.4  
4.4  
5.4  
Minimum High Level  
Output Voltage  
I
= 50 mA  
OH  
OUT  
*V = V or V  
IH  
IN  
IL  
4.5  
5.5  
3.86  
4.86  
3.76  
4.76  
V
V
24 mA  
24 mA  
I
I
OH  
4.5  
5.5  
0.001  
0.001  
0.1  
0.1  
0.1  
0.1  
V
OL  
Maximum Low Level  
Output Voltage  
= 50 mA  
OUT  
*V = V or V  
IN  
IL  
IH  
4.5  
5.5  
0.36  
0.36  
0.44  
0.44  
V
24 mA  
24 mA  
I
OL  
I
IN  
Maximum Input  
Leakage Current  
5.5  
±0.1  
±1.0  
mA  
V = V , GND  
I CC  
DI  
Additional Max. I /Input  
5.5  
5.5  
5.5  
0.6  
1.5  
75  
mA  
mA  
mA  
V = V 2.1 V  
CCT  
CC  
I
CC  
I
V
OLD  
V
OHD  
= 1.65 V Max  
†Minimum Dynamic  
Output Current  
OLD  
I
75  
= 3.85 V Min  
OHD  
CC  
I
Maximum Quiescent  
Supply Current  
5.5  
8.0  
80  
mA  
V = V or GND  
IN CC  
*All outputs loaded; thresholds on input associated with output under test.  
†Maximum test duration 2.0 ms, one output loaded at a time.  
AC CHARACTERISTICS (For Figures and Waveforms See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)  
74ACT  
74ACT  
T
= 40°C  
A
T
A
= +25°C  
to +85°C  
C = 50 pF  
C = 50 pF  
L
L
V
(V)  
*
Fig.  
No.  
CC  
Min  
Typ  
Max  
Min  
Max  
Symbol  
Parameter  
Unit  
Propagation Delay  
A to O  
t
t
t
t
5.0  
1.5  
6.0  
8.5  
1.5  
9.5  
ns  
36  
36  
36  
36  
PLH  
n
n
Propagation Delay  
A to O  
5.0  
5.0  
5.0  
1.5  
2.5  
2.0  
6.0  
7.0  
7.0  
9.5  
10.0  
9.5  
1.5  
2.0  
1.5  
10.5  
11.0  
10.5  
ns  
ns  
ns  
PHL  
PLH  
PHL  
n
n
Propagation Delay  
E to O  
n
n
Propagation Delay  
E to O  
n
n
*Voltage Range 5.0 V is 5.0 V ±0.5 V.  
CAPACITANCE  
Symbol  
Value  
Typ  
4.5  
40  
Parameter  
Unit  
Test Conditions  
C
C
Input Capacitance  
Power Dissipation Capacitance  
pF  
pF  
V
CC  
CC  
= 5.0 V  
= 5.0 V  
IN  
V
PD  
http://onsemi.com  
5
MC74AC139, MC74ACT139  
MARKING DIAGRAMS  
DIP16  
SO16  
TSSOP16  
EIAJ16  
MC74AC139N  
AWLYYWW  
AC139  
AWLYWW  
74AC139  
ALYW  
AC  
139  
ALYW  
ACT139  
AWLYWW  
MC74ACT139N  
AWLYYWW  
74ACT139  
ALYW  
ACT  
139  
ALYW  
A
= Assembly Location  
WL, L = Wafer Lot  
YY, Y = Year  
WW, W = Work Week  
http://onsemi.com  
6
MC74AC139, MC74ACT139  
PACKAGE DIMENSIONS  
PDIP16  
N SUFFIX  
16 PIN PLASTIC DIP PACKAGE  
CASE 64808  
ISSUE R  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
A−  
2. CONTROLLING DIMENSION: INCH.  
3. DIMENSION L TO CENTER OF LEADS WHEN  
FORMED PARALLEL.  
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.  
5. ROUNDED CORNERS OPTIONAL.  
16  
1
9
8
B
S
INCHES  
DIM MIN MAX  
MILLIMETERS  
MIN  
18.80  
6.35  
3.69  
0.39  
1.02  
MAX  
19.55  
6.85  
4.44  
0.53  
1.77  
F
A
B
C
D
F
0.740  
0.250  
0.145  
0.015  
0.040  
0.770  
0.270  
0.175  
0.021  
0.70  
C
L
SEATING  
PLANE  
T−  
G
H
J
0.100 BSC  
0.050 BSC  
2.54 BSC  
1.27 BSC  
K
M
0.008  
0.015  
0.130  
0.305  
10  
0.21  
0.38  
3.30  
7.74  
10  
H
J
K
L
0.110  
0.295  
0
2.80  
7.50  
0
G
D 16 PL  
M
S
_
_
_
_
0.020  
0.040  
0.51  
1.01  
M
M
0.25 (0.010)  
T A  
SO16  
D SUFFIX  
16 PIN PLASTIC SOIC PACKAGE  
CASE 751B05  
ISSUE J  
A−  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
16  
9
8
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSIONS A AND B DO NOT INCLUDE  
MOLD PROTRUSION.  
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)  
PER SIDE.  
5. DIMENSION D DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR  
PROTRUSION SHALL BE 0.127 (0.005) TOTAL  
IN EXCESS OF THE D DIMENSION AT  
MAXIMUM MATERIAL CONDITION.  
B−  
P 8 PL  
M
S
B
0.25 (0.010)  
1
G
MILLIMETERS  
INCHES  
MIN  
0.386  
DIM MIN  
MAX  
MAX  
0.393  
0.157  
0.068  
0.019  
0.049  
F
A
B
C
D
F
9.80  
3.80  
1.35  
0.35  
0.40  
10.00  
R X 45  
K
_
4.00 0.150  
1.75 0.054  
0.49 0.014  
1.25 0.016  
C
G
J
1.27 BSC  
0.050 BSC  
T−  
SEATING  
PLANE  
0.19  
0.10  
0
0.25 0.008  
0.25 0.004  
0.009  
0.009  
7
J
M
K
M
P
R
D
16 PL  
7
0
_
_
_
_
5.80  
0.25  
6.20 0.229  
0.50 0.010  
0.244  
0.019  
M
S
S
A
0.25 (0.010)  
T
B
http://onsemi.com  
7
MC74AC139, MC74ACT139  
PACKAGE DIMENSIONS  
TSSOP16  
DT SUFFIX  
16 PIN PLASTIC TSSOP PACKAGE  
CASE948F01  
ISSUE O  
16X KREF  
M
S
S
0.10 (0.004)  
T
U
V
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.  
PROTRUSIONS OR GATE BURRS. MOLD FLASH  
OR GATE BURRS SHALL NOT EXCEED 0.15  
(0.006) PER SIDE.  
4. DIMENSION B DOES NOT INCLUDE INTERLEAD  
FLASH OR PROTRUSION. INTERLEAD FLASH OR  
PROTRUSION SHALL NOT EXCEED  
0.25 (0.010) PER SIDE.  
5. DIMENSION K DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR  
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN  
EXCESS OF THE K DIMENSION AT MAXIMUM  
MATERIAL CONDITION.  
S
U
0.15 (0.006) T  
K
K1  
16  
9
2X L/2  
J1  
B
SECTION NN  
L
U−  
J
PIN 1  
IDENT.  
8
1
6. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
7. DIMENSION A AND B ARE TO BE DETERMINED  
AT DATUM PLANE −W−.  
N
0.25 (0.010)  
S
0.15 (0.006) T  
U
A
M
MILLIMETERS  
INCHES  
MIN  
V−  
DIM MIN  
MAX  
5.10  
4.50  
1.20  
0.15  
0.75  
MAX  
0.200  
0.177  
0.047  
0.006  
0.030  
A
B
4.90  
4.30  
−−−  
0.193  
0.169  
−−−  
N
C
F
DETAIL E  
D
0.05  
0.50  
0.002  
0.020  
F
G
H
0.65 BSC  
0.026 BSC  
0.18  
0.09  
0.09  
0.19  
0.19  
0.28  
0.20  
0.16  
0.30  
0.25  
0.007  
0.004  
0.004  
0.007  
0.007  
0.011  
0.008  
0.006  
0.012  
0.010  
J
J1  
K
W−  
C
K1  
L
6.40 BSC  
_
0.252 BSC  
0
0.10 (0.004)  
M
0
8
8
_
_
_
DETAIL E  
H
SEATING  
PLANE  
T−  
D
G
EIAJ16  
M SUFFIX  
16 PIN PLASTIC EIAJ PACKAGE  
CASE96601  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
ISSUE O  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD  
FLASH OR PROTRUSIONS AND ARE MEASURED  
AT THE PARTING LINE. MOLD FLASH OR  
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)  
PER SIDE.  
L
16  
9
E
Q
1
H
E
M
_
4. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
E
5. THE LEAD WIDTH DIMENSION (b) DOES NOT  
INCLUDE DAMBAR PROTRUSION. ALLOWABLE  
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)  
TOTAL IN EXCESS OF THE LEAD WIDTH  
DIMENSION AT MAXIMUM MATERIAL CONDITION.  
DAMBAR CANNOT BE LOCATED ON THE LOWER  
RADIUS OR THE FOOT. MINIMUM SPACE  
BETWEEN PROTRUSIONS AND ADJACENT LEAD  
TO BE 0.46 ( 0.018).  
1
8
L
DETAIL P  
Z
D
VIEW P  
e
MILLIMETERS  
INCHES  
MIN  
−−−  
A
DIM MIN  
MAX  
MAX  
0.081  
0.008  
0.020  
0.011  
0.413  
0.215  
c
A
−−−  
0.05  
0.35  
0.18  
9.90  
5.10  
2.05  
A
1
0.20 0.002  
0.50 0.014  
0.27 0.007  
b
c
D
E
10.50 0.390  
5.45 0.201  
A
1
b
0.13 (0.005)  
e
1.27 BSC  
0.050 BSC  
0.10 (0.004)  
M
H
7.40  
0.50  
1.10  
8.20 0.291  
0.85 0.020  
1.50 0.043  
0.323  
0.033  
0.059  
E
L
L
E
M
Q
0
10  
0.90 0.028  
10  
_
0.035  
0.031  
0
_
_
_
0.70  
−−−  
1
Z
0.78  
−−−  
http://onsemi.com  
8
MC74AC139, MC74ACT139  
Notes  
http://onsemi.com  
9
MC74AC139, MC74ACT139  
Notes  
http://onsemi.com  
10  
MC74AC139, MC74ACT139  
Notes  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
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USA/Canada  
ON Semiconductor Website: http://onsemi.com  
Order Literature: http://www.onsemi.com/litorder  
Literature Distribution Center for ON Semiconductor  
P.O. Box 61312, Phoenix, Arizona 850821312 USA  
Phone: 4808297710 or 8003443860 Toll Free USA/Canada  
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For additional information, please contact your  
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MC74AC139/D  

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