74LCX07MTC [ONSEMI]
带开漏输出的低压六路缓冲器;
| 型号： | 74LCX07MTC |
| 厂家： | 
ONSEMI |
| 描述： | 带开漏输出的低压六路缓冲器 |
| 文件： | 总13页 (文件大小：929K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
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December 2013
74LCX07
Low Voltage Hex Buffer with Open Drain Outputs
Features
General Description
■ 5V tolerant inputs
The LCX07 contains six buffers. The inputs tolerate volt-
ages up to 7V allowing the interface of 5V systems to 3V
systems.
■ 2.3V to 5.5V V specifications provided
CC
■ 2.9ns t max. (V = 3.3V), 10µA I max.
PD
CC
CC
The outputs of the LCX07 are open drain and can be
connected to other open drain outputs to implement
active HIGH wire AND or active LOW wire OR functions.
■ Power down high impedance inputs and outputs
■ +24mA output drive (V = 3.0V)
CC
■ Implements proprietary noise/EMI reduction circuitry
■ Latch-up performance exceeds JEDEC 78 conditions
■ ESD performance:
The 74LCX07 is fabricated with advanced CMOS tech-
nology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
– Human body model > 2000V
– Machine model > 200V
■ Leadless DQFN package
Ordering Information
Package
Order Number
74LCX07M
Number
Package Description
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX07SJ
M14D
(1)
74LCX07BQX
MLP14A
14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 3.0mm
74LCX07MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Note:
1. DQFN package available in Tape and Reel only.
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1999 Fairchild Semiconductor Corporation
74LCX07 Rev. 1.11.1
www.fairchildsemi.com
Connection Diagram
Logic Symbol
Pin Assignments for SOIC, SOP, and TSSOP
IEEE/IEC
Pad Assignments for DQFN
(Bottom View)
(Top Through View)
Pin Description
Pin Names
Description
A
Inputs
n
O
Outputs
n
No Connect
DAP
Note: DAP (Die Attach Pad)
©1999 Fairchild Semiconductor Corporation
74LCX07 Rev. 1.11.1
www.fairchildsemi.com
2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Rating
V
Supply Voltage
–0.5V to +7.0V
CC
V
DC Input Voltage
–0.5V to +7.0V
–0.5V to +7.0V
–50mA
I
(2)
V
DC Output Voltage, Output in HIGH or LOW State
O
IK
I
DC Input Diode Current, V < GND
I
I
DC Output Diode Current
OK
V
< GND
–50mA
+50mA
O
V
> V
CC
O
I
DC Output Current
50mA
O
I
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
100mA
CC
I
100mA
GND
T
–65°C to +150°C
STG
Note:
2. I Absolute Maximum Rating must be observed.
O
(3)
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
Min.
Max.
Units
V
Supply Voltage
Operating
CC
2.0
1.5
0
5.5
5.5
5.5
5.5
V
Data Retention
Input Voltage
Output Voltage
Output Current
V
V
V
I
V
0
O
I
OL
V
V
V
V
= 4.5V–5.5V
= 3.0V–3.6V
= 2.7V–3.0V
= 2.3V–2.7V
+32
+24
+12
+8
mA
CC
CC
CC
CC
T
Free-Air Operating Temperature
Input Edge Rate, V = 0.8V–2.0V, V = 3.0V
–40
0
85
°C
A
∆t / ∆V
10
ns/V
IN
CC
Note:
3. Unused inputs must be held HIGH or LOW. They may not float.
©1999 Fairchild Semiconductor Corporation
74LCX07 Rev. 1.11.1
www.fairchildsemi.com
3
DC Electrical Characteristics
T = –40°C to +85°C
A
Symbol
Parameter
V
(V)
Conditions
Min.
1.7
Max.
Units
CC
V
HIGH Level Input Voltage
2.3–2.7
2.7–3.6
4.5–5.5
2.3–2.7
2.7–3.6
4.5–5.5
2.3–5.5
2.3
V
IH
2.0
0.7 x V
CC
V
LOW Level Input Voltage
LOW Level Output Voltage
0.7
0.8
V
V
IL
0.3 x V
0.2
0.6
0.4
0.4
0.55
0.55
5.0
10
CC
V
I
I
I
I
I
I
= 100µA
= 8mA
OL
OL
OL
OL
OL
OL
OL
2.7
= 12mA
= 16mA
= 24mA
= 32mA
3.0
3.0
4.5
I
Input Leakage Current
2.3–5.5 0 ≤ V ≤ 5.5V
µA
µA
µA
I
I
I
Power-Off Leakage Current
Quiescent Supply Current
0
V or V = 5.5V
I O
OFF
I
2.3–5.5 V = V or GND
10
CC
I
CC
2.3–5.5 3.6V ≤ V ≤ 5.5V
10
I
∆I
Increase in I per Input
2.3–3.6
4.5–5.5
2–5.5
V
= V – 0.6V
500
1
µA
mA
µA
CC
CC
IH
CC
I
Off State Current
V
= 5.5V
10
OHZ
O
AC Electrical Characteristics
TA = –40°C to +85°C, RL = 500Ω
CC = 5.0V 0.5V, VCC = 3.3V 0.3V, CC = 2.7V,
CL= 50pF CL= 50pF
V
V
V
CC = 2.5V 0.2V,
CL= 50pF
CL= 30pF
Symbol
, t
Parameter
Min.
0.5
Max.
Min.
0.8
Max.
Min Max
Min
Max
Units
t
Propagation
Delay Time
3.0
3.7
1.0
4.4
0.8
3.8
ns
PZL PLZ
©1999 Fairchild Semiconductor Corporation
74LCX07 Rev. 1.11.1
www.fairchildsemi.com
4
Dynamic Switching Characteristics
T = 25°C
A
Symbol
Parameter
V
(V)
Conditions
Typical
0.9
Unit
CC
V
Quiet Output Dynamic Peak V
3.3
C = 50pF, V = 3.3V, V = 0V
V
OLP
OL
L
IH
IL
2.5
3.3
2.5
C = 30pF, V = 2.5V, V = 0V
0.7
L
IH
IL
V
Quiet Output Dynamic Valley V
C = 50pF, V = 3.3V, V = 0V
–0.8
–0.6
V
OLV
OL
L
IH
IL
C = 30pF, V = 2.5V, V = 0V
L
IH
IL
Capacitance
Symbol
Parameter
Conditions
Typical
Units
pF
C
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
V
= Open, V = 0V or V
CC
7
8
IN
CC
CC
CC
I
C
V
= 3.3V, V = 0V or V
CC
pF
OUT
I
C
V
= 3.3V, V = 0V or V , f = 10MHz
25
pF
PD
I
CC
©1999 Fairchild Semiconductor Corporation
74LCX07 Rev. 1.11.1
www.fairchildsemi.com
5
AC Loading and Waveforms
Test
Switch
V
x 2 at V = 5.0 0.5V
CC
CC
t
, t
6V at V = 3.3 0.3V
CC
PZL PLZ
V
x 2 at V = 2.5 0.2V
CC
CC
Figure 1. AC Test Circuit (C includes probe and jig capacitance)
L
3-STATE Output Low Enable and
Disable Times for Logic
t
and t
rise fall
V
CC
Symbol
5.0V 0.5V 3.3V 0.3V
2.7V
1.5V
1.5V
2.5V 0.2V
V
V
V
/ 2
/ 2
1.5V
1.5V
V
V
/ 2
/ 2
mi
CC
CC
CC
CC
V
mo
V
V
+ 0.3V
– 0.3V
V
+ 0.3V
V
+ 0.3V
V
+ 0.15V
– 0.15V
x
OL
OL
OL
OL
V
V
V
– 0.3V
V
– 0.3V
V
OH
y
OH
OH
OH
Figure 2. Waveforms (Input Pulse Characteristics; f =1MHz, t = t = 3ns)
r
f
©1999 Fairchild Semiconductor Corporation
74LCX07 Rev. 1.11.1
www.fairchildsemi.com
6
Tape and Reel Specification
Tape Format for DQFN
Package Designator
Tape Section
Number of Cavities
125 (Typ.)
Cavity Status
Empty
Cover Tape Status
Sealed
BQX
Leader (Start End)
Carrier
3000
Filled
Sealed
Trailer (Hub End)
75 (Typ.)
Empty
Sealed
Tape Dimensions inches (millimeters)
Reel Dimensions inches (millimeters)
Tape Size
A
B
C
D
N
W1
W2
12mm
13.0 (330.0)
0.059 (1.50)
0.512 (13.00) 0.795 (20.20) 2.165 (55.00)
0.488 (12.4)
0.724 (18.4)
©1999 Fairchild Semiconductor Corporation
74LCX07 Rev. 1.11.1
www.fairchildsemi.com
7
0.65
A
ꢀꢁꢂꢂꢂꢁꢃꢂ
0.43TYP
14
8
B
6.4
ꢄꢁꢄꢂꢂꢁꢃꢂ
6.10
3.2
1.65
0.2 C B A
ALL LEAD TIPS
1
7
PIN#1 IDENT
TOP VIEW
0.45
RECOMMENDED LAND PATTERN
SEE DETAIL A
1.2 MAX
+0.15
-0.10
0.90
0.20
0.09
ꢂꢁꢃꢂꢂꢁꢂꢀ
0.30
0.19
ALL LEAD TIPS
C
0.1 C
0.13
A B
C
0.65
ꢃꢅꢁꢂꢂꢆ723ꢆꢇꢆ%27720
FRONT VIEW
0.09 MIN
NOTES:
GAGE PLANE
A. CONFORMS TO JEDEC REGISTRATION MO-153,
VARIATION AB, REF NOTE 6
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS
D. DIMENSIONING AND TOLERANCES PER ANSI
Y14.5M, 2009.
0.25
0.09 MIN
ꢂꢉꢆꢊ
ꢂꢁꢈꢂꢁꢃ
1.00
SEATING PLANE
DETAIL A
E. LANDPATTERN STANDARD: SOP65P640X110-14M.
F. DRAWING FILE NAME: MKT-MTC14rev7.
8.75
8.50
A
0.65
7.62
14
8
14
8
B
4.00
3.80
5.60
6.00
1.70
1
7
PIN #1
IDENT.
1
7
1.27
0.51
0.35
1.27
(0.33)
M
0.25
C B A
LAND PATTERN RECOMMENDATION
TOP VIEW
1.75 MAX
A
0.25
0.19
C
0.10 C
NOTES:
1.50
1.25
0.25
0.10
SIDE VIEW
FRONT VIEW
A. CONFORMS TO JEDEC MS-012,
VARIATION AB, ISSUE C
B. ALL DIMENSIONS ARE IN MILLIMETERS
C. DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS
0.50
0.25
x 45
R0.10
GAGE
PLANE
D. LAND PATTERN STANDARD:
SOIC127P600X145-14M
R0.10
E. CONFORMS TO ASME Y14.5M, 2009
D. DRAWING FILENAME: MKT-M14Arev14
0.36
8°
0°
0.90
0.50
SEATING PLANE
(1.04)
DETAIL A
SCALE 16 : 1
4.00 MAX
2.20 MAX
1.40 MAX
B
3.00
0.05 C
A
2X
1.00
MAX
1.70
MAX
2.50
0.50 TYP
3.50
MAX
(0.90)
0.05 C
TOP VIEW
2X
PIN #1 QUADRANT
0.50 TYP
0.24 TYP
ꢀꢁꢈꢀꢀꢁꢀꢃ
RECOMMENDED LAND PATTERN
0.10 C
ꢀꢁꢂꢀꢀꢁꢀꢃ
0.08 C
ꢀꢁꢀꢂꢃꢀꢁꢀꢂꢃ
C
SIDE VIEW
SEATING
PLANE
ꢄꢁꢀꢀꢀꢁꢀꢃ
ꢅꢁꢆꢃꢀꢁꢀꢃ
ꢀꢁꢄꢇꢀꢀꢁꢀꢃ
(14X)
A. CONFORMS TO JEDEC REGISTRATION
MO-241, VARIATION AA
PIN #1 IDENT
0.50
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 2009.
ꢅꢁꢅꢃꢀꢁꢀꢃ
ꢂꢁꢃꢀꢀꢁꢀꢃ
D. LAND PATTERN RECOMMENDATION IS
EXISTING INDUSTRY LAND PATTERN.
E. DRAWING FILENAME: MKT-MLP14Arev2.
ꢀꢁꢂꢃꢀꢁꢀꢃ
(14X)
0.50
0.10
0.05
C A B
C
2.00
BOTTOM VIEW
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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