74LCX38MX [ONSEMI]
低电压四路 2 输入 NAND 门极（开漏），带 5V 耐压输入;
| 型号： | 74LCX38MX |
| 厂家： | 
ONSEMI |
| 描述： | 低电压四路 2 输入 NAND 门极（开漏），带 5V 耐压输入 |
| 文件： | 总9页 (文件大小：398K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
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is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
October 1995
Revised February 2005
74LCX38
Low Voltage Quad 2-Input NAND Gate (Open Drain)
with 5V Tolerant Inputs
General Description
The LCX38 contains four 2-input open drain NAND gates.
The inputs tolerate voltages up to 7V allowing the interface
of 5V systems to 3V systems.
Features
■ 5V tolerant inputs
■ 2.3V to 3.6V VCC specifications provided
■ 5.0 ns tPD max (VCC 3.3V), 10 A ICC max
The 74LCX38 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
■ Power down high impedance inputs and outputs
■ 24 mA output drive (VCC 3.0V)
■ Implements proprietary noise/EMI reduction circuitry
■ Latch-up performance exceeds 500 mA
■ ESD performance:
Human body model 2000V
Machine model 150V
Ordering Code:
Package
Order Number
Package Description
Number
74LCX38M
M14A
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LCX38MX_NL
(Note 1)
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LCX38SJ
M14D
MTC14
MTC14
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX38MTC
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LCX38MTCX_NL
(Note 1)
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
An, Bn
On
Description
Inputs
Outputs
© 2005 Fairchild Semiconductor Corporation
DS012574
www.fairchildsemi.com
Absolute Maximum Ratings(Note 2)
Symbol
VCC
VI
Parameter
Supply Voltage
Value
0.5 to 7.0
0.5 to 7.0
0.5 to 7.0
50
Conditions
Units
V
DC Input Voltage
V
VO
DC Output Voltage
Output in HIGH or LOW State (Note 3)
V
IIK
DC Input Diode Current
DC Output Diode Current
DC Output Sink Current (IOL
VI GND
VO GND
mA
mA
mA
mA
mA
C
IOK
50
IO
)
50
ICC
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
100
IGND
TSTG
100
65 to 150
Recommended Operating Conditions (Note 4)
Symbol
Parameter
Min
2.0
1.5
0
Max
3.6
3.6
5.5
5.5
24
Units
VCC
Supply Voltage
Operating
V
Data Retention
VI
Input Voltage
Output Voltage
Output Current
V
V
VO
IOL
0
VCC 3.0V 3.6V
VCC 2.7V 3.0V
VCC 2.3V 2.7V
12
mA
8
TA
Free-Air Operating Temperature
40
0
85
C
t/ V
Input Edge Rate, VIN 0.8V–2.0V, VCC 3.0V
10
ns/V
Note 2: The Absolute Maximum Ratings are those beyond which the safety of the device cannot be guaranteed. The device should not be operating at these
limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended
Operating Conditions” table will define the conditions for actual device operation.
Note 3: I Absolute Maximum Rating must be observed.
O
Note 4: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
V
T
40 C to 85 C
Min Max
CC
A
Symbol
Parameter
Conditions
Units
(V)
V
V
V
HIGH Level Input Voltage
2.3 2.7
2.7 3.6
2.3 2.7
2.3 3.6
2.3 3.6
2.3
1.7
2.0
IH
V
V
LOW Level Input Voltage
LOW Level Output Voltage
0.7
0.8
0.2
0.6
0.4
0.4
0.55
5.0
10
IL
I
100 A
= 8mA
OL
OL
I
OL
I
12 mA
16 mA
24 mA
2.7
V
OL
I
3.0
OL
I
3.0
OL
I
Input Leakage Current
0
V
5.5V
5.5V
2.3 3.6
0
A
A
I
I
I
Power-Off Leakage Current
Quiescent Supply Current
V or V
OFF
I
O
I
V
V
or GND
5.5V
2.3 3.6
2.3 3.6
2.3 3.6
2 - 3.6
10
CC
I
CC
V
A
3.6V
10
I
I
Increase in I per Input
CC
V
V
V
0.6V
500
10
A
A
CC
IH
O
CC
I
Off State Current
5.5
OHZ
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2
AC Electrical Characteristics
T
40 C to 85 C, R
500
A
L
V
3.3V 0.3V
50 pF
V
2.7V
V
2.5V 0.2V
C 30 pF
L
CC
CC
CC
Symbol
Parameter
Units
C
C
50 pF
L
L
Min
1.5
1.5
Max
Min
Max
5.5
Min
1.5
1.5
Max
6.5
t
t
t
t
Propagation Delay Time
5.0
5.0
1.0
1.0
1.5
1.5
PZL
ns
ns
5.5
6.0
PLZ
Output to Output Skew
(Note 5)
OSHL
OSLH
Note 5: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
) or LOW-to-HIGH (t
).
OSLH
OSHL
Dynamic Switching Characteristics
V
T
25 C
CC
A
Symbol
Parameter
Conditions
Units
(V)
3.3
2.5
3.3
2.5
Typical
0.8
V
V
Quiet Output Dynamic Peak V
C
C
C
C
50 pF, V
30 pF, V
50 pF, V
30 pF, V
3.3V, V
2.5V, V
3.3V, V
2.5V, V
0V
0V
0V
0V
OLP
OL
L
L
L
L
IH
IH
IH
IH
IL
IL
IL
IL
V
V
0.6
Quiet Output Dynamic Valley V
0.8
OLV
OL
0.6
Capacitance
Symbol
Parameter
Conditions
Typical
Units
pF
C
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
V
V
V
Open, V 0V or V
CC
7
8
IN
CC
CC
CC
I
C
C
3.3V, V 0V or V
CC
pF
OUT
PD
I
3.3V, V 0V or V , f 10 MHz
25
pF
I
CC
3
www.fairchildsemi.com
AC Loading and Waveforms Generic for LCX Family
FIGURE 1. AC Test Circuit
(CL includes probe and jig capacitance)
Test
Switch
tPZL, tPLZ
6V at VCC 3.3 0.3V
VCC x 2 at VCC 2.5 0.2V
trise and tfall
3-STATE Output Low Enable and
Disable Times for Logic
FIGURE 2. Waveforms
(Input Pulse Characteristics; f = 1MHz, tr = tf = 3ns)
VCC
Symbol
3.3V 0.3V
1.5V
2.7V
1.5V
2.5V 0.2V
VCC/2
Vmi
Vmo
Vx
1.5V
1.5V
VCC/2
VOL 0.3V
VOH 0.3V
VOL 0.3V
VOH 0.3V
VOL 0.15V
VOH 0.15V
Vy
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4
0.65
A
ꢀꢁꢂꢂꢂꢁꢃꢂ
0.43TYP
14
8
B
6.4
ꢄꢁꢄꢂꢂꢁꢃꢂ
6.10
3.2
1.65
0.2 C B A
ALL LEAD TIPS
1
7
PIN#1 IDENT
TOP VIEW
0.45
RECOMMENDED LAND PATTERN
SEE DETAIL A
1.2 MAX
+0.15
-0.10
0.90
0.20
0.09
ꢂꢁꢃꢂꢂꢁꢂꢀ
0.30
0.19
ALL LEAD TIPS
C
0.1 C
0.13
A B
C
0.65
ꢃꢅꢁꢂꢂꢆ723ꢆꢇꢆ%27720
FRONT VIEW
0.09 MIN
NOTES:
GAGE PLANE
A. CONFORMS TO JEDEC REGISTRATION MO-153,
VARIATION AB, REF NOTE 6
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS
D. DIMENSIONING AND TOLERANCES PER ANSI
Y14.5M, 2009.
0.25
0.09 MIN
ꢂꢉꢆꢊ
ꢂꢁꢈꢂꢁꢃ
1.00
SEATING PLANE
DETAIL A
E. LANDPATTERN STANDARD: SOP65P640X110-14M.
F. DRAWING FILE NAME: MKT-MTC14rev7.
8.75
8.50
A
0.65
7.62
14
8
14
8
B
4.00
3.80
5.60
6.00
1.70
1
7
PIN #1
IDENT.
1
7
1.27
0.51
0.35
1.27
(0.33)
M
0.25
C B A
LAND PATTERN RECOMMENDATION
TOP VIEW
1.75 MAX
A
0.25
0.19
C
0.10 C
NOTES:
1.50
1.25
0.25
0.10
SIDE VIEW
FRONT VIEW
A. CONFORMS TO JEDEC MS-012,
VARIATION AB, ISSUE C
B. ALL DIMENSIONS ARE IN MILLIMETERS
C. DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS
0.50
0.25
x 45
R0.10
GAGE
PLANE
D. LAND PATTERN STANDARD:
SOIC127P600X145-14M
R0.10
E. CONFORMS TO ASME Y14.5M, 2009
D. DRAWING FILENAME: MKT-M14Arev14
0.36
8°
0°
0.90
0.50
SEATING PLANE
(1.04)
DETAIL A
SCALE 16 : 1
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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