74LCX760WM [ONSEMI]
带 5V 耐压输入和开漏输出的低压缓冲器/线路驱动器;型号: | 74LCX760WM |
厂家: | ONSEMI |
描述: | 带 5V 耐压输入和开漏输出的低压缓冲器/线路驱动器 驱动 光电二极管 逻辑集成电路 驱动器 |
文件: | 总12页 (文件大小:235K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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July 2001
Revised March 2005
74LCX760
Low Voltage Buffer/Line Driver
with 5V Tolerant Inputs and Open Drain Outputs
General Description
Features
■ Open drain version of the LCX244
The LCX760 is the Open Drain version of the LCX244. The
LCX760 contains eight non-inverting buffers with 3-STATE
outputs. The device may be employed as a memory
address driver, clock driver and bus-oriented transmitter/
receiver. The LCX760 is designed for low voltage (2.5V or
3.3V) VCC applications with capability of interfacing to a 5V
■ 5V tolerant inputs and outputs
■ 2.3V–3.6V VCC specifications provided
■ 8.0 ns tPD max (VCC 3.3V), 10 A ICC max
■ Power down high impedance inputs and outputs
■ Supports live insertion/withdrawal (Note 1)
■ 24 mA output drive (VCC 3.0V)
signal environment.
The LCX760 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
■ Implements proprietary noise/EMI reduction circuitry
■ Latch-up conforms to JEDEC JED78
■ ESD performance:
Human body model 2000V
Machine model 200V
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to V
through a pull-up resistor: the minimum value or the
CC
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number Package Number
Package Description
74LCX760WM
74LCX760SJ
M20B
M20D
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LCX760MSA
74LCX760MTC
MSA20
MTC20
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
Connection Diagram
IEEE/IEC
© 2005 Fairchild Semiconductor Corporation
DS500413
www.fairchildsemi.com
Pin Descriptions
Truth Tables
Pin Names
OE1, OE2
Description
3-STATE Output Enable Inputs
I0–I7
Inputs
O0–O7
Outputs
Inputs
Inputs
Outputs
OE1
In
(Pins 12, 14, 16, 18)
L
L
L
H
X
L
H
Z
H
Outputs
OE2
In
(Pins 3, 5, 7, 9)
L
L
L
H
X
L
H
Z
H
H
L
X
Z
HIGH Voltage Level
LOW Voltage Level
Immaterial
High Impedance
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2
Absolute Maximum Ratings(Note 2)
Symbol
VCC
VI
Parameter
Supply Voltage
Value
0.5 to 7.0
0.5 to 7.0
0.5 to 7.0
50
Conditions
Units
V
DC Input Voltage
V
VO
DC Output Voltage
Output in HIGH or LOW State (Note 3)
V
IIK
DC Input Diode Current
DC Output Diode Current
VI GND
VO GND
VO VCC
mA
IOK
50
mA
50
IO
DC Output Sink Current
50
mA
mA
mA
C
ICC
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
100
IGND
TSTG
100
65 to 150
Recommended Operating Conditions (Note 4)
Symbol
VCC
Parameter
Min
2.0
1.5
0
Max
3.6
3.6
5.5
5.5
24
Units
Supply Voltage
Operating
V
Data Retention
VI
Input Voltage
Output Voltage
Output Current
V
V
VO
IOL
0
VCC 3.0V 3.6V
VCC 2.7V 3.0V
VCC 2.3V 2.7V
12
mA
8
TA
Free-Air Operating Temperature
40
0
85
C
t/ V
Input Edge Rate, VIN 0.8V–2.0V, VCC 3.0V
10
ns/V
Note 2: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom-
mended Operating Conditions” table will define the conditions for actual device operation.
Note 3: I Absolute Maximum Rating must be observed.
O
Note 4: Unused inputs or I/Os must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
V
T
40 C to 85 C
Min Max
CC
A
Symbol
Parameter
Conditions
Units
(V)
2.3 2.7
2.7 3.6
2.3 2.7
2.7 3.6
2.3 3.6
2.3
V
V
V
HIGH Level Input Voltage
1.7
2.0
IH
V
V
LOW Level Input Voltage
LOW Level Output Voltage
0.7
0.8
0.2
0.6
0.4
0.4
0.55
5.0
IL
I
I
I
I
I
100 A
OL
OL
OL
OL
OL
OL
8 mA
12 mA
16 mA
24 mA
2.7
V
3.0
3.0
I
I
Input Leakage Current
0
0
V
V
V
5.5V
5.5V
2.3 3.6
A
A
A
A
I
I
3-STATE Output Leakage
OZ
O
2.3 3.6
5.0
V
or V
IL
I
IH
I
I
Power-Off Leakage Current
Quiescent Supply Current
V or V
5.5V
0
10
10
OFF
CC
I
O
V
V
or GND
2.3 3.6
2.3 3.6
2.3 3.6
2 - 3.6
I
CC
3.6V V , V
5.5V (Note 5)
V 0.6V
CC
10
I
O
I
Increase in I per Input
CC
V
V
500
10
A
A
CC
IH
O
I
Off State Current
5.5
OHZ
Note 5: Outputs disabled or 3-STATE only.
3
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AC Electrical Characteristics
T
40 C to 85 C, R
500
A
L
V
3.3V 0.3V
50 pF
V
2.7V
V
2.5V 0.2
C 30 pF
L
CC
CC
CC
Symbol
Parameter
Units
C
C
50 pF
L
L
Min
0.5
0.5
Max
Min
Max
9.0
Min
0.5
0.5
Max
10.0
8.4
t
t
t
Propagation Delay
8.0
7.0
0.5
0.5
PZL
ns
ns
ns
ns
Data to Output
8.0
PLZ
PZL
Output Enable Time
0.5
0.5
8.0
7.0
0.5
0.5
9.0
8.0
0.5
0.5
10.0
8.4
OE to Out
n
t
Output Disable Time
PLZ
OE to Out
n
t
t
Output to Output Skew
(Note 6)
1.0
1.0
OSHL
OSLH
Note 6: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
) or LOW-to-HIGH (t
).
OSLH
OSHL
Dynamic Switching Characteristics
V
T
25 C
CC
A
Symbol
Parameter
Conditions
Units
(V)
3.3
2.5
3.3
2.5
Typical
0.8
V
V
Quiet Output Dynamic Peak V
C
C
C
C
50 pF, V
30 pF, V
50 pF, V
30 pF, V
3.3V, V
2.5V, V
3.3V, V
2.5V, V
0V
0V
0V
0V
OLP
OL
L
L
L
L
IH
IH
IH
IH
IL
IL
IL
IL
V
V
0.6
Quiet Output Dynamic Valley V
0.8
OLV
OL
0.6
Capacitance
Symbol
Parameter
Conditions
Typical
Units
pF
C
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
V
V
V
Open, V 0V or V
CC
7
8
IN
CC
CC
CC
I
C
C
3.3V, V 0V or V
CC
pF
OUT
PD
I
3.3V, V 0V or V , f 10 MHz
10
pF
I
CC
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4
AC LOADING and WAVEFORMS
FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance)
Test
Switch
tPZL, tPLZ
6V at VCC 3.3 0.3V
VCC x 2 at VCC 2.5 0.2V
trise and tfall
3-STATE Output Low Enable and
Disable Times for Logic
FIGURE 2. Waveforms
(Input Characteristics; f =1MHz, tr = tf = 3ns)
VCC
Symbol
3.3V 0.3V
1.5V
2.7V
1.5V
2.5V 0.2V
Vmi
Vmo
Vx
VCC/2
VCC/2
1.5V
1.5V
VOL 0.3V
VOH 0.3V
VOL 0.3V
VOH 0.3V
VOL 0.15V
VOH 0.15V
Vy
5
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Schematic Diagram Generic for LCX Family (output pull-up circuitry is not applicable to open drain versions)
FIGURE 3.
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6
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
7
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
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8
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
Package Number MSA20
9
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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10
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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