74LCXH162244MTX [ONSEMI]

低压16位缓冲器/线路驱动器(输出端带26 Ohm串联电阻);
74LCXH162244MTX
型号: 74LCXH162244MTX
厂家: ONSEMI    ONSEMI
描述:

低压16位缓冲器/线路驱动器(输出端带26 Ohm串联电阻)

驱动 驱动器
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is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
September 2000  
Revised May 2005  
74LCXH162244  
Low Voltage 16-Bit Buffer/Line Driver with Bushold  
and 26: Series Resistors in Outputs  
General Description  
Features  
5V tolerant control inputs and outputs  
The LCXH162244 contains sixteen non-inverting buffers  
with 3-STATE outputs designed to be employed as a mem-  
ory and address driver, clock driver, or bus oriented trans-  
mitter/receiver. The device is nibble controlled. Each nibble  
has separate 3-STATE control inputs which can be shorted  
together for full 16-bit operation.  
2.3V–3.6V VCC specifications provided  
Outputs include equivalent series resistance of 26 to  
make external termination resistors unnecessary and  
reduce overshoot and undershoot  
Bushold on data inputs eliminates the need for external  
pull-up/pull-down resistors  
The LCXH162244 data inputs include active bushold cir-  
cuitry, eliminating the need for external pull-up resistors to  
hold unused or floating data inputs at a valid logic level.  
5.3 ns tPD max (VCC 3.0V), 20 A ICC max  
Power down high impedance inputs and outputs  
In addition, the outputs include equivalent 26 (nominal)  
series resistors to reduce overshoot and undershoot and  
are designed to sink/source up to 12 mA at VCC 3.0V.  
12 mA output drive (VCC 3.0V)  
Implements proprietary noise/EMI reduction circuitry  
Latch-up performance exceeds 500 mA  
ESD performance:  
The LCXH162244 is designed for low voltage (2.5V or  
3.3V) VCC applications with capability of interfacing to a 5V  
signal environment.  
Human body model 2000V  
The LCXH162244 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing CMOS low power dissipation.  
Machine model 200V  
Ordering Code:  
Order Number  
Package Number  
Package Description  
74LCXH162244MEA  
MS48A  
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide  
[RAIL]  
74LCXH162244MEX  
74LCXH162244MTD  
74LCXH162244MTX  
MS48A  
MTD48  
MTD48  
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide  
[TAPE and REEL]  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
[RAIL]  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
[TAPE and REEL]  
© 2005 Fairchild Semiconductor Corporation  
DS500249  
www.fairchildsemi.com  
Connection Diagram  
Logic Symbol  
Pin Descriptions  
Pin Names  
Description  
OEn  
Output Enable Input (Active LOW)  
Bushold Inputs  
I0I15  
O0O15  
Outputs  
www.fairchildsemi.com  
2
Truth Tables  
Inputs  
Outputs  
O0–O3  
Inputs  
Outputs  
O8–O11  
OE1  
I0–I3  
OE3  
I8–I11  
L
L
L
H
X
L
H
Z
L
L
L
H
X
L
H
Z
H
H
Inputs  
Outputs  
O4–O7  
Inputs  
Outputs  
O12–O15  
OE2  
I4–I7  
OE4  
I12–I15  
L
L
L
H
X
L
H
Z
L
L
L
H
X
L
H
Z
H
H
H
L
HIGH Voltage Level  
LOW Voltage Level  
X
Z
Immaterial  
High Impedance  
Functional Description  
The LCXH162244 contains sixteen non-inverting buffers  
with 3-STATE standard outputs. The LCXH162244 data  
inputs include active bushold circuitry eliminating the need  
for pull-up resistors to hold unused or floating data inputs at  
a valid logic level. The devise is also designed with 26  
series resistors in the outputs. This design reduces line  
noise in applications such as memory address drivers,  
clock drivers and bus transceiver/transmitters. The device  
is nibble (4 bits) controlled with each nibble functioning  
identically, but independent of the other. The control pins  
can be shorted together to obtain full 16-bit operation. The  
3-STATE outputs are controlled by an Output Enable (OEn)  
input for each nibble. When OEn is LOW, the outputs are in  
2-state mode. When OEn is HIGH, the outputs are in the  
high impedance mode, but this does not interfere with  
entering new data into the inputs.  
Logic Diagram  
3
www.fairchildsemi.com  
Absolute Maximum Ratings(Note 1)  
Symbol  
Parameter  
Supply Voltage  
Value  
Conditions  
Units  
VCC  
0.5 to 7.0  
V
VI  
DC Input Voltage  
OE  
0.5 to 7.0  
V
I0 - I15  
0.5 to VCC 0.5  
VO  
DC Output Voltage  
0.5 to 7.0  
Output in 3-STATE  
Output in HIGH or LOW State (Note 2)  
VI GND  
V
0.5 to VCC 0.5  
IIK  
DC Input Diode Current  
DC Output Diode Current  
50  
50  
mA  
mA  
IOK  
VO GND  
50  
VO VCC  
IO  
DC Output Source/Sink Current  
DC Supply Current per Supply Pin  
DC Ground Current per Ground Pin  
Storage Temperature  
50  
mA  
mA  
mA  
C
ICC  
100  
IGND  
TSTG  
100  
65 to 150  
Recommended Operating Conditions (Note 3)  
Symbol  
Parameter  
Min  
2.0  
1.5  
0
Max  
3.6  
3.6  
VCC  
VCC  
5.5  
12  
Units  
VCC  
Supply Voltage  
Operating  
V
V
V
Data Retention  
VI  
Input Voltage  
VO  
Output Voltage  
HIGH or LOW State  
3-STATE  
0
0
I
OH/IOL  
Output Current  
VCC 3.0V 3.6V  
VCC 2.7V 3.0V  
VCC 2.3V 2.7V  
8
mA  
4
TA  
t/ V  
Free-Air Operating Temperature  
40  
0
85  
C
Input Edge Rate, VIN 0.8V2.0V, VCC 3.0V  
10  
ns/V  
Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated  
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The Recom-  
mended Operating Conditionstable will define the conditions for actual device operation.  
Note 2: I Absolute Maximum Rating must be observed.  
O
Note 3: Unused control inputs must be held HIGH or LOW. They may not float.  
DC Electrical Characteristics  
V
T
40 C to 85 C  
Min Max  
CC  
A
Symbol  
Parameter  
Conditions  
Units  
(V)  
2.3 2.7  
2.7 3.6  
2.3 2.7  
2.7 3.6  
2.3 3.6  
2.3  
V
V
V
HIGH Level Input Voltage  
1.7  
2.0  
IH  
V
V
LOW Level Input Voltage  
HIGH Level Output Voltage  
0.7  
IL  
0.8  
I
I
I
I
I
I
I
I
I
I
I
I
100  
A
V
CC  
0.2  
OH  
OH  
OH  
OH  
OH  
OH  
OH  
OL  
OL  
OL  
OL  
OL  
OL  
4 mA  
4 mA  
6 mA  
8 mA  
1.8  
2.2  
2.4  
2.0  
2.0  
2.7  
V
V
3.0  
2.7  
12 mA  
100  
3.0  
V
LOW Level Output Voltage  
A
2.3 3.6  
2.3  
0.2  
0.6  
OL  
4 mA  
4 mA  
6 mA  
8 mA  
2.7  
0.4  
3.0  
0.55  
0.6  
2.7  
12 mA  
3.0  
0.8  
www.fairchildsemi.com  
4
DC Electrical Characteristics (Continued)  
V
T
40 C to 85 C  
CC  
A
Symbol  
Parameter  
Input Leakage Current  
Conditions  
V or GND  
CC  
Units  
(V)  
Min  
Max  
5.0  
I
I
Data  
V
0
2.3 3.6  
2.3 3.6  
I
I
A
Control  
V
5.5  
5.0  
I
Bushold Input Minimum  
Drive Hold Current  
V
V
V
V
0.7V  
1.7V  
0.8V  
2.0V  
45  
45  
I(HOLD)  
I(OD)  
OZ  
IN  
IN  
IN  
IN  
2.3  
3.0  
A
75  
75  
I
I
Bushold Input Over-Drive  
Current to Change State  
(Note 4)  
(Note 5)  
(Note 4)  
(Note 5)  
300  
300  
450  
450  
2.7  
A
A
3.6  
3-STATE Output Leakage  
0
V
5.5V  
or V  
O
2.3 3.6  
5.0  
V
V
V
V
V
IH  
I
IL  
I
I
Power-Off Leakage Current  
Quiescent Supply Current  
5.5V  
or GND  
0
10  
20  
A
A
A
OFF  
CC  
O
I
V
2.3 3.6  
2.3 3.6  
CC  
I
Increase in I per Input  
V 0.6V  
CC  
500  
CC  
CC  
IH  
Note 4: An external driver must source at least the specified current to switch from LOW-to-HIGH.  
Note 5: An external driver must sink at least the specified current to switch from HIGH-to-LOW.  
AC Electrical Characteristics  
T
40 C to 85 C, R  
500  
A
L
V
3.3V 0.3V  
50 pF  
V
2.7V  
V
CC  
2.5V 0.2V  
CC  
CC  
Symbol  
Parameter  
Units  
C
C
50 pF  
C
L
30 pF  
Max  
L
L
Min  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
Max  
5.3  
5.3  
6.3  
6.3  
5.4  
5.4  
1.0  
1.0  
Min  
Max  
6.0  
6.0  
7.1  
7.1  
5.7  
5.7  
Min  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
t
t
t
t
t
t
t
t
Propagation Delay  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
6.4  
6.4  
8.2  
8.2  
6.5  
6.5  
PHL  
ns  
ns  
ns  
ns  
Data to Output  
PLH  
Output Enable Time  
PZL  
PZH  
PLZ  
Output Disable Time  
PHZ  
OSHL  
OSLH  
Output to Output Skew (Note 6)  
Note 6: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The  
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t  
) or LOW-to-HIGH (t  
). Parameter guaranteed by design.  
OSLH  
OSHL  
Dynamic Switching Characteristics  
V
T
25 C  
CC  
A
Symbol  
Parameter  
Conditions  
Units  
(V)  
3.3  
2.5  
3.3  
2.5  
Typical  
0.35  
V
Quiet Output Dynamic Peak V  
C
C
C
C
50 pF, V  
30 pF, V  
50 pF, V  
30 pF, V  
3.3V, V  
2.5V, V  
3.3V, V  
2.5V, V  
0V  
0V  
0V  
0V  
OLP  
OLV  
OL  
L
L
L
L
IH  
IH  
IH  
IH  
IL  
IL  
IL  
IL  
V
V
0.25  
V
Quiet Output Dynamic Valley V  
0.35  
OL  
0.25  
Capacitance  
Symbol  
Parameter  
Conditions  
Typical  
Units  
pF  
C
Input Capacitance  
Output Capacitance  
Power Dissipation Capacitance  
V
V
V
Open, V 0V or V  
CC  
7
8
IN  
CC  
CC  
CC  
I
C
C
3.3V, V 0V or V  
CC  
pF  
OUT  
PD  
I
3.3V, V 0V or V , f 10 MHz  
20  
pF  
I
CC  
5
www.fairchildsemi.com  
AC LOADING and WAVEFORMS Generic for LCX Family  
FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance)  
VI  
6V for VCC 3.3V, 2.7V  
CC * 2 for VCC 2.5V  
CL  
50 pF  
30 pF  
V
3-STATE Output High Enable and  
Waveform for Inverting and Non-Inverting Functions  
Disable Times for Logic  
Setup Time, Hold Time and Recovery Time for Logic  
Propagation Delay. Pulse Width and trec Waveforms  
trise and tfall  
3-STATE Output Low Enable and  
Disable Times for Logic  
FIGURE 2. Waveforms  
(Input Characteristics; f =1MHz, tR = tF = 3ns)  
VCC  
Symbol  
Vmi  
3.3V 0.3V  
1.5V  
2.7V  
2.5V 0.2V  
VCC/2  
1.5V  
1.5V  
Vmo  
Vx  
1.5V  
VCC/2  
VOL 0.3V  
VOH 0.3V  
VOL 0.3V  
VOH 0.3V  
VOL 0.15V  
VOH 0.15V  
Vy  
www.fairchildsemi.com  
6
Schematic Diagram Generic for LCXH Family  
7
www.fairchildsemi.com  
Physical Dimensions inches (millimeters) unless otherwise noted  
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide  
Package Number MS48A  
www.fairchildsemi.com  
8
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Package Number MTD48  
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and  
Fairchild reserves the right at any time without notice to change said circuitry and specifications.  
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FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD  
SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the  
body, or (b) support or sustain life, and (c) whose failure  
to perform when properly used in accordance with  
instructions for use provided in the labeling, can be rea-  
sonably expected to result in a significant injury to the  
user.  
2. A critical component in any component of a life support  
device or system whose failure to perform can be rea-  
sonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
www.fairchildsemi.com  
9
www.fairchildsemi.com  
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regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
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