74LVC374A [ONSEMI]
Low-Voltage CMOS Octal D-Type Flip-Flop;
| 型号： | 74LVC374A |
| 厂家： | 
ONSEMI |
| 描述： | Low-Voltage CMOS Octal D-Type Flip-Flop |
| 文件： | 总10页 (文件大小：101K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74LVC374A
Low-Voltage CMOS Octal
D-Type Flip-Flop
With 5 V−Tolerant Inputs and Outputs
(3−State, Non−Inverting)
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The 74LVC374A is a high performance, non−inverting octal D−type
flip−flop operating from a 1.2 to 3.6 V supply. High impedance TTL
compatible inputs significantly reduce current loading to input drivers
while TTL compatible outputs offer improved switching noise
performance. A VI specification of 5.5 V allows 74LVC374A inputs to
be safely driven from 5 V devices.
The 74LVC374A consists of 8 edge−triggered flip−flops with
individual D−type inputs and 3−state true outputs. The buffered clock
and buffered Output Enable (OE) are common to all flip−flops. The
eight flip−flops will store the state of individual D inputs that meet the
setup and hold time requirements on the LOW−to−HIGH Clock (CP)
transition. With the OE LOW, the contents of the eight flip−flops are
available at the outputs. When the OE is HIGH, the outputs go to the
high impedance state. The OE input level does not affect the operation
of the flip−flops.
MARKING
DIAGRAM
20
1
LVC
374A
ALYWG
G
TSSOP−20
DT SUFFIX
CASE 948E
20
1
A
L, WL
Y, YY
= Assembly Location
= Wafer Lot
= Year
W, WW = Work Week
G or G
= Pb−Free Package
(Note: Microdot may be in either location)
Features
• Designed for 1.2 to 3.6 V V Operation
CC
• 5 V Tolerant − Interface Capability With 5 V TTL Logic
• Supports Live Insertion and Withdrawal
ORDERING INFORMATION
See detailed ordering and shipping information on page 8 of
this data sheet.
• IOFF Specification Guarantees High Impedance When VCC = 0 V
• 24 mA Output Sink and Source Capability
• Near Zero Static Supply Current in All Three Logic States (10 mA)
Substantially Reduces System Power Requirements
• ESD Performance:
♦ Human Body Model >2000 V
♦ Machine Model >200 V
• These are Pb−Free Devices
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
April, 2016 − Rev. 2
74LVC374A/D
74LVC374A
1
OE
CP
11
2
CP
CP
CP
CP
CP
V
O7
19
D7
18
D6
17
O6
16
O5
15
D5
14
D4
13
O4
12
CP
11
O0
O1
O2
O3
O4
O5
O6
O7
3
4
CC
Q
Q
Q
Q
Q
D0
D1
D2
D3
D4
D5
D6
D7
D
D
D
D
D
20
5
6
7
1
2
3
4
5
6
7
9
8
10
OE
O0
D0
D1
O1
O2
D2
D3
O3 GND
9
Figure 1. Pinout: 20−Lead (Top View)
8
12
15
16
19
13
14
17
18
PIN NAMES
Pins
CP
CP
CP
Function
Output Enable Input
Clock Pulse Input
Data Inputs
Q
Q
Q
D
D
D
OE
CP
D0−D7
O0−O7
3−State Outputs
Figure 2. LOGIC DIAGRAM
TRUTH TABLE
OE
INPUTS
OUTPUTS
On
CP
Dn
OPERATING MODE
L
L
↑
↑
l
h
L
H
Load and Read Register
L
↑
↑
X
X
NC
Z
Hold and Read Register
Hold and Disable Outputs
H
H
H
↑
↑
l
h
Z
Z
Load Internal Register and Disable Outputs
H
h
L
=
=
=
=
=
=
=
=
=
High Voltage Level
High Voltage Level One Setup Time Prior to the Low−to−High Clock Transition
Low Voltage Level
Low Voltage Level One Setup Time Prior to the Low−to−High Clock Transition
No Change, State Prior to Low−to−High Clock Transition
High or Low Voltage Level and Transitions are Acceptable
High Impedance State
l
NC
X
Z
↑
Low−to−High Transition
Not a Low−to−High Transition; For I Reasons, DO NOT FLOAT Inputs
↑
CC
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2
74LVC374A
MAXIMUM RATINGS
Symbol
Parameter
Condition
Value
Unit
DC Supply Voltage
DC Input Voltage
−0.5 to +6.5
V
VCC
VI
−0.5 ≤ VI ≤ +6.5
V
VO
DC Output Voltage
Output in 3−State
−0.5 ≤ VO ≤ +6.5
V
V
Output in HIGH or LOW State
(Note 1)
−0.5 ≤ V ≤ V + 0.5
O
CC
DC Input Diode Current
DC Output Diode Current
VI < GND
VO < GND
−50
mA
IIK
IOK
−50
+50
mA
mA
V
O
> V
CC
IO
ICC
DC Output Source/Sink Current
DC Supply Current Per Supply Pin
DC Ground Current Per Ground Pin
Storage Temperature Range
50
mA
mA
mA
°C
100
100
IGND
TSTG
TL
−65 to +150
Lead Temperature, 1 mm from Case for
10 Seconds
T = 260
°C
L
TJ
Junction Temperature Under Bias
T = 135
J
°C
Thermal Resistance (Note 2)
Moisture Sensitivity
TSSOP
110.7
°C/W
qJA
MSL
Level 1
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. IO absolute maximum rating must be observed.
2. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Typ
Max
Unit
V
V
CC
Supply Voltage Operating Functional
1.65
1.2
3.6
3.6
V
Input Voltage
0
5.5
V
V
I
V
O
Output Voltage
HIGH or LOW State
3−State
0
0
V
CC
5.5
HIGH Level Output Current
mA
mA
I
OH
−24
−12
V
CC
= 3.0 V − 3.6 V V = 2.7 V − 3.0 V
CC
LOW Level Output Current
= 3.0 V − 3.6 V V = 2.7 V − 3.0 V
I
OL
24
12
V
CC
CC
T
Operating Free−Air Temperature
Input Transition Rise or Fall Rate,
−40
+125
°C
A
ns/V
Dt/DV
V
CC
V
CC
= 1.65 to 2.7 V
= 2.7 to 3.6 V
0
0
20
10
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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3
74LVC374A
DC ELECTRICAL CHARACTERISTICS
−40 to +855C
−40 to +1255C
Typ
Typ
Min (Note 3) Max
Min (Note 3) Max
Symbol
Parameter
Conditions
= 1.2 V
Unit
V
IH
V
V
1.08
−
−
−
−
1.08
−
−
−
−
HIGH−level input voltage
CC
V
CC
= 1.65 V to 1.95 V
0.65 x
0.65 x
V
CC
V
CC
V
V
= 2.3 V to 2.7 V
= 2.7 V to 3.6 V
1.7
2.0
−
−
−
−
1.7
2.0
−
−
−
−
CC
CC
V
V
V
V
= 1.2 V
−
−
−
−
0.12
−
−
−
−
0.12
LOW−level input voltage
HIGH−level output voltage
IL
CC
V
= 1.65 V to 1.95 V
0.35 x
0.35 x
CC
V
CC
V
CC
V
V
= 2.3 V to 2.7 V
= 2.7 V to 3.6 V
−
−
−
−
0.7
0.8
−
−
−
−
0.7
0.8
CC
CC
V
OH
V = V or V
I
IH
IL
V
−
−
−
V
0.3
−
−
−
I
= −100 mA;
= 1.65 V to 3.6 V
CC
CC
O
0.2
1.2
1.8
2.2
2.4
2.2
V
CC
I
= −4 mA; V = 1.65 V
−
−
−
−
−
−
−
−
−
−
1.05
1.65
2.05
2.25
2.0
−
−
−
−
−
−
−
−
−
−
O
CC
I
= −8 mA; V = 2.3 V
CC
O
I
I
I
= −12 mA; V = 2.7 V
CC
O
O
O
= −18 mA; V = 3.0 V
CC
= −24 mA; V = 3.0 V
CC
V
OL
V
VI = VIH or VIL
LOW−level output voltage
−
−
0.2
−
−
0.3
I
O
= 100 mA;
V
CC
= 1.65 V to 3.6 V
I
= 4 mA; V = 1.65 V
−
−
−
−
−
−
−
−
0.45
0.6
−
−
−
−
−
−
−
−
0.65
0.8
0.6
0.8
O
CC
I
= 8 mA; V = 2.3 V
CC
O
I
O
= 12 mA; V = 2.7 V
0.4
CC
I
= −24 mA; V = 3.0 V
0.55
O
CC
I
Input leakage current
V = 5.5 V or GND;
−
0.1
5
−
0.1
20
mA
mA
I
I
V
CC
= 3.6 V
VI = VIH or VIL;
= 5.5 V or GND;
−
0.1
5
−
0.1
20
I
OFF−state output current
OZ
V
O
V
CC
= 3.6 V
V or V = 5.5 V; V = 0.0 V
−
−
0.1
0.1
10
10
−
−
0.1
0.1
20
40
I
mA
mA
Power−off leakage current
Supply current
I
O
CC
OFF
I
V = V or GND; I = 0 A;
CC
I
CC
O
V
CC
= 3.6 V
per input pin;
V = V − 0.6 V; I = 0 A;
−
5
500
−
5
5000
mA
DI
CC
Additional supply current
I
CC
O
V
CC
= 2.7 V to 3.6 V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. All typical values are measured at T = 25°C and V = 3.3 V, unless stated otherwise.
A
CC
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4
74LVC374A
AC ELECTRICAL CHARACTERISTICS (t = t = 2.5 ns)
R
F
−40 to +855C
−40 to +1255C
Typ
Typ
(Note 4)
(Note 4)
Min
Max
Min
Max
Unit
Symbol
Parameter
Conditions
Propagation Delay (Note 5)
CP to On
tpd
V
= 1.2 V
−
16.0
7.4
3.9
3.5
3.3
−
−
−
−
−
−
−
−
CC
V
= 1.65 V to 1.95 V
2.2
1.5
1.5
1.5
16.3
8.4
8.0
7.0
2.2
1.5
1.5
1.5
18.8
9.7
CC
ns
V
= 2.3 V to 2.7 V
CC
V
CC
= 2.7 V
10.0
9.0
V
= 3.0 V to 3.6 V
= 1.2 V
CC
Enable Time (Note 6)
OE to On
ten
V
CC
−
19.0
6.6
3.7
3.8
3.0
−
−
−
−
−
−
−
−
V
CC
= 1.65 V to 1.95 V
1.5
1.5
1.5
1.5
16.7
9.3
8.5
7.5
1.5
1.5
1.5
1.5
19.3
10.8
11.0
9.5
ns
ns
V
= 2.3 V to 2.7 V
CC
V
CC
= 2.7 V
V
= 3.0 V to 3.6 V
= 1.2 V
CC
Disable Time (Note 7)
OE to On
tdis
V
CC
−
8.0
4.0
2.2
3.1
2.9
−
−
−
−
−
−
−
−
V
CC
= 1.65 V to 1.95 V
2.3
1.0
1.5
1.5
10.1
5.7
6.5
6.0
2.3
1.0
1.5
1.5
11.7
6.7
9.0
7.5
V
= 2.3 V to 2.7 V
CC
V
CC
= 2.7 V
V
= 3.0 V to 3.6 V
CC
Pulse Width
CP HIGH or LOW
tw
V
= 1.65 V to 1.95 V
5.0
4.0
3.0
3.0
−
−
−
−
−
−
5.0
4.0
4.5
4.5
−
−
−
−
−
−
−
−
CC
V
= 2.3 V to 2.7 V
CC
ns
ns
ns
V
CC
= 2.7 V
−
V
= 3.0 V to 3.6 V
1.5
CC
Set−up Time
Dn to CP
tsu
V
= 1.65 V to 1.95 V
4.0
3.0
2.0
2.0
−
−
−
−
−
−
4.0
3.0
2.0
2.0
−
−
−
−
−
−
−
−
CC
V
= 2.3 V to 2.7 V
CC
V
CC
= 2.7 V
−
V
= 3.0 V to 3.6 V
0.0
CC
Hold Time
Dn to CP
th
V
CC
= 1.65 V to 1.95 V
3.0
2.0
1.5
1.5
−
−
−
−
−
−
3.0
2.0
1.5
1.5
−
−
−
−
−
−
−
−
V
= 2.3 V to 2.7 V
CC
V
CC
= 2.7 V
−
V
= 3.0 V to 3.6 V
0.6
CC
Maximum Frequency
fmax
V
= 1.65 V to 1.95 V
100
125
150
150
−
−
−
−
−
−
−
−
64
100
120
120
−
−
−
−
−
−
−
−
CC
V
= 2.3 V to 2.7 V
CC
MHz
ns
V
CC
= 2.7 V
V
= 3.0 V to 3.6 V
CC
Output Skew Time (Note 8)
−
−
1.0
−
−
1.5
tsk(0)
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Typical values are measured at TA = 25°C and VCC = 3.3 V, unless stated otherwise.
5. t is the same as t
and t
.
pd
PLH
PHL
6. t is the same as t
and t
.
en
PZL
PZH
7. t is the same as t
and t
.
dis
PLZ
PHZ
8. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
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5
74LVC374A
DYNAMIC SWITCHING CHARACTERISTICS
TA = +25°C
Min
Typ
Max
Symbol
Characteristic
Condition
Unit
Dynamic LOW Peak Voltage
(Note 9)
0.8
0.6
V
V
OLP
V
CC
V
CC
= 3.3 V, C = 50 pF, V = 3.3 V, V = 0 V
L
IH
IL
= 2.5 V, C = 30 pF, V = 2.5 V, V = 0 V
L
IH
IL
Dynamic LOW Valley Voltage
(Note 9)
−0.8
−0.6
V
V
OLV
V
CC
V
CC
= 3.3 V, C = 50 pF, V = 3.3 V, V = 0 V
L IH IL
= 2.5 V, C = 30 pF, V = 2.5 V, V = 0 V
L
IH
IL
9. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Input Capacitance
Condition
= 3.3 V, V = 0 V or V
Typical
5.0
Unit
pF
C
V
V
IN
CC
I
CC
CC
C
Output Capacitance
= 3.3 V, V = 0 V or V
6.0
pF
OUT
CC
I
C
Power Dissipation Capacitance
(Note 10)
pF
Per flip−flop; V = GND or V
PD
I
CC
V
= 1.65 V to 1.95 V
11.6
13.6
15.4
CC
V
V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
CC
CC
10.CPD is used to determine the dynamic power dissipation (PD in mW).
2
2
ǒ
foǓ where:
PD + CPD VCC fi N ) S CL VCC
fi = input frequency in MHz; fo = output frequency in MHz
C = output load capacitance in pF
L
V
= supply voltage in Volts
CC
N = number of outputs switching
2
∑(C x V
x fo) = sum of the outputs
L
CC
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74LVC374A
2.7 V
0 V
2.7 V
1.5 V
1.5 V
OE
Dn
CP
1.5 V
0 V
t
t
PHZ
PZH
V
t
CC
t
s
h
2.7 V
V
OH
- 0.3 V
1.5V
1.5V
On
1.5 V
≈ 0 V
0V
f
max
t
t
PLZ
PZL
t
, t
PLH PHL
≈ 3.0 V
V
OH
OL
On
V
+ 0.3 V
OL
On
1.5 V
GND
V
WAVEFORM 1 − PROPAGATION DELAYS,
SETUP AND HOLD TIMES
WAVEFORM 2 − OUTPUT ENABLE AND DISABLE TIMES
= t = 2.5 ns, 10% to 90%; f = 1 MHz; t = 500 ns
t
R
F
W
t
R
= t = 2.5 ns, 10% to 90%; f = 1 MHz; t = 500 ns
F W
2.7 V
CP
1.5 V
1.5 V
t
t
0 V
w
2.7 V
w
1.5 V
1.5 V
CP
0 V
WAVEFORM 3 − PULSE WIDTH
t
R
= t = 2.5 ns (or fast as required) from 10% to 90%;
F
Output requirements: V ≤ 0.8 V, V ≥ 2.0 V
OL
OH
VCC
2.7 V
1.5 V
1.5 V
Symbol
Vmi
3.3 V 0.3 V
1.5 V
V
< 2.7 V
CC
V
/2
/2
CC
Vmo
1.5 V
V
CC
V
V
+ 0.3 V
− 0.3 V
VOL + 0.3 V
VOH − 0.3 V
V
+ 0.15 V
− 015 V
OH
VHZ
VLZ
OL
OL
V
OH
Figure 3. AC Waveforms
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74LVC374A
V
CC
6 V
OPEN
GND
R
1
PULSE
GENERATOR
DUT
R
T
C
R
L
L
VEXT
Supply Voltage
Input
Load
tPLH, tPHL tPLZ, tPZL tPHZ, tPZH
V
CC
(V)
V
I
t , t
C
R
L
r
f
L
1.2
≤ 2 ns
≤ 2 ns
≤ 2 ns
30 pF
30 pF
30 pF
Open
Open
Open
Open
Open
2 x V
2 x V
2 x V
2 x V
2 x V
GND
GND
GND
GND
GND
VCC
VCC
1 kW
1 kW
CC
CC
CC
CC
CC
1.65 − 1.95
2.3 − 2.7
2.7
VCC
500 W
500 W
500 W
2.7 V
2.7 V
≤ 2.5 ns 50 pF
≤ 2.5 ns 50 pF
3.0 − 3.6
Figure 4. Test Circuit
ORDERING INFORMATION
†
Device
74LVC374ADTR2G
Package
Shipping
TSSOP−20
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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8
74LVC374A
PACKAGE DIMENSIONS
TSSOP−20
DT SUFFIX
CASE 948E−02
ISSUE C
NOTES:
1. DIMENSIONING AND TOLERANCING
20X K REF
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION:
MILLIMETER.
M
S
S
V
0.10 (0.004)
T
U
S
T U
0.15 (0.006)
K
3. DIMENSION A DOES NOT INCLUDE
MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH OR GATE BURRS
SHALL NOT EXCEED 0.15 (0.006) PER
SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER
SIDE.
K1
20
11
2X L/2
J J1
B
L
−U−
PIN 1
IDENT
SECTION N−N
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
1
10
0.25 (0.010)
N
S
0.15 (0.006)
T U
6. TERMINAL NUMBERS ARE SHOWN
FOR REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
M
A
−V−
N
MILLIMETERS
DIM MIN MAX
INCHES
MIN
MAX
0.260
0.177
0.047
0.006
0.030
F
A
B
6.40
4.30
---
6.60 0.252
4.50 0.169
DETAIL E
C
1.20
---
D
0.05
0.50
0.15 0.002
0.75 0.020
−W−
F
C
G
H
0.65 BSC
0.026 BSC
0.27
0.09
0.09
0.19
0.19
0.37
0.011
0.015
0.008
0.006
0.012
0.010
J
0.20 0.004
0.16 0.004
0.30 0.007
0.25 0.007
G
D
J1
K
H
DETAIL E
0.100 (0.004)
−T− SEATING
K1
L
6.40 BSC
0.252 BSC
0
M
0
8
8
_
_
_
_
PLANE
SOLDERING FOOTPRINT*
7.06
1
0.65
PITCH
16X
0.36
16X
1.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
9
74LVC374A
ON Semiconductor and the
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74LVC374A/D
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