74LVX08M [ONSEMI]
低压四路2输入"与"门;型号: | 74LVX08M |
厂家: | ONSEMI |
描述: | 低压四路2输入"与"门 栅 光电二极管 逻辑集成电路 触发器 |
文件: | 总8页 (文件大小:348K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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June 2014
74LVX08
Low Voltage Quad 2-Input AND Gate
Features
Description
• Input Voltage Level Translation from 5 V to 3 V
• Ideal for Low-power / Low-Noise 3.3 V Applications
• Guaranteed Simultaneous Switching Noise Level and
Dynamic threshold Performance
The LVX08 contains four 2-input AND gates. The inputs
tolerate voltages up to 7 V allowing the interface of 5 V
systems to 3 V systems.
Ordering Information
Part Number Top Mark Package Packing Method
Packing Description
14-Lead Small Outline Integrated Circuit, JEDEC
MS-012, 0.150 inch Narrow
74LVX08M
74LVX08MX
LVX08
LVX08
LVX08
SOIC 14L
SOIC 14L
Rail
14-Lead Small Outline Integrated Circuit, JEDEC
MS-012, 0.150 inch Narrow
Tape and Reel
Tape and Reel
14-Lead Thin Shrink Small Outline Package,
JEDEC MO-153, 4.4 mm Wide
74LVX08MTCX
TSSOP 14L
All packages are lead free per JEDEC: J-STD-020B standard.
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Description
Pin Names
An, Bn
Description
Inputs
On
Outputs
© 1993 Fairchild Semiconductor Corporation
74LVX08 Rev. 1.5.0
www.fairchildsemi.com
1
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-
ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-
tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only.
Symbol
VCC
IIK
Parameter
Rating
-0.5 V to 7.0 V
-20 mA
Supply Voltage
DC Input Diode Current, VI = -0.5 V
DC Input Voltage
VI
-0.5 V to 7.0 V
-20 mA
VO = -0.5 V
IOK
DC Output Diode Current
VO = VCC + 0.5 V
+20 mA
VO
DC Output Voltage
-0.5 V to VCC + 0.5 V
±25 mA
IO
ICC or IGND
TSTG
P
DC Output Source or Sink Current
DC VCC or Ground Current
Storage Temperature
±50 mA
-65°C to 150°C
180 mW
Power Dissipation
TL
Lead Temperature (Soldering, 10 seconds)
240°C
Recommended Operating Conditions(1)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
VCC
Parameter
Rating
2.0 V to 3.6 V
0 V to 5.5 V
Supply Voltage
VI
Input Voltage
VO
Output Voltage
0 V to VCC
TA
Operating Temperature
Input Rise and Fall Time
-40°C to 85°C
0 ns/V to 100 ns/V
Δt / ΔV
Note:
1. Unused inputs must be held HIGH or LOW. They may not float.
© 1993 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74LVX08 Rev. 1.5.0
2
DC Electrical Characteristics
TA = -40°C to
+85°C
TA = 25°C
Symbol
VIH
Parameter
VCC
Conditions
Unit
V
Min.
1.5
Typ. Max. Min. Max.
2.0
3.0
3.6
2.0
3.0
3.6
1.5
2.0
2.4
HIGH Level Input
Voltage
2.0
2.4
0.5
0.8
0.8
0.5
0.8
0.8
LOW Level Input
Voltage
VIL
V
VIN = VIL or VIH,
IOH = -50 μA
2.0
3.0
2.0
3.0
1.9
2.9
2.0
3.0
1.9
2.9
VIN = VIL or VIH,
IOH = -50 μA
HIGH Level Output
Voltage
VOH
V
V
VIN = VIL or VIH,
IOH = -4 mA
2.58
2.48
VIN = VIL or VIH,
0.0
0.0
0.1
0.1
0.1
0.1
IOL = -50 μA
VIN = VIL or VIH,
IOL = -50 μA
LOW Level Output
Voltage
VOL
VIN = VIL or VIH,
IOL = -4 mA
0.36
±0.1
0.44
±1.0
Input Leakage
Current
IIN
3.6
3.6
VIN = 5.5 V or GND
μA
μA
Quiescent Supply
Current
ICC
VIN = VCC or GND
2.0
20.0
Noise Characteristics(2)
TA = 25°C
Symbol
Parameter
VCC (V) CL (pF)
Unit
Typ. Limit
VOLP
VOLV
VIHD
VILD
Quiet Output Maximum Dynamic VOL
Quiet Output Minimum Dynamic VOL
3.3
3.3
3.3
3.3
50
50
50
50
0.3
0.5
-0.5
2.0
0.8
V
V
V
V
-0.3
Minimum HIGH Level Dynamic Input Voltage
Maximum LOW Level Dynamic Input Voltage
Note:
2. Input tr = tf = 3 ns
© 1993 Fairchild Semiconductor Corporation
74LVX08 Rev. 1.5.0
www.fairchildsemi.com
3
AC Electrical Characteristics
TA = -40°C to
+85°C
TA = 25°C
Symbol
Parameter
VCC (V) CL (pF)
Unit
Min.
Typ. Max. Min. Max.
15
6.3
8.8
4.8
7.3
11.4
14.9
7.1
1.0
1.0
1.0
1.0
13.5
17.0
8.5
2.7
50
tPLH, tPHL
ns
ns
Propagation Delay Time
Output to Output Skew(3)
15
3.3 ± 0.3
50
10.6
1.5
12.0
1.5
tOSLH
,
2.7
50
tOSHL
3.3
1.5
1.5
Note:
3. Parameter guaranteed by design tOSLH = I tPLHm - tPLHn I, tOSHL = I tPHLm - tPHLn I.
Capacitance
TA = -40°C to
+85°C
TA = 25°C
Symbol
Parameter
Unit
Min.
Typ. Max. Min. Max.
CIN
4
10
10
pF
pF
Input Capacitance
Power Dissipation Capacitance(4)
CPD
18
Note:
4. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current
consumption without load.
C
PD x VCC x fIN x ICC
Average operating current can be obtained by the eqation: ICC(opr.)
=
4 (per Gate)
© 1993 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74LVX08 Rev. 1.5.0
4
0.65
A
ꢀꢁꢂꢂꢂꢁꢃꢂ
0.43TYP
14
8
B
6.4
ꢄꢁꢄꢂꢂꢁꢃꢂ
6.10
3.2
1.65
0.2 C B A
ALL LEAD TIPS
1
7
PIN#1 IDENT
TOP VIEW
0.45
RECOMMENDED LAND PATTERN
SEE DETAIL A
1.2 MAX
+0.15
-0.10
0.90
0.20
0.09
ꢂꢁꢃꢂꢂꢁꢂꢀ
0.30
0.19
ALL LEAD TIPS
C
0.1 C
0.13
A B
C
0.65
ꢃꢅꢁꢂꢂꢆ723ꢆꢇꢆ%27720
FRONT VIEW
0.09 MIN
NOTES:
GAGE PLANE
A. CONFORMS TO JEDEC REGISTRATION MO-153,
VARIATION AB, REF NOTE 6
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS
D. DIMENSIONING AND TOLERANCES PER ANSI
Y14.5M, 2009.
0.25
0.09 MIN
ꢂꢉꢆꢊ
ꢂꢁꢈꢂꢁꢃ
1.00
SEATING PLANE
DETAIL A
E. LANDPATTERN STANDARD: SOP65P640X110-14M.
F. DRAWING FILE NAME: MKT-MTC14rev7.
8.75
8.50
A
0.65
7.62
14
8
14
8
B
4.00
3.80
5.60
6.00
1.70
1
7
PIN #1
IDENT.
1
7
1.27
0.51
0.35
1.27
(0.33)
M
0.25
C B A
LAND PATTERN RECOMMENDATION
TOP VIEW
1.75 MAX
A
0.25
0.19
C
0.10 C
NOTES:
1.50
1.25
0.25
0.10
SIDE VIEW
FRONT VIEW
A. CONFORMS TO JEDEC MS-012,
VARIATION AB, ISSUE C
B. ALL DIMENSIONS ARE IN MILLIMETERS
C. DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS
0.50
0.25
x 45
R0.10
GAGE
PLANE
D. LAND PATTERN STANDARD:
SOIC127P600X145-14M
R0.10
E. CONFORMS TO ASME Y14.5M, 2009
D. DRAWING FILENAME: MKT-M14Arev14
0.36
8°
0°
0.90
0.50
SEATING PLANE
(1.04)
DETAIL A
SCALE 16 : 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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