74LVX373MTCX [ONSEMI]
低压八路透明锁存器（带3态输出）;
| 型号： | 74LVX373MTCX |
| 厂家： | 
ONSEMI |
| 描述： | 低压八路透明锁存器（带3态输出） 驱动 光电二极管 逻辑集成电路 锁存器 |
| 文件： | 总9页 (文件大小：211K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
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June 1993
Revised April 2005
74LVX373
Low Voltage Octal Transparent Latch with
3-STATE Outputs
General Description
Features
■ Input voltage translation from 5V to 3V
The LVX373 consists of eight latches with 3-STATE outputs
for bus organized system applications. The latches appear
transparent to the data when Latch Enable (LE) is HIGH.
When LE is LOW, the data satisfying the input timing
requirements is latched. Data appears on the bus when the
Output Enable (OE) is LOW. When OE is HIGH, the bus
output is in the high impedance state. The inputs tolerate
up to 7V allowing interface of 5V systems to 3V systems.
■ Ideal for low power/low noise 3.3V applications
■ Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code:
Order Number Package Number
Package Description
74LVX373M
M20B
M20D
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LVX373SJ
74LVX373MTC
MTC20
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDED J-STD-020B.
Logic Symbols
Pin Descriptions
Pin Names
D0–D7
Description
Data Inputs
LE
Latch Enable Input
OE
Output Enable Input
3-STATE Latch Outputs
IEEE/IEC
O0–O7
Truth Table
Inputs
Outputs
On
Dn
LE
X
OE
H
L
X
L
Z
L
H
H
L
L
H
X
H
Connection Diagram
L
O0
H
L
Z
X
O
HIGH Voltage Level
LOW Voltage Level
High Impedance
Immaterial
Previous O before HIGH-to-LOW transition of Latch Enable
0
0
© 2005 Fairchild Semiconductor Corporation
DS011613
www.fairchildsemi.com
Functional Description
The LVX373 contains eight D-type latches with 3-STATE
standard outputs. When the Latch Enable (LE) input is
HIGH, data on the Dn inputs enters the latches. In this con-
sition of LE. The 3-STATE standard outputs are controlled
by the Output Enable (OE) input. When OE is LOW, the
standard outputs are in the 2-state mode. When OE is
HIGH, the standard outputs are in the high impedance
mode but this does not interfere with entering new data into
the latches.
dition the latches are transparent, i.e., a latch output will
change state each time its D input changes. When LE is
LOW, the latches store the information that was present on
the D inputs a setup time preceding the HIGH-to-LOW tran-
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 2)
Supply Voltage (VCC
DC Input Diode Current (IIK
VI 0.5V
DC Input Voltage (VI)
DC Output Diode Current (IOK
VO 0.5V
)
0.5V to 7.0V
)
Supply Voltage (VCC
)
2.0V to 3.6V
0V to 5.5V
20 mA
Input Voltage (VI)
0.5V to 7V
Output Voltage (VO)
0V to VCC
)
Operating Temperature (TA)
40 C to 85 C
0 ns/V to 100 ns/V
20 mA
20 mA
Input Rise and Fall Time ( t/ V)
VO VCC 0.5V
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
DC Output Voltage (VO)
DC Output Source
0.5V to VCC 0.5V
or Sink Current (IO)
25 mA
DC VCC or Ground Current
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
(ICC or IGND
)
75 mA
65 C to 150 C
180 mW
Storage Temperature (TSTG
Power Dissipation
)
DC Electrical Characteristics
T
25 C
Typ
T
40 C to 85 C
A
A
V
Symbol
Parameter
Units
Conditions
CC
Min
1.5
2.0
2.4
Max
Min
Max
V
HIGH Level
2.0
3.0
3.6
2.0
3.0
3.6
2.0
3.0
3.0
2.0
3.0
3.0
3.6
1.5
2.0
2.4
IH
Input Voltage
V
V
V
V
LOW Level
0.5
0.8
0.8
0.5
0.8
0.8
IL
Input Voltage
V
V
HIGH Level
1.9
2.9
2.0
3.0
1.9
2.9
V
V
V
V
V
or V
or V
or V
I
IL OH
50
50
A
A
OH
OL
IN
IH
IH
Output Voltage
I
I
OH
OH
2.58
2.48
4 mA
LOW Level
0.0
0.0
0.1
0.1
0.1
0.1
I
50
50
A
A
IN
IL OL
Output Voltage
V
A
I
I
OL
OL
0.36
0.25
0.44
2.5
4 mA
I
3-STATE Output
V
V
V
V
OZ
IN
IH
V
IL
Off-State Current
or GND
CC
OUT
IN
I
I
Input Leakage Current
Quiescent Supply Current
3.6
3.6
0.1
4.0
1.0
A
A
5.5V or GND
IN
40.0
V or GND
CC
CC
IN
Noise Characteristics (Note 3)
V
T
25 C
Limit
CC
A
C
(pF)
Symbol
Parameter
Quiet Output Maximum Dynamic V
Units
L
(V)
3.3
3.3
3.3
3.3
Typ
V
V
V
V
0.5
0.5
0.8
0.8
2.0
0.8
V
V
V
V
50
OLP
OLV
IHD
ILD
OL
Quiet Output Minimum Dynamic V
50
50
50
OL
Minimum HIGH Level Dynamic Input Voltage
Maximum LOW Level Dynamic Input Voltage
Note 3: Input t
t
3 ns.
r
f
3
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AC Electrical Characteristics
V
T
25 C
Typ
T
40 C to 85 C
Min
CC
A
A
Symbol
Parameter
Units
Conditions
15 pF
(V)
Min
Max
15.0
18.5
9.7
Max
18.5
22.0
11.5
15.0
17.5
21.0
11.0
14.5
18.5
22.0
11.5
15.0
21.0
14.5
t
t
Propagation Delay Time
2.7
7.7
10.2
6.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
7.5
5.0
6.0
4.0
1.0
1.0
C
C
C
C
C
C
C
C
C
C
C
C
C
C
PLH
PHL
L
L
L
L
L
L
L
L
L
L
L
L
L
L
D
to O
50 pF
n
n
ns
3.3 0.3
2.7
15 pF
8.5
13.2
14.5
18.0
9.3
50 pF
t
t
Propagation Delay Time
LE to O
7.5
10.0
5.8
15 pF
PLH
PHL
50 pF
n
ns
ns
3.3 0.3
2.7
15 pF
8.3
12.8
15.0
18.5
9.7
50 pF
t
t
3-STATE Output
Enable Time
7.7
15 pF, R
50 pF, R
15 pF, R
50 pF, R
50 pF, R
50 pF, R
1 k
1 k
1 k
1 k
1 k
1 k
PZL
PZH
L
L
L
L
L
L
10.2
6.0
3.3 0.3
8.5
13.2
18.0
12.8
t
t
t
3-STATE Output
Disable Time
2.7
3.3 0.3
2.7
9.8
8.2
PLZ
PHZ
W
ns
ns
ns
ns
ns
LE Pulse Width, HIGH
6.5
5.0
6.0
4.0
1.0
1.0
3.3 0.3
2.7
t
t
Setup Time, D to LE
n
S
H
3.3 0.3
2.7
Hold Time, D to LE
n
3.3 0.3
2.7
t
t
Output to Output Skew
(Note 4)
1.5
1.5
1.5
1.5
C
50 pF
OSLH
OSHL
L
3.3
Note 4: Parameter guaranteed by design. t
|t
t
|, t
|t
t
|
PHLn
OSLH
PLHm
PLHn OSHL
PHLm
Capacitance
T
25 C
Typ
T
40 C to 85 C
A
A
Symbol
Parameter
Units
Min
Max
Min
Max
C
Input Capacitance
Output Capacitance
Power Dissipation
Capacitance (Note 5)
4
6
10
10
pF
pF
pF
IN
C
OUT
PD
C
27
Note 5: C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
PD
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4
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
5
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
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6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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7
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ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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