74VCX162373MTDX [ONSEMI]
带3.6V容差输入和输出且输出端带26 Ohm串联电阻的低电压16位透明锁存器;型号: | 74VCX162373MTDX |
厂家: | ONSEMI |
描述: | 带3.6V容差输入和输出且输出端带26 Ohm串联电阻的低电压16位透明锁存器 驱动 光电二极管 逻辑集成电路 锁存器 |
文件: | 总10页 (文件大小:276K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
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January 2000
Revised June 2005
74VCX162373
Low Voltage 16-Bit Transparent Latch
with 3.6V Tolerant Inputs and Outputs
and 26: Series Resistors in Outputs
General Description
The VCX162373 contains sixteen non-inverting latches
with 3-STATE outputs and is intended for bus oriented
Features
■ 1.4V–3.6V VCC supply operation
■ 3.6V tolerant inputs and outputs
applications. The device is byte controlled. The flip-flops
appear to be transparent to the data when the Latch enable
(LE) is HIGH. When LE is LOW, the data that meets the
setup time is latched. Data appears on the bus when the
Output Enable (OE) is LOW. When OE is HIGH, the out-
puts are in a high impedance state.
■ 26 series resistors in outputs
■ tPD (In to On)
3.3 ns max for 3.0V to 3.6V VCC
The VCX162373 is also designed with 26 resistors in the
outputs. This design reduces line noise in applications
such as memory address drivers, clock drivers and bus
transceivers/transmitters.
■ Power-off high impedance inputs and outputs
■ Support live insertion and withdrawal (Note 1)
■ Static Drive (IOH/IOL
)
12 mA @ 3.0V VCC
The 74VCX162373 is designed for low voltage (1.4V to
3.6V) VCC applications with I/O compatibility up to 3.6V.
■ Uses proprietary noise/EMI reduction circuitry
■ Latch-up performance exceeds 300 mA
■ ESD performance:
The 74VCX162373 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Human body model 2000V
Machine model 200V
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to V
through a pull-up resistor; the minimum
CC
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Package
Ordering Number
Number
Package Description
74VCX162373MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
Description
OEn
LEn
Output Enable Input (Active LOW)
Latch Enable Input
Inputs
I0–I15
O0–O15
Outputs
© 2005 Fairchild Semiconductor Corporation
DS500236
www.fairchildsemi.com
Connection Diagram
Truth Tables
Inputs
OE1
Outputs
O0–O7
LE1
I0–I7
X
H
H
L
H
L
L
L
X
L
Z
L
H
X
H
O0
Inputs
OE2
Outputs
O8–O15
LE2
I8–I15
X
H
H
L
H
L
L
L
X
L
Z
L
H
X
H
O0
H
L
HIGH Voltage Level
LOW Voltage Level
X
Z
O
Immaterial (HIGH or LOW, inputs may not float)
High Impedance
Previous O before HIGH-to-LOW of Latch Enable
0
0
Functional Description
The 74VCX162373 contains sixteen edge D-type latches
with 3-STATE outputs. The device is byte controlled with
each byte functioning identically, but independent of the
other. Control pins can be shorted together to obtain full
16-bit operation. The following description applies to each
byte. When the Latch Enable (LEn) input is HIGH, data on
its I input changes. When LEn is LOW, the latches store
information that was present on the I inputs a setup time
preceding the HIGH-to-LOW transition on LEn. The
3-STATE outputs are controlled by the Output Enable
(OEn) input. When OEn is LOW the standard outputs are in
the 2-state mode. When OEn is HIGH, the standard outputs
the In enters the latches. In this condition the latches are
transparent, i.e., a latch output will change state each time
are in the high impedance mode but this does not interfere
with entering new data into the latches.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.fairchildsemi.com
2
Absolute Maximum Ratings(Note 2)
Recommended Operating
Conditions (Note 4)
Supply Voltage (VCC
)
0.5V to 4.6V
0.5V to 4.6V
DC Input Voltage (VI)
Power Supply
Output Voltage (VO)
Operating
1.4V to 3.6V
Outputs 3-STATED
0.5V to 4.6V
0.5V to VCC 0.5V
50 mA
Input Voltage
0.3V to 3.6V
Outputs Active (Note 3)
DC Input Diode Current (IIK) VI 0V
Output Voltage (VO)
Output in Active States
Output in “OFF” State
Output Current in IOH/IOL
VCC 3.0V to 3.6V
0V to VCC
DC Output Diode Current (IOK
VO 0V
)
0.0V to 3.6V
50 mA
50 mA
VO VCC
12 mA
8 mA
DC Output Source/Sink Current
(IOH/IOL
VCC 2.3V to 2.7V
)
50 mA
VCC 1.65V to 2.3V
VCC 1.4V to 1.6V
3 mA
DC VCC or GND Current per
Supply Pin (ICC or GND)
1 mA
100 mA
Free Air Operating Temperature (TA)
Minimum Input Edge Rate ( t/ V)
VIN 0.8V to 2.0V, VCC 3.0V
40 C to 85 C
Storage Temperature Range (TSTG
)
65 C to 150 C
10 ns/V
Note 2: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Rat-
ings. The “Recommended Operating Conditions” table will define the condi-
tions for actual device operation.
Note 3: I Absolute Maximum Rating must be observed.
O
Note 4: Floating or unused inputs must be held HIGH or LOW.
DC Electrical Characteristics
V
CC
Symbol
Parameter
Conditions
Min
Max
Units
(V)
V
V
V
HIGH Level Input Voltage
2.7 - 3.6
2.3 - 2.7
2.0
1.6
IH
V
1.65 - 2.3 0.65 x V
CC
CC
1.4 - 1.6
2.7 - 3.6
2.3 - 2.7
1.65 - 2.3
1.4 - 1.6
2.7 - 3.6
2.7
0.65 x V
LOW Level Input Voltage
HIGH Level Output Voltage
0.8
0.7
IL
V
0.35 x V
0.35 x V
CC
CC
I
I
I
I
I
I
I
I
I
I
I
I
100
A
V
- 0.2
CC
OH
OH
OH
OH
OH
OH
OH
OH
OH
OH
OH
OH
OH
6 mA
8 mA
2.2
3.0
2.4
2.2
12 mA
3.0
100
A
2.3 - 2.7
2.3
V
- 0.2
CC
4 mA
6 mA
8 mA
100
2.0
1.8
1.7
V
2.3
2.3
A
1.65 - 2.3
1.65
V
- 0.2
CC
3 mA
100
1.25
- 0.2
A
1.4 - 1.6
1.4
V
CC
1 mA
1.05
3
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DC Electrical Characteristics (Continued)
V
CC
Symbol
Parameter
Conditions
Min
Max
Units
(V)
2.7 - 3.6
2.7
V
LOW Level Output Voltage
I
I
I
I
I
I
I
I
I
I
I
100
A
0.2
0.4
OL
OL
OL
OL
OL
OL
OL
OL
OL
OL
OL
OL
6 mA
8 mA
3.0
0.55
0.8
12 mA
3.0
100
A
2.3 - 2.7
2.3
0.2
6 mA
8 mA
100
0.4
V
2.3
0.6
A
A
1.65 - 2.3
1.65
0.2
3 mA
100
0.3
1.4 - 1.6
1.4
0.2
1 mA
0.35
5.0
I
Input Leakage Current
0
0
V
V
3.6V
3.6V, V
1.4 - 3.6
1.4 - 3.6
0
A
A
A
A
A
A
I
I
I
3-STATE Output Leakage
Power-OFF Leakage Current
Quiescent Supply Current
V
or V
IL
10.0
10.0
20.0
20.0
750
OZ
O
I
IH
I
0
(V , V )
3.6V
V or GND
CC
OFF
I
O
I
V
V
V
1.4 - 3.6
1.4 - 3.6
2.7 - 3.6
CC
I
(V , V )
O
3.6V (Note 5)
CC
IH
I
I
Increase in I per Input
V
0.6V
CC
CC
CC
Note 5: Outputs disabled or 3-STATE only.
AC Electrical Characteristics (Note 6)
V
T
A
40 C to 85 C
Figure
CC
Symbol
Parameter
Conditions
Units
(V)
Min
0.8
1.0
1.5
1.0
Max
3.6
Number
t
t
Propagation Delay
LE to O
C
30 pF, R
500
3.3 0.3
2.5 0.2
1.8 0.15
1.5 0.1
PHL
L
L
Figures
1, 2
4.9
PLH
n
ns
ns
ns
ns
ns
ns
9.8
C
C
15 pF, R
30 pF, R
2k
19.6
Figures
7, 8
L
L
t
t
Propagation Delay
to O
500
3.3 0.3
2.5 0.2
1.8 0.15
1.5 0.1
0.8
1.0
1.5
1.0
3.3
4.5
PHL
PLH
L
L
Figures
1, 2
I
n
n
9.0
C
C
15 pF, R
30 pF, R
2k
18.0
Figures
7, 8
L
L
t
t
Output Enable Time
Output Disable Time
Setup Time
500
3.3 0.3
2.5 0.2
1.8 0.15
1.5 0.1
0.8
1.0
1.5
1.0
3.9
5.4
PZL
PZH
L
L
Figures
1, 3, 4
9.8
C
C
15 pF, R
30 pF, R
2k
19.6
Figures
7, 9, 10
L
L
t
t
500
3.3 0.3
2.5 0.2
1.8 0.15
1.5 0.1
0.8
1.0
1.5
1.0
4.0
4.4
PLZ
PHZ
L
L
Figures
1, 3, 4
7.9
C
C
15 pF, R
30 pF, R
2k
15.8
Figures
7, 9, 10
L
L
t
t
500
3.3 0.3
2.5 0.2
1.8 0.15
1.5 0.1
1.5
1.5
2.5
3.0
S
L
L
Figures
1, 6
C
C
15 pF, R
30 pF, R
2k
Figures
6, 7
L
L
Hold Time
500
3.3 0.3
2.5 0.2
1.8 0.15
1.5 0.1
1.0
1.0
1.0
2.0
H
L
L
Figures
1, 6
C
15 pF, R
2k
Figures
6, 7
L
L
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4
AC Electrical Characteristics (Continued)
V
T
40 C to 85 C
Max
Figure
CC
A
Symbol
Parameter
Pulse Width
Conditions
Units
(V)
Min
Number
t
C
30 pF, R
500
3.3 0.3
2.5 0.2
1.8 0.15
1.5 0.1
1.5
1.5
4.0
4.0
W
L
L
Figures
1, 5
ns
C
C
15 pF, R
30 pF, R
2k
Figures
5, 7
L
L
t
t
Output to Output Skew
(Note 7)
500
3.3 0.3
2.5 0.2
1.8 0.15
1.5 0.1
0.5
0.5
OSHL
OSLH
L
L
ns
0.75
1.5
C
15 pF, R
2k
L
L
Note 6: For C
50 F, add approximately 300 ps to the AC maximum specification.
P
L
Note 7: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
) or LOW-to-HIGH (t
).
OSLH
OSHL
Dynamic Switching Characteristics
V
T
25 C
Typical
CC
A
Symbol
Parameter
Conditions
Units
(V)
1.8
2.5
3.3
1.8
2.5
3.3
1.8
2.5
3.3
V
V
V
Quiet Output Dynamic Peak V
C
C
C
30 pF, V
30 pF, V
30 pF, V
V
V
V
, V
, V
, V
0V
0V
0V
0.15
0.25
0.35
0.15
0.25
0.35
1.55
2.05
2.65
OLP
OL
L
L
L
IH
IH
IH
CC
CC
CC
IL
IL
IL
V
Quiet Output Dynamic Valley V
Quiet Output Dynamic Valley V
OLV
OL
V
V
OHV
OH
Capacitance
T
25 C
A
Symbol
Parameter
Conditions
Units
Typical
C
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
V
V
1.8V, 2.5V or 3.3V, V 0V or V
CC
6
7
pF
pF
pF
IN
CC
I
C
C
0V or V , V
CC
1.8V, 2.5V or 3.3V
OUT
PD
I
CC
V
0V or V , f 10 MHz,
CC
20
I
V
1.8V, 2.5V or 3.3V
CC
5
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AC Loading and Waveforms (V 3.3V r 0.3V to 1.8V r 0.15V)
CC
TEST
SWITCH
Open
t
PLH, tPHL
tPZL, tPLZ
6V at VCC 3.3 0.3V;
VCC x 2 at VCC 2.5 0.2V; 1.8V 0.15V
GND
t
PZH, tPHZ
FIGURE 1. AC Test Circuit
FIGURE 2. Waveform for Inverting and
Non-Inverting Functions
FIGURE 3. 3-STATE Output HIGH Enable and
Disable Times for Low Voltage Logic
FIGURE 4. 3-STATE Output LOW Enable and Disable Times for Low Voltage Logic
FIGURE 6. Setup Time, Hold Time and
Recovery Time for Low Voltage Logic
FIGURE 5. Propagation Delay, Pulse Width and
tREC Waveforms
VCC
Symbol
3.3V 0.3V
1.5V
2.5V 0.2V
VCC/2
1.8V 0.15V
VCC/2
Vmi
Vmo
VX
1.5V
VCC/2
VCC/2
VOL 0.3V
VOH 0.3V
VOL 0.15V
VOH 0.15V
VOL 0.15V
VOH 0.15V
VY
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6
AC Loading and Waveforms (V 1.5V r 0.1V)
CC
TEST
SWITCH
t
PLH, tPHL
Open
VCC x 2 at VCC 1.5V 0.1V
GND
tPZL, tPLZ
tPZH, tPHZ
FIGURE 7. AC Test Circuit
FIGURE 8. Waveform for Inverting and
Non-Inverting Functions
FIGURE 9. 3-STATE Output HIGH Enable and
Disable Times for Low Voltage Logic
FIGURE 10. 3-STATE Output LOW Enable and Disable Times for Low Voltage Logic
VCC
Symbol
1.5V 0.1V
Vmi
Vmo
VX
VCC/2
VCC/2
VOL 0.1V
VOH 0.1V
VY
7
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Physical Dimensions inches (millimeters) unless otherwise noted
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD48
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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www.fairchildsemi.com
8
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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