74VHC221ASJ [ONSEMI]

Monostable Multivibrator;
74VHC221ASJ
型号: 74VHC221ASJ
厂家: ONSEMI    ONSEMI
描述:

Monostable Multivibrator

时钟 光电二极管 逻辑集成电路
文件: 总14页 (文件大小:584K)
中文:  中文翻译
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May 2007  
74VHC221A  
tm  
Dual Non-Retriggerable Monostable Multivibrator  
Features  
General Description  
High Speed: t = 8.1ns (Typ.) at V = 5V  
The VHC221A is an advanced high speed CMOS  
Monostable Multivibrator fabricated with silicon gate  
CMOS technology. It achieves the high speed operation  
similar to equivalent Bipolar Schottky TTL while main-  
taining the CMOS low power dissipation. Each multi-  
vibrator features both a negative, A, and a positive, B,  
transition triggered input, either of which can be used as  
an inhibit input. Also included is a clear input that when  
taken LOW resets the one-shot. The VHC221A can be  
triggered on the positive transition of the clear while A is  
held LOW and B is held HIGH. The VHC221A is non-  
retriggerable, and therefore cannot be retriggered until  
the output pulse times out. The output pulse width is  
determined by the equation:  
PD  
CC  
Low Power Dissipation: I = 4µA (Max.) at T = 25°C  
CC  
A
Active State: I = 600µA (Max.) at T = 25°C  
CC  
A
High Noise Immunity: V  
= V  
= 28% V (Min.)  
NIH  
NIL CC  
Power down protection is provided on all inputs  
Pin and function compatible with 74HC221A  
PW = (Rx)(Cx)  
where,  
PW is in seconds, R is in ohms, and C is in farads.  
Limits for R and C are:  
x
x
External capacitor, C : No limit  
x
External resistors, R : V = 2.0V, 5kMin.  
x
CC  
CC  
V
> 3.0V, 1 kMin  
An input protection circuit ensures that 0 to 7V can be  
applied to the input pins without regard to the supply  
voltage. This device can be used to interface 5V to 3V  
systems and two supply systems such as battery back  
up. This circuit prevents device destruction due to mis-  
matched supply and input voltages.  
Ordering Information  
Package  
Order Number  
74VHC221AM  
Number  
Package Description  
M16A  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74VHC221ASJ  
74VHC221AMTC  
M16D  
MTC16  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the  
ordering code.  
©1994 Fairchild Semiconductor Corporation  
74VHC221A Rev. 1.2  
www.fairchildsemi.com  
Connection Diagram  
Block Diagrams  
Logic Symbol  
IEEE/IEC  
Note A: Cx, Rx, Dx are external Capacitor, Resistor, and  
Diode, respectively.  
Note B: External clamping diode, Dx;  
External capacitor is charged to V  
state, i.e. when no trigger is applied.  
level in the wait  
CC  
Truth Table  
If the supply voltage is turned off, Cx discharges mainly  
through the internal (parasitic) diode. If Cx is sufficiently  
Inputs  
Outputs  
large and V drops rapidly, there will be some possibil-  
CC  
A
B
H
L
CLR  
H
Q
Q
Function  
Output Enable  
Inhibit  
ity of damaging the IC through in rush current or latch-  
up. If the capacitance of the supply voltage filter is large  
enough and V  
drops slowly, the in rush current is  
CC  
X
H
L
H
L
L
H
H
automatically limited and damage to the IC is avoided.  
X
H
Inhibit  
The maximum value of forward current through the para-  
sitic diode is 20 mA. In the case of a large Cx, the limit  
of fall time of the supply voltage is determined as follows:  
H
Output Enable  
Output Enable  
Reset  
L
H
X
t (V – 0.7) Cx / 20mA  
X
L
L
H
f
CC  
(t is the time between the supply voltage turn off and the  
H = HIGH Voltage Level  
L = LOW Voltage Level  
f
supply voltage reaching 0.4 V  
)
CC  
In the event a system does not satisfy the above condi-  
tion, an external clamping diode (Dx) is needed to  
protect the IC from rush current.  
= HIGH-to-LOW Transition  
= LOW-to-HIGH Transition  
X = Don’t Care  
©1994 Fairchild Semiconductor Corporation  
74VHC221A Rev. 1.2  
www.fairchildsemi.com  
2
System Diagram  
Timing Chart  
©1994 Fairchild Semiconductor Corporation  
74VHC221A Rev. 1.2  
www.fairchildsemi.com  
3
Functional Description  
1. Stand-by State  
Upon triggering, output Q becomes HIGH, following  
some delay time of the internal F/F and gates. It stays  
HIGH even if the voltage of Rx/Cx changes from fall-  
ing to rising. When Rx/Cx reaches the internal refer-  
The external capacitor (Cx) is fully charged to V in  
the Stand-by State. That means, before triggering,  
CC  
the Q and Q transistors which are connected to the  
P
N
ence voltage V H, the output of C2 becomes LOW,  
ref  
Rx/Cx node are in the off state. Two comparators that  
relate to the timing of the output pulse, and two refer-  
ence voltage supplies turn off. The total supply cur-  
rent is only leakage current.  
the output Q goes LOW and C2 stops its operation.  
That means, after triggering, when the voltage level  
of the Rx/Cx node reaches V H, the IC returns to its  
ref  
MONOSTABLE state.  
2. Trigger Operation  
With large values of Cx and Rx, and ignoring the dis-  
charge time of the capacitor and internal delays of  
Trigger operation is effective in any of the following  
three cases. First, the condition where the A input is  
LOW, and B input has a rising signal; second, where  
the B input is HIGH, and the A input has a falling sig-  
nal; and third, where the A input is LOW and the B  
input is HIGH, and the CLR input has a rising signal.  
the IC, the width of the output pulse, t (OUT), is as  
W
follows:  
t
(OUT) = 1.0 Cx Rx  
W
3. Reset Operation  
After a trigger becomes effective, comparators C1  
In normal operation, the CLR input is held HIGH. If  
CLR is LOW, a trigger has no affect because the Q  
output is held LOW and the trigger control F/F is  
and C2 start operating, and Q is turned on. The  
N
external capacitor discharges through Q . The volt-  
N
age level at the Rx/Cx node drops. If the Rx/Cx volt-  
reset. Also, Q turns on and Cx is charged rapidly to  
p
age level falls to the internal reference voltage V L,  
V
.
ref  
CC  
the output of C1 becomes LOW. The flip-flop is then  
This means if CLR is set LOW, the IC goes into a wait  
state.  
reset and Q turns off. At that moment C1 stops but  
N
C2 continues operating.  
After Q turns off, the voltage at the Rx/Cx node  
N
starts rising at a rate determined by the time constant  
of external capacitor Cx and resistor Rx.  
©1994 Fairchild Semiconductor Corporation  
74VHC221A Rev. 1.2  
www.fairchildsemi.com  
4
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be  
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.  
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.  
The absolute maximum ratings are stress ratings only.  
Symbol  
Parameter  
Rating  
V
Supply Voltage  
–0.5V to +7.0V  
–0.5V to +7.0V  
CC  
V
DC Input Voltage  
DC Output Voltage  
Input Diode Current  
Output Diode Current  
DC Output Current  
IN  
V
–0.5V to V + 0.5V  
OUT  
CC  
I
–20mA  
20mA  
IK  
I
OK  
I
25mA  
OUT  
I
DC V / GND Current  
50mA  
CC  
CC  
T
Storage Temperature  
–65°C to +150°C  
260°C  
STG  
T
Lead Temperature (Soldering, 10 seconds)  
L
(1)  
Recommended Operating Conditions  
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended  
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not  
recommend exceeding them or designing to absolute maximum ratings.  
Symbol  
Parameter  
Rating  
V
Supply Voltage  
2.0V to +5.5V  
0V to +5.5V  
0V to V  
CC  
V
Input Voltage  
IN  
V
Output Voltage  
OUT  
CC  
T
Operating Temperature  
–40°C to +85°C  
OPR  
t , t  
Input Rise and Fall Time (CLR only)  
r
f
V
V
= 3.3V 0.3V  
= 5.0V 0.5V  
0ns/V 100ns/V  
CC  
CC  
0ns/V 20ns/V  
(2)  
External Capacitor, Cx  
External Resistor, Rx  
No Limitation  
F
(2)  
>5k(V = 2.0V)  
CC  
(2)  
>1kΩ  
(V > 3.0V)  
CC  
Notes:  
1. Unused inputs must be held HIGH or LOW. They may not float.  
2. The maximum allowable values of Cx and Rx are a function of the leakage of capacitor Cx, the leakage of the device,  
and leakage due to board layout and surface resistance.  
Susceptibility to externally induced noise signals may occur for Rx > 1 M.  
©1994 Fairchild Semiconductor Corporation  
74VHC221A Rev. 1.2  
www.fairchildsemi.com  
5
DC Electrical Characteristics  
T = 25°C  
T = –40° to 85°C  
A
A
Symbol  
Parameter  
V
(V)  
Conditions  
Min.  
Typ.  
Max.  
Min.  
Max.  
Units  
CC  
2.0  
V
HIGH Level Input  
Voltage  
1.50  
1.50  
V
IH  
3.0–5.5  
2.0  
0.7 x V  
0.7 x V  
CC  
CC  
V
LOW Level Input  
Voltage  
0.50  
0.50  
V
V
IL  
3.0–5.5  
2.0  
0.3 x V  
0.3 x V  
CC  
CC  
V
HIGH Level  
Output Voltage  
V
or V  
= V  
I
= –50µA  
1.9  
2.9  
2.0  
3.0  
4.5  
1.9  
2.9  
OH  
IN  
IH  
OH  
IL  
3.0  
4.5  
4.4  
4.4  
3.0  
I
I
I
= –4mA  
= –8mA  
= 50µA  
2.58  
3.94  
2.48  
3.80  
OH  
OH  
OL  
4.5  
V
LOW Level  
Output Voltage  
2.0  
V
or V  
= V  
IH  
0.0  
0.0  
0.0  
0.1  
0.1  
0.1  
0.1  
V
OL  
IN  
IL  
3.0  
4.5  
0.1  
0.1  
3.0  
I
I
= 4mA  
= 8mA  
0.36  
0.36  
0.1  
0.44  
0.44  
1.0  
OL  
OL  
4.5  
I
I
Input Leakage  
Current  
0–5.5  
V
V
V
V
= 5.5V or GND  
µA  
µA  
µA  
µA  
IN  
IN  
IN  
IN  
IN  
IN  
Rx/Cx Terminal  
Off-State Current  
5.5  
5.5  
= V or GND  
0.25  
4.0  
2.50  
40.0  
CC  
I
I
Quiescent Supply  
Current  
= V or GND  
CC  
CC  
CC  
(3)  
Active—State  
3.0  
4.5  
5.5  
= V or GND,  
Rx/Cx = 0.5 V  
160  
380  
560  
250  
500  
750  
280  
650  
975  
CC  
Supply Current  
CC  
Note:  
3. Per circuit.  
©1994 Fairchild Semiconductor Corporation  
74VHC221A Rev. 1.2  
www.fairchildsemi.com  
6
(4)  
AC Electrical Characteristics  
TA = –40°C  
TA = 25°C  
to +85°C  
Symbol  
Parameter  
VCC (V)  
Conditions  
Min. Typ. Max. Min. Max. Units  
t
t
t
, t  
Propagation Delay Time 3.3 0.3 C = 15pF  
13.4  
15.9  
8.1  
20.6  
24.1  
12.0  
14.0  
22.4  
25.9  
12.9  
14.9  
15.8  
19.3  
9.4  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
24.0  
27.5  
14.0  
16.0  
26.0  
29.5  
15.0  
17.0  
18.5  
22.0  
11.0  
13.0  
ns  
ns  
ns  
ns  
ns  
ns  
PLH PHL  
L
(A, B–Q, Q)  
C = 50pF  
L
5.0 0.5 C = 15pF  
L
C = 50pF  
9.6  
L
, t  
Propagation Delay Time 3.3 0.3 C = 15pF  
14.5  
17.0  
8.7  
PLH PHL  
L
(CLR Trigger—Q, Q)  
C = 50pF  
L
5.0 0.5 C = 15pF  
L
C = 50pF  
10.2  
10.3  
12.8  
6.3  
L
, t  
Propagation Delay Time 3.3 0.3 C = 15pF  
PLH PHL  
L
(CLR—Q, Q)  
C = 50pF  
L
5.0 0.5 C = 15pF  
L
C = 50pF  
7.8  
11.4  
L
t
Output Pulse Width  
2.0  
C
R
= 28pF, C = 50pF,  
= 6kΩ  
415  
345  
312  
160  
133  
100  
100  
WOUT  
X
X
L
3.3 0.3  
5.0 0.5  
ns  
ns  
µs  
3.3 0.3 C = 50pF, Cx = 28pF,  
240  
200  
110  
110  
300  
240  
110  
110  
L
Rx = 2kΩ  
5.0 0.5  
3.3 0.3 C = 50pF,  
90  
90  
90  
90  
L
Cx = 0.01µF,  
Rx = 10kΩ  
5.0 0.5  
3.3 0.3 C = 50pF, Cx = 0.1µF,  
0.9  
0.9  
1.0  
1.0  
1
1.1  
1.1  
0.9  
0.9  
1.1  
1.1  
ms  
%
L
Rx = 10kΩ  
5.0 0.5  
t  
Output Pulse Width Error  
Between Circuits  
wOUT  
(In same Package)  
C
Input Capacitance  
V
= Open  
4
10  
10  
pF  
pF  
IN  
CC  
(5)  
C
Power Dissipation  
Capacitance  
73  
PD  
Notes:  
4. Refer to 74VHC221A Timing Chart.  
5. C is defined as the value of the internal equivalent capacitance which is calculated from the operating current  
PD  
consumption without load. Average operating current can be obtained by the equation:  
1
I
(opr.) = C • V • f  
I
• Duty / 100 + I / 2 (per Circuit)  
CC  
CC  
PD  
CC IN + CC  
CC  
1
I
: Active Supply Current  
Duty: %  
AC Operating Requirement  
T = 25°C  
T = –40°C to +85°C  
A
A
Symbol  
Parameter  
V
(V) Min.  
Typ. Max.  
Min.  
5.0  
Max.  
Units  
CC  
t (L)  
Minimum Trigger  
3.3  
5.0  
5.0  
5.0  
5.0  
5.0  
ns  
W
t (H)  
Pulse Width  
5.0  
W
t (L)  
Minimum Clear Pulse Width  
3.3  
5.0  
5.0  
ns  
W
5.0  
©1994 Fairchild Semiconductor Corporation  
74VHC221A Rev. 1.2  
www.fairchildsemi.com  
7
Device Characteristics  
t
*C Characteristics (Typ.)  
x
wout  
Output Pulse Width Constant K-Supply Voltage (Typical)  
Input Equivalent Circuit  
©1994 Fairchild Semiconductor Corporation  
74VHC221A Rev. 1.2  
www.fairchildsemi.com  
8
Physical Dimensions  
Dimensions are in millimeters unless otherwise noted.  
Figure 1. 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
Package Number M16A  
©1994 Fairchild Semiconductor Corporation  
74VHC221A Rev. 1.2  
www.fairchildsemi.com  
9
Physical Dimensions (Continued)  
Dimensions are in millimeters unless otherwise noted.  
Figure 2. 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
Package Number M16D  
©1994 Fairchild Semiconductor Corporation  
74VHC221A Rev. 1.2  
www.fairchildsemi.com  
10  
Physical Dimensions (Continued)  
Dimensions are in millimeters unless otherwise noted.  
5.00 0.10  
4.55  
5.90  
4.45 7.35  
0.65  
4.4 0.1  
1.45  
5.00  
0.11  
12°  
MTC16rev4  
Figure 3. 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Package Number MTC16  
©1994 Fairchild Semiconductor Corporation  
74VHC221A Rev. 1.2  
www.fairchildsemi.com  
11  
TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an  
exhaustive list of all such trademarks.  
ACEx®  
i-Lo™  
Power-SPM™  
PowerTrench®  
Programmable Active Droop™  
QFET®  
TinyBoost™  
TinyBuck™  
TinyLogic®  
TINYOPTO™  
TinyPower™  
TinyWire™  
TruTranslation™  
µSerDes™  
UHC®  
Across the board. Around the world.™  
ActiveArray™  
Bottomless™  
Build it Now™  
CoolFET™  
CROSSVOLT™  
CTL™  
Current Transfer Logic™  
ImpliedDisconnect™  
IntelliMAX™  
ISOPLANAR™  
MICROCOUPLER™  
MicroPak™  
MICROWIRE™  
Motion-SPM™  
MSX™  
QS™  
QT Optoelectronics™  
Quiet Series™  
RapidConfigure™  
RapidConnect™  
ScalarPump™  
SMART START™  
SPM®  
STEALTH™  
SuperFET™  
SuperSOT-3  
SuperSOT-6  
SuperSOT-8  
SyncFET™  
DOME™  
UniFET™  
VCX™  
Wire™  
MSXPro™  
OCX™  
E2CMOS™  
EcoSPARK®  
EnSigna™  
OCXPro™  
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OPTOPLANAR®  
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The Power Franchise®  
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DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS  
HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE  
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER  
ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S  
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR  
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.  
As used herein:  
1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support,  
which, (a) are intended for surgical implant into the body or  
(b) support or sustain life, and (c) whose failure to perform  
when properly used in accordance with instructions for use  
provided in the labeling, can be reasonably expected to  
result in a significant injury of the user.  
device, or system whose failure to perform can be  
reasonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or In Design  
This datasheet contains the design specifications for product  
development. Specifications may change in any manner without notice.  
Preliminary  
First Production  
Full Production  
Not In Production  
This datasheet contains preliminary data; supplementary data will be  
published at a later date. Fairchild Semiconductor reserves the right to  
make changes at any time without notice to improve design.  
No Identification Needed  
Obsolete  
This datasheet contains final specifications. Fairchild Semiconductor  
reserves the right to make changes at any time without notice to improve  
design.  
This datasheet contains specifications on a product that has been  
discontinued by Fairchild Semiconductor. The datasheet is printed for  
reference information only.  
Rev. I26  
©1994 Fairchild Semiconductor Corporation  
74VHC221A Rev. 1.2  
www.fairchildsemi.com  
12  
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