74VHCT573AMTCX [ONSEMI]
带 3 态输出的八路 D 型锁存;
| 型号： | 74VHCT573AMTCX |
| 厂家： | 
ONSEMI |
| 描述： | 带 3 态输出的八路 D 型锁存 驱动 光电二极管 逻辑集成电路 |
| 文件： | 总11页 (文件大小：379K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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May 2007
74VHCT573A
tm
Octal D-Type Latch with 3-STATE Outputs
Features
General Description
■ High speed: t = 7.7ns (Typ.) at T = 25°C
The VHCT573A is an advanced high speed CMOS octal
latch with 3-STATE output fabricated with silicon gate
CMOS technology. It achieves the high speed operation
similar to equivalent Bipolar Schottky TTL while main-
taining the CMOS low power dissipation. This 8-bit
D-type latch is controlled by a Latch Enable input (LE)
and an Output Enable input (OE). When the OE input is
HIGH, the eight outputs are in a high impedance state.
PD
A
■ High Noise Immunity: V = 2.0V, V = 0.8V
IH
IL
■ Power Down Protection is provided on all inputs and
outputs
■ Low Noise: V
= 1.6V (Max.)
OLP
■ Low Power Dissipation: I = 4µA (Max.) @ T = 25°C
CC
A
■ Pin and function compatible with 74HCT573
Protection circuits ensure that 0V to 7V can be applied to
(1)
the input and output pins without regard to the supply
voltage. This device can be used to interface 3V to 5V
systems and two supply systems such as battery back
up. This circuit prevents device destruction due to mis-
matched supply and input voltages.
Note:
1. Outputs in OFF-State
Ordering Information
Package
Order Number
74VHCT573AM
74VHCT573ASJ
74VHCT573AMTC
Number
Package Description
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
M20D
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number. Pb-Free package per JEDEC J-STD-020B.
Connection Diagram
Pin Description
Pin Names
Description
D –D
Data Inputs
0
7
LE
Latch Enable Input
OE
3-STATE Output Enable Input
3-STATE Outputs
O –O
0
7
©1997 Fairchild Semiconductor Corporation
74VHCT573A Rev. 1.3
www.fairchildsemi.com
Logic Symbol
Functional Description
IEEE/IEC
The VHCT573A contains eight D-type latches with
3-STATE output buffers. When the Latch Enable (LE)
input is HIGH, data on the D inputs enters the latches.
n
In this condition the latches are transparent, i.e., a latch
output will change state each time its D input changes.
When LE is LOW the latches store the information that
was present on the D inputs, a setup time preceding the
HIGH-to-LOW transition of LE. The 3-STATE buffers are
controlled by the Output Enable (OE) input. When OE is
LOW, the buffers are enabled. When OE is HIGH the
buffers are in the high impedance mode, but, this does
not interfere with entering new data into the latches.
Truth Table
Inputs
Outputs
OE
L
LE
H
H
L
D
H
L
O
n
H
L
L
L
X
X
O
0
H
X
Z
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to
estimate propagation delays.
©1997 Fairchild Semiconductor Corporation
74VHCT573A Rev. 1.3
www.fairchildsemi.com
2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Rating
V
Supply Voltage
DC Input Voltage
DC Output Voltage
Note 2
–0.5V to +7.0V
–0.5V to +7.0V
CC
V
IN
V
OUT
–0.5V to V + 0.5V
CC
Note 3
–0.5V to +7.0V
–20mA
I
Input Diode Current
Output Diode Current
DC Output Current
IK
(4)
I
20mA
OK
I
25mA
OUT
I
DC V /GND Current
75mA
CC
CC
T
Storage Temperature
–65°C to +150°C
260°C
STG
T
Lead Temperature (Soldering, 10 seconds)
L
(5)
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
Rating
V
Supply Voltage
Input Voltage
Output Voltage
Note 2
4.5V to +5.5V
0V to +5.5V
CC
V
IN
V
OUT
0V to V
CC
Note 3
0V to 5.5V
–40°C to +85°C
0ns/V ~ 20ns/V
T
Operating Temperature
OPR
t , t
Input Rise and Fall Time, V = 5.0V 0.5V
CC
r
f
Notes:
2. HIGH or LOW state. I
absolute maximum rating must be observed.
OUT
3. When outputs are in OFF-State or when V = 0V.
CC
4. V
< GND, V
> V (Outputs Active).
OUT
OUT CC
5. Unused inputs must be held HIGH or LOW. They may not float.
©1997 Fairchild Semiconductor Corporation
74VHCT573A Rev. 1.3
www.fairchildsemi.com
3
DC Electrical Characteristics
T = –40°C
A
T = 25°C
to +85°C
A
Symbol
Parameter
V
(V)
Conditions
Min. Typ. Max. Min. Max. Units
CC
V
HIGH Level Input
Voltage
4.5
2.0
2.0
2.0
2.0
V
V
V
V
IH
5.5
4.5
5.5
4.5
V
LOW Level Input
Voltage
0.8
0.8
0.8
0.8
IL
V
HIGH Level Output
Voltage
V
or V
= V
I
I
I
I
= –50µA 4.40
4.50
0.0
4.40
3.80
OH
IN
IH
OH
OH
OL
OL
IL
= –8mA
= 50µA
= 8mA
3.94
V
LOW Level Output
Voltage
4.5
5.5
V
= V
0.1
0.1
0.44
2.5
OL
OZ
IN
IH
or V
IL
0.36
0.25
I
3-STATE Output
Off-State Current
V
V
= V or V ,
µA
µA
µA
mA
IN
IH
IL
= V or GND
OUT
CC
I
Input Leakage
Current
0–5.5
5.5
V
V
V
= 5.5V or GND
0.1
4.0
1.0
40.0
1.50
IN
IN
IN
IN
I
Quiescent Supply
Current
= V or GND
CC
CC
I
Maximum I /Input
5.5
= 3.4V, Other
1.35
CCT
CC
Inputs = V or GND
CC
I
Output Leakage
Current (Power
Down State)
0.0
V
= 5.5V
0.5
5.0
µA
OFF
OUT
Noise Characteristics
T = 25°C
A
Symbol
Parameter
V
(V)
Conditions
Typ.
Limits
Units
CC
(6)
V
Quiet Output Maximum
Dynamic V
5.0
C = 50pF
1.2
1.6
V
OLP
L
OL
(6)
(6)
V
Quiet Output Minimum
Dynamic V
5.0
5.0
5.0
C = 50pF
–1.2
–1.6
2.0
V
V
V
OLV
L
OL
V
Minimum HIGH Level
Dynamic Input Voltage
C = 50pF
L
IHD
(6)
V
Maximum LOW Level
Dynamic Input Voltage
C = 50pF
0.8
ILD
L
Note:
6. Parameter guaranteed by design.
©1997 Fairchild Semiconductor Corporation
74VHCT573A Rev. 1.3
www.fairchildsemi.com
4
AC Electrical Characteristics
T = –40°C
A
T = +25°C
to +85°C
A
Symbol
Parameter
V
(V)
Conditions
Min. Typ. Max. Min. Max. Units
CC
t
, t
Propagation Delay
5.0 0.5
C = 15pF
7.7
8.5
5.1
5.9
6.3
7.1
8.8
12.3
13.3
8.5
1.0
1.0
1.0
1.0
1.0
1.0
1.0
13.5
14.5
9.5
ns
ns
ns
PLH PHL
L
Time (LE to O )
n
C = 50pF
L
t
, t
Propagation Delay
5.0 0.5
C = 15pF
L
PLH PHL
Time (D to O )
n
C = 50pF
9.5
10.5
12.5
13.5
12.0
L
t
t
, t
3-STATE Output
Enable Time
5.0 0.5 R = 1kΩ C = 15pF
10.9
11.9
11.2
PZL PZH
L
L
C = 50pF
L
, t
3-STATE Output
Disable Time
5.0 0.5 R = 1kΩ C = 50pF
ns
ns
PLZ PHZ
L
L
(7)
t
, t
Output to Output
Skew
5.0 0.5
1.0
10
1.0
10
OSLH OSHL
C
Input Capacitance
Output Capacitance
V
V
= Open
= 5.0V
4
6
pF
pF
pF
IN
CC
C
OUT
CC
(8)
C
Power Dissipation
Capacitance
25
PD
Notes:
7. Parameter guaranteed by design. t
= |t
– t
|; t
= |t
– t
|
OSLH
PLH max
PLH min OSHL
PHL max
PHL min
8. C is defined as the value of the internal equivalent capacitance which is calculated from the operating
PD
current consumption without load. Average operating current can be obtained by the equation:
I
(Opr.) = C • V • f + I / 8 (per F/F). The total C when n pcs. of the Latch operates can be
CC
PD CC IN CC PD
calculated by the equation: C (total) = 14 + 13n.
PD
AC Operating Requirements
T = +25°C
T = –40°C to +85°C
A
A
Symbol
Parameter
Minimum Pulse Width (LE)
Minimum Set-Up Time
Minimum Hold Time
V
(V)
Min. Typ. Max.
Min.
8.5
Max.
Units
ns
CC
t (H)
5.0 0.5
5.0 0.5
5.0 0.5
6.5
1.5
3.5
W
t
1.5
ns
S
H
t
3.5
ns
©1997 Fairchild Semiconductor Corporation
74VHCT573A Rev. 1.3
www.fairchildsemi.com
5
Physical Dimensions
Dimensions are in millimeters unless otherwise noted.
Figure 1. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
©1997 Fairchild Semiconductor Corporation
74VHCT573A Rev. 1.3
www.fairchildsemi.com
6
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 2. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
©1997 Fairchild Semiconductor Corporation
74VHCT573A Rev. 1.3
www.fairchildsemi.com
7
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 3. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
©1997 Fairchild Semiconductor Corporation
74VHCT573A Rev. 1.3
www.fairchildsemi.com
8
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Preliminary
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
First Production
Full Production
Not In Production
No Identification Needed
Obsolete
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to improve
design.
This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed for
reference information only.
Rev. I27
©1997 Fairchild Semiconductor Corporation
74VHCT573A Rev. 1.3
www.fairchildsemi.com
9
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regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
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