74VHCT574AMTCX [ONSEMI]

低压八路D型触发器(带3态输出);
74VHCT574AMTCX
型号: 74VHCT574AMTCX
厂家: ONSEMI    ONSEMI
描述:

低压八路D型触发器(带3态输出)

驱动 光电二极管 逻辑集成电路 触发器
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July 1997  
Revised April 2005  
74VHCT574A  
Octal D-Type Flip-Flop with 3-STATE Outputs  
General Description  
Features  
The VHCT574A is an advanced high speed CMOS octal  
flip-flop with 3-STATE output fabricated with silicon gate  
CMOS technology. It achieves the high speed operation  
similar to equivalent Bipolar Schottky TTL while maintain-  
ing the CMOS low power dissipation. This 8-bit D-type flip-  
flop is controlled by a clock input (CP) and an Output  
Enable input (OE). When the OE input is HIGH, the eight  
outputs are in a high impedance state.  
High speed: fMAX 140 MHz (typ) at TA 25 C  
Power Down Protection is provided on all inputs and  
outputs.  
Low Noise: VOLP 1.6V (max)  
Low Power Dissipation:  
ICC  
4 A (max) @ TA 25 C  
Pin and Function Compatible with 74HCT574  
Protection circuits ensure that 0V to 7V can be applied to  
the input and output (Note 1) pins without regard to the  
supply voltage. This device can be used to interface 3V to  
5V systems and two supply systems such as battery back  
up. This circuit prevents device destruction due to mis-  
matched supply and input voltages.  
Note 1: Outputs in OFF-State.  
Ordering Code:  
Order Number  
74VHCT574AM  
74VHCT574ASJ  
74VHCT574AMTC  
74VHCT574AN  
Package Number  
M20B  
Package Description  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
M20D  
MTC20  
N20A  
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
© 2005 Fairchild Semiconductor Corporation  
DS500029  
www.fairchildsemi.com  
Pin Descriptions  
Truth Table  
Pin Names  
Description  
Inputs  
Outputs  
D0D7  
CP  
Data Inputs  
Dn  
H
L
CP  
OE  
L
On  
H
L
Clock Pulse Input 3-STATE  
Output Enable Input 3-STATE  
Outputs  
OE  
L
O0O7  
X
X
H
Z
H
L
X
Z
HIGH Voltage Level  
LOW Voltage Level  
Immaterial  
High Impedance  
LOW-to-HIGH Transition  
Functional Description  
The VHCT574A consists of eight edge-triggered flip-flops  
with individual D-type inputs and 3-STATE true outputs.  
The buffered clock and buffered Output Enable are com-  
mon to all flip-flops. The eight flip-flops will store the state  
of their individual D inputs that meet the setup and hold  
time requirements on the LOW-to-HIGH Clock (CP) transi-  
tion. With the Output Enable (OE) LOW, the contents of the  
eight flip-flops are available at the outputs. When the OE is  
HIGH, the outputs go to the high impedance state. Opera-  
tion of the OE input does not affect the state of the flip-  
flops.  
Logic Diagram  
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.  
www.fairchildsemi.com  
2
Absolute Maximum Ratings(Note 2)  
Recommended Operating  
Conditions (Note 6)  
Supply Voltage (VCC  
)
0.5V to 7.0V  
0.5V to 7.0V  
DC Input Voltage (VIN  
)
Supply Voltage (VCC  
)
4.5V to 5.5V  
0V to 5.5V  
DC Output Voltage (VOUT  
(Note 3)  
)
Input Voltage (VIN  
)
0.5V to VCC 0.5V  
0.5V to 7.0V  
20 mA  
Output Voltage (VOUT  
)
(Note 4)  
(Note 3)  
0V to VCC  
0V to 5.5V  
Input Diode Current (IIK  
Output Diode Current (IOK) (Note 5)  
DC Output Current (IOUT  
DC VCC/GND Current (ICC  
)
(Note 4)  
20 mA  
Operating Temperature (TOPR  
)
40 C to 85 C  
)
25 mA  
Input Rise and Fall Time (tr, tf)  
VCC 5.0V 0.5V  
)
75 mA  
0 ns/V 20 ns/V  
Note 2: Absolute Maximum Ratings are values beyond which the device  
may be damaged or have its useful life impaired. The databook specifica-  
tions should be met, without exception, to ensure that the system design is  
reliable over its power supply, temperature, and output/input loading vari-  
ables. Fairchild does not recommend operation outside databook specifica-  
tions.  
Storage Temperature (TSTG  
Lead Temperature (TL)  
(Soldering, 10 seconds)  
)
65 C to 150 C  
260 C  
Note 3: HIGH or LOW state.  
I
absolute maximum rating must be  
OUT  
observed.  
Note 4: When outputs are in OFF-State or when V  
OV.  
CC  
Note 5: V  
GND, V  
V
(Outputs Active).  
OUT  
OUT  
CC  
Note 6: Unused inputs must be held HIGH or LOW. They may not float.  
DC Electrical Characteristics  
V
T
25 C  
Typ  
T
40 C to 85 C  
Min Max  
CC  
A
A
Symbol  
Parameter  
Units  
Conditions  
(V)  
4.5  
5.5  
4.5  
5.5  
Min  
2.0  
2.0  
Max  
V
V
V
V
HIGH Level  
2.0  
20  
IH  
V
V
Input Voltage  
LOW Level  
0.8  
0.8  
0.8  
0.8  
IL  
Input Voltage  
HIGH Level  
4.40  
3.94  
4.50  
0.0  
4.40  
3.80  
V
V
V
V
V
V
V
I
OH  
50  
A
OH  
OL  
IN  
IN  
IH  
4.5  
4.5  
Output Voltage  
LOW Level  
or V  
I
8 mA  
IL OH  
0.1  
0.1  
V
I
50  
A
IH  
OL  
Output Voltage  
3-STATE Output  
Off-State Current  
Input Leakage  
Current  
0.36  
0.44  
or V  
I
8 mA  
IL OL  
I
I
I
I
I
V
V
V
V
or V  
IL  
OZ  
IN  
IH  
5.5  
0.25  
0.1  
2.5  
1.0  
A
A
V or GND  
CC  
OUT  
IN  
05.5  
5.5V or GND  
IN  
Quiescent Supply  
Current  
5.5  
5.5  
0.0  
4.0  
1.35  
0.5  
40.0  
1.50  
5.0  
A
mA  
A
V
V
or GND  
CC  
IN  
IN  
CC  
Maximum I /Input  
CC  
V
3.4V  
CCT  
OFF  
Other Input  
5.5V  
V
or GND  
CC  
Output Leakage Current  
(Power Down State)  
V
OUT  
3
www.fairchildsemi.com  
Noise Characteristics  
T
25 C  
Limits  
V
(V)  
A
CC  
Symbol  
Parameter  
Units  
Conditions  
Typ  
V
Quiet Output Maximum Dynamic V  
5.0  
1.2  
1.6  
1.6  
2.0  
0.8  
V
C
C
C
C
50 pF  
50 pF  
50 pF  
50 pF  
OLP  
OL  
L
L
L
L
(Note 7)  
V
Quiet Output Minimum Dynamic V  
5.0  
5.0  
5.0  
1.2  
V
V
V
OLV  
OL  
(Note 7)  
V
Minimum HIGH Level Dynamic Input Voltage  
Maximum LOW Level Dynamic Input Voltage  
IHD  
(Note 7)  
V
ILD  
(Note 7)  
Note 7: Parameter guaranteed by design.  
AC Electrical Characteristics  
V
T
25 C  
Typ  
T
A
40 C to 85 C  
CC  
A
Symbol  
Parameter  
Units  
ns  
Conditions  
(V)  
Min  
Max  
9.4  
Min  
Max  
10.5  
11.5  
11.5  
12.5  
t
t
t
t
t
t
t
t
f
Propagation Delay  
Time  
4.1  
5.6  
6.5  
7.3  
1.0  
1.0  
1.0  
1.0  
C
C
C
C
C
15 pF  
50 pF  
15 pF  
50 pF  
50 pF  
PLH  
L
L
L
L
L
5.0 0.5  
10.4  
10.2  
11.2  
PHL  
3-STATE Output  
Enable Time  
3-STATE Output  
Disable Time  
Output to  
R
R
1 k  
1 k  
PZL  
L
L
5.0 0.5  
5.0 0.5  
5.0 0.5  
5.0 0.5  
ns  
PZH  
PLZ  
7.0  
11.2  
1.0  
1.0  
12.0  
1.0  
ns  
PHZ  
OSLH  
OSHL  
MAX  
(Note 8)  
ns  
Output Skew  
Maximum Clock  
Frequency  
90  
85  
140  
130  
4
80  
75  
C
C
15 pF  
50 pF  
L
MHz  
pF  
L
C
C
C
Input  
10  
10  
V
V
Open  
5.0V  
IN  
CC  
CC  
Capacitance  
Output  
9
pF  
pF  
OUT  
PD  
Capacitance  
Power Dissipation  
Capacitance  
25  
(Note 9)  
Note 8: Parameter guaranteed by design. t  
|t  
t
|; t  
|t  
t
|
OSLH  
PLH max  
PLH min OSHL  
PHL max  
PHL min  
Note 9: C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average  
PD  
operating current can be obtained by the equation: I (opr.)  
C
* V * f  
I
/8 (per F/F). The total C when n pcs. of the Octal D Flip-Flop operates  
CC  
PD  
CC  
IN  
CC PD  
can be calculated by the equation: C (total) 20 12n.  
PD  
AC Operating Requirements  
T
25 C  
Typ  
T
40 C to 85 C  
Min Max  
V
(V)  
A
A
CC  
Symbol  
Parameter  
Units  
ns  
Min  
Max  
t
t
t
t
(H)  
(L)  
Minimum Pulse Width (CP)  
W
W
S
5.0 0.5  
6.5  
8.5  
Minimum Set-Up Time  
Minimum Hold Time  
5.0 0.5  
5.0 0.5  
2.5  
2.5  
2.5  
2.5  
ns  
H
www.fairchildsemi.com  
4
Physical Dimensions inches (millimeters) unless otherwise noted  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Package Number M20B  
5
www.fairchildsemi.com  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
Package Number M20D  
www.fairchildsemi.com  
6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Package Number MTC20  
7
www.fairchildsemi.com  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Package Number N20A  
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and  
Fairchild reserves the right at any time without notice to change said circuitry and specifications.  
LIFE SUPPORT POLICY  
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD  
SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the  
body, or (b) support or sustain life, and (c) whose failure  
to perform when properly used in accordance with  
instructions for use provided in the labeling, can be rea-  
sonably expected to result in a significant injury to the  
user.  
2. A critical component in any component of a life support  
device or system whose failure to perform can be rea-  
sonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
www.fairchildsemi.com  
www.fairchildsemi.com  
8
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
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coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.  
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arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
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regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification  
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