AM26LS30D [ONSEMI]
IC,LINE DRIVER,2 DRIVER,ALS-TTL,SOP,16PIN,PLASTIC;
| 型号： | AM26LS30D |
| 厂家： | 
ONSEMI |
| 描述： | IC,LINE DRIVER,2 DRIVER,ALS-TTL,SOP,16PIN,PLASTIC 驱动 |
| 文件： | 总14页 (文件大小：200K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Order this document by AM26LS30/D
DUAL DIFFERENTIAL/
QUAD SINGLE–ENDED
LINE DRIVERS
The AM26LS30 is a low power Schottky set of line drivers which can be
configured as two differential drivers which comply with EIA–422–A
standards, or as four single–ended drivers which comply with EIA–423–A
standards. A mode select pin and appropriate choice of power supplies
determine the mode. Each driver can source and sink currents in excess of
50 mA.
SEMICONDUCTOR
TECHNICAL DATA
In the differential mode (EIA–422–A), the drivers can be used up to
10 Mbaud. A disable pin for each driver permits setting the outputs into a
high impedance mode within a ±10 V common mode range.
In the single–ended mode (EIA–423–A), each driver has a slew rate
control pin which permits setting the slew rate of the output signal so as to
comply with EIA–423–A and FCC requirements and to reduce crosstalk.
When operated from symmetrical supplies (±5.0 V), the outputs exhibit zero
imbalance.
PC SUFFIX
PLASTIC PACKAGE
CASE 648
FN SUFFIX
PLASTIC PACKAGE
CASE 775
The AM26LS30 is available in a 16–pin plastic DIP and surface mount
package. Operating temperature range is –40° to +85°C.
D SUFFIX
PLASTIC PACKAGE
CASE 751B
• Operates as Two Differential EIA–422–A Drivers, or Four Single–Ended
EIA–423–A Drivers
(SO–16)
• High Impedance Outputs in Differential Mode
• Short Circuit Current Limit In Both Source and Sink Modes
• ± 10 V Common Mode Range on High Impedance Outputs
• ± 15 V Range on Inputs
PIN CONNECTIONS
V
1
2
3
4
5
6
SR–A
16
15
14
13
12
11
10
9
CC
Input A
Input B/
Output A
Output B
• Low Current PNP Inputs Compatible with TTL, CMOS, and MOS
Outputs
Enable AB
Mode
SR–B
• Individual Output Slew Rate Control in Single–Ended Mode
Gnd
SR–C
• Replacement for the AMD AM25LS30 and National Semiconductor
Input C/
Enable CD
Input D
Output C
DS3691
Output D
SR–D
7
8
V
EE
(Top View)
Representative Block Diagrams
3
9
2
1
20 19
18
In B/En AB
4
5
6
7
8
Out B
SR–B
NC
Single–Ended Mode
EIA–423–A
Differential Mode
EIA–422–A
Mode
NC
17
16
15
14
Enable AB
Gnd
SR–C
Out C
SR–A
In C/En CD
Input A
Out A
10 11 12 13
Out A
Out B
Input A
SR–B
Out B
SR–C
Out C
SR–D
Out D
Input B
Input C
Out C
Out D
Input D
ORDERING INFORMATION
Operating
Enable CD
Temperature Range
Device
Package
AM26LS30PC
MC26LS30D
AM26LS30FN
Plastic DIP
SO–16
V
V
–1
–8
Gnd–5
CC
EE
Mode–4
T = – 40° to +85°C
A
Input D
PLCC–20
Motorola, Inc. 1996
Rev 0
AM26LS30
MAXIMUM OPERATING CONDITIONS (Pin numbers refer to DIP and SO–16
packages only.)
Rating
Symbol
Value
Unit
Power Supply Voltage
V
V
–0.5, +7.0
–7.0, +0.5
Vdc
CC
EE
Input Voltage (All Inputs)
V
–0.5, +20
Vdc
Vdc
in
Applied Output Voltage when in High Impedance Mode
V
za
±15
(V
= 5.0 V, Pin 4 = Logic 0, Pins 3, 6 = Logic 1)
CC
Output Voltage with V , V
= 0 V
V
±15
CC EE
zb
O
Output Current
I
Self limiting
–65, +150
–
Junction Temperature
T
°C
J
Devices should not be operated at these limits. The “Recommended Operating Conditions” table provides
conditions for actual device operation.
RECOMMENDED OPERATING CONDITIONS
Rating
Symbol
Min
Typ
Max
Unit
Power Supply Voltage (Differential Mode)
V
V
+4.75
–0.5
5.0
0
+5.25
+0.3
Vdc
CC
EE
Power Supply Voltage (Single–Ended Mode)
V
V
+4.75
–5.25
+5.0
–5.0
+5.25
–4.75
CC
EE
Input Voltage (All Inputs)
Applied Output Voltage (when in High Impedance Mode)
Applied Output Voltage, V
V
0
–10
–10
–
–
–
+15
+10
+10
Vdc
in
V
za
V
zb
= 0
CC
Output Current
I
–65
–40
–
–
+65
+85
mA
O
Operating Ambient Temperature (See text)
All limits are not necessarily functional concurrently.
T
°C
A
ELECTRICAL CHARACTERISTICS (EIA–422–A differential mode, Pin 4 0.8 V, –40°C
= Gnd, unless otherwise noted. Pin numbers refer to DIP and SO–16 packages only.)
T
A
85°C, 4.75 V
V
5.25 V,
CC
V
EE
Characteristic
Symbol
Min
Typ
Max
Unit
Output Voltage (see Figure 1)
Differential, R = ∞, V = 5.25 V
V
V
∆V
V
OD1
OD2
OD2
OS
OS
–
2.0
–
–
–
4.2
2.6
10
2.5
10
6.0
–
400
3.0
400
Vdc
Vdc
mVdc
Vdc
L
CC
Differential, R = 100 Ω, V
Change in Differential Voltage, R = 100 Ω (Note 4)
= 4.75 V
L
CC
L
Offset Voltage, R = 100 Ω
L
∆V
Change in Offset Voltage*, R = 100 Ω
mVdc
L
Output Current (each output)
I
–100
–100
0
0
+100
+100
µA
Power Off Leakage, V
= 0, –10 V
V
+10 V
OLK
OZ
CC
High Impedance Mode, V
O
I
= 5.25 V, –10 V
V
+10 V
CC
Short Circuit Current (Note 2)
High Output Shorted to Pin 5 (T = 25°C)
High Output Shorted to Pin 5 (–40°C
Low Output Shorted to +6.0 V (T = 25°C)
O
I
I
I
–150
–150
60
–95
–
75
–
–60
–50
150
150
mA
SC–
SC–
SC+
SC+
A
T
+85°C)
A
A
I
50
Low Output Shorted to +6.0 V (–40°C
T
A
+85°C)
Inputs
V
–
2.0
–
–
–200
–
–
–
0
0
–8.0
0
0.8
–
40
100
–
Vdc
Vdc
µA
Low Level Voltage
High Level Voltage
IL
V
IH
I
IH
Current @ V = 2.4 V
in
I
Current @ V = 15 V
in
IHH
I
Current @ V = 0.4 V
in
IL
IX
I
–
–
Current, 0
V
15 V, V
= 0
CC
in
Clamp Voltage (I = –12 mA)
V
–1.5
–
Vdc
mA
IK
in
Power Supply Current (V
= +5.25 V, Outputs Open)
I
CC
CC
(0
Enable
V
)
–
16
30
CC
NOTES: 1. All voltages measured with respect to Pin 5.
2. Only one output shorted at a time, for not more than 1 second.
3. Typical values established at +25°C, V
= +5.0 V, V
= –5.0 V.
CC
EE
4. V switched from 0.8 to 2.0 V.
in
5. Imbalance is the difference between
V
with V
in
0.8 V and
V
with V
in
2.0 V.
O2
O2
2
MOTOROLA ANALOG IC DEVICE DATA
AM26LS30
TIMING CHARACTERISTICS (EIA–422–A differential mode, Pin 4 0.8 V, T = 25°C, V
unless otherwise noted.)
= 5.0 V, V
= Gnd, (Notes 1 and 3)
EE
A
CC
Characteristic
Differential Output Rise Time (Figure 3)
Symbol
Min
–
Typ
70
Max
200
200
Unit
ns
t
r
Differential Output Fall Time (Figure 3)
t
f
–
70
ns
Propagation Delay Time – Input to Differential Output
Input Low to High (Figure 3)
Input High to Low (Figure 3)
ns
t
–
–
90
90
200
200
PDH
t
PDL
Skew Timing (Figure 3)
ns
ns
t
t
t
–
–
–
9.0
2.0
2.0
–
–
–
t
to t
for Each Driver
SK1
SK2
SK3
PDH
PDL
Max to Min t
Max to Min t
Within a Package
Within a Package
PDH
PDL
Enable Timing (Figure 4)
Enable to Active High Differential Output
Enable to Active Low Differential Output
Enable to 3–State Output From Active High
Enable to 3–State Output From Active Low
t
t
–
–
–
–
150
190
80
300
350
350
300
PZH
PZL
PHZ
t
t
110
PLZ
ELECTRICAL CHARACTERISTICS (EIA–423–A single–ended mode, Pin 4 2.0 V, –40°C
T
A
85°C, 4.75 V
V
CC
,
|V
5.25 V, (Notes 1 and 3) unless otherwise noted).
EE
Characteristic
Symbol
Min
Typ
Max
Unit
Vdc
Output Voltage (V
Single–Ended Voltage, R = ∞ (Figure 2)
Single–Ended Voltage, R = 450 Ω, (Figure 2)
Voltage Imbalance (Note 5), R = 450 Ω
=
V
= 4.75 V)
CC
EE
L
L
4.0
3.6
–
4.2
3.95
0.05
6.0
6.0
0.4
V
O1
V
O2
∆V
L
O2
Slew Control Current (Pins 16, 13, 12, 9)
I
–
±120
–
µA
SLEW
Output Current (Each Output)
Power Off Leakage, V
Short Circuit Current (Output Short to Ground, Note 2)
= V
= 0, –6.0 V
V
+6.0 V
I
OLK
–100
0
+100
µA
CC
EE
O
V
in
V
in
V
in
V
in
0.8 V (T = 25°C)
I
I
I
I
60
50
–150
–150
80
–
–95
–
150
150
–60
–50
mA
A
SC+
SC+
SC–
SC–
0.8 V (–40°C
T
+85°C)
+85°C)
A
2.0 V (T = 25°C)
A
2.0 V (–40°C
T
A
Inputs
Low Level Voltage
High Level Voltage
Current @ V = 2.4 V
V
V
I
–
2.0
–
–
–200
–
–
–
0
0
–8.0
0
0.8
–
40
100
–
Vdc
Vdc
µA
IL
IH
IH
in
Current @ V = 15 V
I
in
Current @ V = 0.4 V
IHH
I
in
IL
IX
Current, 0
V
in
15 V, V
= 0
I
–
–
CC
Clamp Voltage (I = –12 mA)
V
–1.5
–
Vdc
mA
in
Power Supply Current (Outputs Open)
= +5.25 V, V = –5.25 V, V = 0.4 V
IK
I
–
–22
17
–8.0
30
–
CC
V
CC
I
EE
EE
in
TIMING CHARACTERISTICS (EIA–423–A single–ended mode, Pin 4 2.0 V, T = 25°C, V
unless otherwise noted.)
= 5.0 V, V
= –5.0 V, (Notes 1 and 3)
EE
A
CC
Characteristic
Symbol
Min
Typ
Max
Unit
Output Timing (Figure 5)
Output Rise Time, C = 0
t
t
–
–
–
–
65
65
3.0
3.0
300
300
–
ns
C
r
f
Output Fall Time, C = 0
C
Output Rise Time, C = 50 pF
t
t
µs
C
r
Output Fall Time, C = 50 pF
C
–
f
Rise Time Coefficient (Figure 16)
C
–
0.06
–
µs/pF
rt
Propagation Delay Time, Input to Single Ended Output (Figure 5)
ns
Input Low to High, C = 0
t
t
–
–
100
100
300
300
C
PDH
PDL
Input High to Low, C = 0
C
Skew Timing, C = 0 (Figure 5)
ns
C
t
to t
for Each Driver
t
t
t
–
–
–
15
2.0
5.0
–
–
–
PDH
PDL
SK4
SK5
SK6
Max to Min t
Max to Min t
Within a Package
Within a Package
PDH
PDL
3
MOTOROLA ANALOG IC DEVICE DATA
AM26LS30
Table 1
Inputs
Outputs
Operation
V
CC
V
EE
Mode
A
B
C
D
A
B
C
D
Differential
(EIA–422–A)
+5.0
Gnd
0
0
0
0
0
0
0
1
X
1
0
1
0
0
1
0
0
0
0
0
0
0
0
1
0
1
1
0
1
X
0
1
Z
1
0
1
1
0
Z
0
1
0
1
0
0
1
0
Z
0
1
1
0
1
Z
Single–Ended
(EIA–423–A)
+5.0
–5.0
1
1
1
1
1
0
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
0
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
X
0
X
X
X
X
X
X
Z
Z
Z
Z
X = Don’t Care
Z = High Impedance (Off)
Figure 1. Differential Output Test
Figure 2. Single–Ended Output Test
V
CC
V
CC
R /2
L
V
in
(0.8 or 2.0 V)
V
in
(0.8 or 2.0 V)
V
R
C
OD2
L
L
V
O
V
R /2
L
OS
V
EE
Mode = 1
Mode = 0
Figure 3. Differential Mode Rise/Fall Time and Data Propagation Delay
+3.0 V
1.5 V
V
CC
1.5 V
V
in
V
0 V
in
t
PDH
100
t
500 pF
V
PDL
OD
90%
50%
10%
90%
50%
out 10%
S.G.
V
t
t
f
r
NOTES: 1. S.G. set to: f
1.0 MHz; duty cycle = 50%; t , t ,
–t for each driver.
10 ns.
r
f
2. t
3. t
4. t
=
t
SK1
SK2
SK3
PDH PDL
computed by subtracting the shortest t
computed by subtracting the shortest t
from the longest t
from the longest t
of the 2 drivers within a package.
of the 2 drivers within a package.
PDH
PDL
PDH
PDL
4
MOTOROLA ANALOG IC DEVICE DATA
AM26LS30
Figure 4. Differential Mode Enable Timing
+3.0 V
1.5 V
V
CC
1.5 V
V
in
0 V
0 or 3.0 V
500 pF
R
L
V
SS
t
PHZ
t
450
Ω
En
PZH
0.1 V /R
SS
V
L
in
(V = Hi)
in
V
/R
SS
L
0.5 V /R
SS
L
Output
S.G.
Current
t
PLZ
0.5 V /R
SS
L
V
/R
SS
L
(V = Lo)
in
t
0.1 V /R
SS
PZL
L
NOTES: 1. S.G. set to: f
1.0 MHz; duty cycle = 50%; t , t ,
10 ns.
r
f
2. Above tests conducted by monitoring output current levels.
Figure 5. Single–Ended Mode Rise/Fall Time and Data Propagation Delay
+2.5 V
1.5 V
V
CC
1.5 V
V
in
C
C
0 V
Vin
t
PDH
t
PDL
450
500 pF
V
O
90%
50%
10%
90%
50%
10%
V
EE
S.G.
V
out
t
t
f
r
NOTES: 1. S.G. set to: f
100 kHz; duty cycle = 50%; t , t , 10 ns.
r f
2. t
3. t
4. t
=
t
–t for each driver.
SK4
SK5
SK6
PDH PDL
computed by subtracting the shortest t
computed by subtracting the shortest t
from the longest t
from the longest t
of the 4 drivers within a package.
of the 4 drivers within a package.
PDH
PDL
PDH
PDL
5
MOTOROLA ANALOG IC DEVICE DATA
AM26LS30
Figure 6. Differential Output Voltage
versus Load Current
Figure 7. Internal Bias Current
versus Load Current
5.0
4.0
40
Differential Mode
Mode = 0
Supply Current = Bias Current + Load Current
30
20
10
3.0
2.0
Differential Mode
Mode = 0, V
= 5.0 V
CC
V
= 5.25 V
20
CC
0.8 or
2.0 V
1.0
0
I
O
V
OD
0
10
20
30
40
50
60
0
40
60
80
100
120
I
, OUTPUT CURRENT (mA)
TOTAL LOAD CURRENT (mA)
O
Figure 9. Input Current versus
Input Voltage
(Pin numbers refer to DIP and SO–16 packages only.)
Figure 8. Short Circuit Current
versus Output Voltage
+100
+60
+5.0
V
= 0
CC
0
Normally Low Output
Normally High Output
–5.0
–10
–15
–20
–25
V
= 5.0 V
CC
+20
–20
Pins 2 to 4, 6, 7
–5.0 V
Differential or
Single–Ended Mode
V
0
EE
Differential Mode
Mode = 0, V = 5.0 V
–60
CC
–100
0
1.0
2.0
3.0
4.0
5.0
6.0
–1.0
1.0
3.0
5.0
7.0
9.0
11
13
15
V
, APPLIED OUTPUT VOLTAGE (V)
za
V
, INPUT VOLTAGE (V)
in
Figure 10. Output Voltage versus
Output Source Current
Figure 11. Output Voltage versus
Output Sink Current
4.5
4.0
3.5
–3.25
–3.75
Single–Ended Mode
Mode = 1
Single–Ended Mode
Mode = 1
–4.25
–4.75
V
V
= 5.0 V, V
= 1
= –5.0 V
CC
in
EE
V
V
= 5.0 V, V
= 0
= –5.0 V
CC
in
EE
3.0
0
–10
–20
–30
–40
–50
–60
0
10
20
30
40
50
60
I
, OUTPUT CURRENT (mA)
I
, OUTPUT CURRENT (mA)
OH
OL
6
MOTOROLA ANALOG IC DEVICE DATA
AM26LS30
Figure 12. Internal Positive Bias Current
versus Load Current
Figure 13. Internal Negative Bias Current
versus Load Current
26
22
0
Single Ended Mode
Mode = 1
V
= 5.0 V, V
= –5.0 V
CC
Supply Current = Bias Current + I
EE
–5.0
–10
–15
–20
OH
18
14
10
V
= Lo
V
= Hi
in
in
Single–Ended Mode
Mode = 1
V
= 5.0 V, V
= –5.0 V
CC
Supply Current = Bias Current + I
EE
V
= Lo V = Hi
in
in
OL
240
160
80
0
–80
–160
–240
240
160
80
0
–80
–160
–240
I
I
I
I
OH
OL
TOTAL LOAD CURRENT (mA)
OH
OL
TOTAL LOAD CURRENT (mA)
Figure 14. Short Circuit Current
versus Output Voltage
Figure 15. Short Circuit Current
versus Temperature
110
90
100
60
Normally Low Output
Normally Low Output
20
70
Single or Differential Mode
= 5.0 V, V = –5.0 V or Gnd
V
CC
EE
–20
50
Normally High Output
Single–Ended Mode
Mode = 1
–60
–90
–100
–110
Normally High Output to Ground
V
= 5.0 V, V
= –5.0 V
CC
EE
–100
–6.0
–4.0
–2.0
0
2.0
4.0
6.0
–40
–20
0
20
40
60
85
V
, APPLIED OUTPUT VOLTAGE (V)
T , AMBIENT TEMPERATURE (
°C)
za
A
Figure 16. Rise/Fall Time versus Capacitance
1.0 k
100
10
Single–Ended Mode
Mode = 1
V
= 5.0 V, V
= –5.0 V
CC
EE
1.0
10
100
1.0 k
, CAPACITANCE (pF)
10 k
C
C
7
MOTOROLA ANALOG IC DEVICE DATA
AM26LS30
APPLICATIONS INFORMATION
(Pin numbers refer to DIP and SO–16 packages only.)
Description
Figure 11 will vary directly with V . A “high” output can only
EE
source current, while a “low” output can only sink current
The AM26LS30 is a dual function line driver – it can be
configured as two differential output drivers which comply
with EIA–422–A Standard, or as four single–ended drivers
which comply with EIA–423–A Standard. The mode of
operation is selected with the Mode pin (Pin 4) and
appropriate power supplies (see Table 1). Each of the four
outputs is capable of sourcing and sinking 60 to 70 mA while
providing sufficient voltage to ensure proper data
transmission.
As differential drivers, data rates to 10 Mbaud can be
transmitted over a twisted pair for a distance determined by
the cable characteristics. EIA–422–A Standard provides
guidelines for cable length versus data rate. The advantage
of a differential (balanced) system over a single–ended
system is greater noise immunity, common mode rejection,
and higher data rates.
(except short circuit current – see Figure 14).
The outputs will be in a high impedance mode only if
V
1.1 V. Changing V
to 0 V does not set the outputs
CC
EE
to a high impedance mode. Leakage current over a common
mode range of ±10 V is typically less than 1.0 µA.
The outputs have short circuit current limiting, typically
less than 100 mA over a voltage range of ±6.0 V (see Figure
14). Short circuits should not be allowed to last indefinitely as
the IC may be damaged.
Capacitors connected between Pins 9, 12, 13, and 16 and
their respective outputs will provide slew rate limiting of the
output transition. Figure 16 indicates the required capacitor
value to obtain a desired rise or fall time (measured between
the 10% and 90% points). The positive and negative
transition times will be within ≈ ±5% of each other. Each
output may be set to a different slew rate if desired.
Where extraneous noise sources are not a problem, the
AM26LS30 may be configured as four single–ended drivers
transmitting data rates to 100 Kbaud. Crosstalk among wires
within a cable is controlled by the use of the slew rate control
pins on the AM26LS30.
Inputs
The five inputs determine the state of the outputs in
accordance with Table 1. All inputs (regardless of the
operating mode) have a nominal threshold of +1.3 V, and
their voltage must be kept within a range of 0 V to +15 V for
proper operation. If an input is taken more than 0.3 V below
ground, excessive currents will flow, and the proper operation
of the drivers will be affected. An open pin is equivalent to a
logic high, but good design practices dictate that inputs
should never be left open. Unused inputs should be
connected to ground. The characteristics of the inputs are
shown in Figure 9.
Mode Selection
(Differential Mode)
In this mode (Pins 4 and 8 at ground), only a +5.0 V supply
±5% is required at V . Pins 2 and 7 are the driver inputs,
while Pins 10, 11, 14 and 15 are the outputs (see Block
Diagram on page 1). The two outputs of a driver are always
complementary and the differential voltage available at each
pair of outputs is shown in Figure 6 for V
differential output voltage will vary directly with V . A “high”
output can only source current, while a “low” output can only
sink current (except for short circuit current – see Figure 8).
The two outputs will be in a high impedance mode when
the respective Enable input (Pin 3 or 6) is high, or if V
1.1 V. Output leakage current over a common mode range of
± 10 V is typically less than 1.0 µA.
The outputs have short circuit current limiting, typically,
less than 100 mA over a voltage range of 0 to +6.0 V (see
Figure 8). Short circuits should not be allowed to last
indefinitely as the IC may be damaged.
Pins 9, 12, 13 and 16 are not normally used when in this
mode, and should be left open.
CC
= 5.0 V. The
CC
CC
Power Supplies
V
requires +5.0 V, ±5%, regardless of the mode of
CC
operation. The supply current is determined by the IC’s
internal bias requirements and the total load current. The
internally required current is a function of the load current and
is shown in Figure 7 for the differential mode.
CC
In the single–ended mode, V
must be –5.0 V, ±5% in
EE
order to comply with EIA–423–A standards. Figures 12 and
13 indicate the internally required bias currents as a function
of total load current (the sum of the four output loads). The
discontinuity at 0 load current exists due to a change in bias
current when the inputs are switched. The supply currents
vary ≈ ± 2.0 mA as V
5.25 V .
and V
are varied from
4.75 V to
EE
CC
(Single–Ended Mode)
Sequencing of the supplies during power–up/power–down
is not required.
In this mode (Pin 4 ≥ 2.0 V) V
requires +5.0 V, and V
EE
CC
requires –5.0 V, both ±5.0%. Pins 2, 3, 6, and 7 are inputs for
the four drivers, and Pins 15, 14, 11, and 10 (respectively) are
the outputs. The four drivers are independent of each other,
and each output will be at a positive or a negative voltage
depending on its input state, the load current, and the supply
voltage. Figures 10 & 11 indicate the high and low output
Bypass capacitors (0.1 µF minimum on each supply pin)
are recommended to ensure proper operation. Capacitors
reduce noise induced onto the supply lines by the switching
action of the drivers, particularly where long P.C. board tracks
are involved. Additionally, the capacitors help absorb
transients induced onto the drivers’ outputs from the external
cable (from ESD, motor noise, nearby computers, etc.).
voltages for V
= 5.0 V, and V
= –5.0 V. The graph of
CC
EE
Figure 10 will vary directly with V , and the graph of
CC
8
MOTOROLA ANALOG IC DEVICE DATA
AM26LS30
Operating Temperature Range
The maximum ambient operating temperature, listed as
+85°C, is actually a function of the system use (i.e.,
specifically how many drivers within a package are used) and
at what current levels they are operating. The maximum
power which may be dissipated within the package is
determined by:
The junction temperature calculates to:
T
= 85°C + (0.454 W
= DIP package,
= 85°C + (0.454 W
= SOIC package.
67°C/W) = 115°C for the
J
T
T
T
J
J
120°C/W) = 139°C for the
J
Since the maximum allowable junction temperature is not
exceeded in any of the above cases, either package can be
used in this application.
T
T
Jmax
R
A
P
2) Single–Ended Mode Power Dissipation
For the single–ended mode, the power dissipated within
the package is calculated from:
Dmax
JA
where R
= package thermal resistance which is typically:
θJA
P
[(I
= (I
V
) + (I
)]
V
) +
EE
67°C/W for the DIP (PC) package,
120°C/W for the SOIC (D) package,
D
O
B+
(V
CC
– V
B–
CC
OH (each driver)
T
= max. allowable junction temperature (150°C)
Jmax
The above equation assumes I has the same magnitude
O
for both output states, and makes use of the fact that the
absolute value of the graphs of Figures 10 and 11 are nearly
T = ambient air temperature near the IC package.
A
1) Differential Mode Power Dissipation
For the differential mode, the power dissipated within the
package is calculated from:
identical. I + and I – are obtained from the right half of
B
B
Figures 12 and 13, and (V
– V
) can be obtained from
CC
Figure 10. Note that the term (V
given value of I and does not vary with V . For an
OH
– V
) is constant for a
CC
OH
P
= [(V
– V
)
I ]
+ (V
I )
B
D
CC
OD
O (each driver)
CC
O
CC
application involving the following conditions:
where:
where:
where:
where:
V
V
V
= the supply voltage
CC
OD
OD
T
= +85°C, I = –60 mA (each driver), V
= 5.25 V,
= –5.25 V, the suitability of the package types is
A
O
CC
= is taken from Figure 6 for the known
= value of I
V
EE
O
calculated as follows.
I
B
= the internal bias current (Figure 7)
The power dissipated is:
P
= (24 mA
= [60 mA
= 490 mW
5.25 V) + (–3.0 mA
1.45 V 4.0]
–5.25 V) +
D
As indicated in the equation, the first term (in brackets) must
be calculated and summed for each of the two drivers, while
the last term is common to the entire package. Note that the
P
P
D
D
The junction temperature calculates to:
term (V
–V ) is constant for a given value of I and does
CC OD O
T
= 85°C + (0.490 W
= DIP package,
= 85°C + (0.490 W
= SOIC package.
67°C/W) = 118°C for the
J
not vary with V . For an application involving the following
conditions:
CC
T
T
T
J
J
120°C/W) = 144°C for the
T = +85°C, I = –60 mA (each driver), V = 5.25 V, the
A
O
CC
J
suitability of the package types is calculated as follows.
The power dissipated is:
Since the maximum allowable junction temperature is not
exceeded in any of the above cases, either package can be
used in this application.
P
D
P
D
= [3.0 V
= 454 mW
60 mA
2] + (5.25 V
18 mA)
9
MOTOROLA ANALOG IC DEVICE DATA
AM26LS30
SYSTEM EXAMPLES
(Pin numbers refer to DIP and SO–16 packages only.)
Differential System
An example of a typical EIA–422–A system is shown in
Figure 17. Although EIA–422–A does not specifically address
multiple driver situations, the AM26LS30 can be used in this
manner since the outputs can be put into a high impedance
mode. It is, however, the system designer’s responsibility to
ensure the Enable pins are properly controlled so as to
prevent two drivers on the same cable from being “on” at the
same time.
The limit on the number of receivers and drivers which
may be connected on one system is determined by the input
current of each receiver, the maximum leakage current of
each “off” driver, and the DC current through each
terminating resistor. The sum of these currents must not
exceed the capability of the “on” driver (≈60 mA). If the cable
is of any significant length, with receivers at various points
along its length, the common mode voltage may vary along
its length, and this parameter must be considered when
calculating the maximum driver current.
The cable requirements are defined not only by the AC
characteristics and the data rate, but also by the DC
resistance. The maximum resistance must be such that the
minimum voltage across any receiver inputs is never less than
200 mV.
The ground terminals of each driver and receiver in Figure
17 must be connected together by a dedicated wire (or the
shield) in the cable to provide a common reference. Chassis
grounds or power line grounds should not be relied on for this
common connection as they may generate significant
common mode differences. Additionally, they usually do not
provide a sufficiently low impedance at the frequencies
of interest.
minimum voltage across any receiver inputs is never less
than 200 mV.
The ground terminals of each driver and receiver in Figure
18 must be connected together by a dedicated wire (or the
shield) in the cable so as to provide a common reference.
Chassis grounds or power line grounds should not be relied
on for this common connection as they may generate
significant common mode differences. Additionally, they
usually do not provide a sufficiently low impedance at the
frequencies of interest.
Additional Modes of Operation
If compliance with EIA–422–A or EIA–423–A Standard is
not required in a particular application, the AM26LS30 can be
operated in two other modes.
1) The device may be operated in the differential mode
(Pin 4 = 0) with V
connected to any voltage between
ground and –5.25 V. Outputs in the low state will be
EE
referenced to V , resulting in a differential output voltage
EE
greater than that shown in Figure 6. The Enable pins will
operate the same as previously described.
2) The device may be operated in the single–ended mode
(Pin 4 = 1) with V
ground and –5.25 V. Outputs in the high state will be at a
voltage as shown in Figure 10, while outputs in a low state
connected to any voltage between
EE
will be referenced to V
.
EE
Termination Resistors
Transmission line theory states that, in order to preserve
the shape and integrity of a waveform traveling along a cable,
the cable must be terminated in an impedance equal to its
characteristic impedance. In a system such as that depicted
in Figure 17, in which data can travel in both directions, both
physical ends of the cable must be terminated. Stubs leading
to each receiver and driver should be as short as possible.
In a system such as that depicted in Figure 18, in which
data normally travels in one direction only, a terminator is
theoretically required only at the receiving end of the cable.
However, if the cable is in a location where noise spikes of
several volts can be induced onto it, then a terminator
(preferably a series resistor) should be placed at the driver
end to prevent damage to the driver.
Single–Ended System
An example of a typical EIA–423–A system is shown in
Figure 18. Multiple drivers on a single data line are not
possible since the drivers cannot be put into a high
impedance mode. Although each driver is shown connected
to a single receiver, multiple receivers can be driven from a
single driver as long as the total load current of the receivers
and the terminating resistor does not exceed the capability of
the driver (≈60 mA). If the cable is of any significant length,
with receivers at various points along its length, the common
mode voltage may vary along its length, and this parameter
must be considered when calculating the maximum
driver current.
Leaving off the terminations will generally result in
reflections which can have amplitudes of several volts above
V
or several volts below ground or V . These
CC
EE
overshoots/undershoots can disrupt the driver and/or
receiver, create false data, and in some cases, damage
components on the bus.
The cable requirements are defined not only by the AC
characteristics and the data rate, but also by the DC
resistance. The maximum resistance must be such that the
10
MOTOROLA ANALOG IC DEVICE DATA
AM26LS30
Figure 17. EIA–422–A Example
En
R
TTL
R
TTL
TTL
D
En
TTL
D
R
T
En
TTL
D
TTL
R
En
TTL
TTL
D
R
En
D
TTL
TTL
R
T
En
Twisted
Pair
TTL
D
R
NOTES: 1. Terminating resistors R should be located at the physical ends of the cable.
T
2. Stubs should be as short as possible.
3. Receivers = AM26LS32, MC3486, SN75173 or SN75175.
4. Circuit grounds must be connected together through a dedicated wire.
Figure 18. EIA–423–A Example
C
C
+
–
R
R
R
R
TTL
TTL
TTL
D
TTL
R
T
T
T
C
C
C
C
C
C
+
–
D
D
D
TTL
TTL
TTL
R
R
+
–
+
–
TTL
R
T
AM26LS30
AM26LS32, MC3486, SN75173, or SN75175
11
MOTOROLA ANALOG IC DEVICE DATA
AM26LS30
OUTLINE DIMENSIONS
PC SUFFIX
PLASTIC PACKAGE
CASE 648–08
ISSUE R
NOTES:
–A–
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
16
1
9
8
B
S
INCHES
MILLIMETERS
DIM
A
B
C
D
F
MIN
MAX
0.770
0.270
0.175
0.021
0.70
MIN
18.80
6.35
3.69
0.39
1.02
MAX
19.55
6.85
4.44
0.53
1.77
F
0.740
0.250
0.145
0.015
0.040
C
L
SEATING
PLANE
–T–
G
H
J
K
L
0.100 BSC
0.050 BSC
2.54 BSC
1.27 BSC
K
M
0.008
0.015
0.130
0.305
10
0.21
0.38
3.30
7.74
10
H
J
0.110
0.295
0
2.80
7.50
0
G
D 16 PL
M
S
0.020
0.040
0.51
1.01
M
M
0.25 (0.010)
T A
D SUFFIX
PLASTIC PACKAGE
CASE 751B–05
(SO–16)
ISSUE J
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
16
1
9
8
–B–
P 8 PL
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
M
S
0.25 (0.010)
B
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
G
MILLIMETERS
INCHES
DIM
A
B
C
D
MIN
9.80
3.80
1.35
0.35
0.40
MAX
10.00
4.00
1.75
0.49
1.25
MIN
MAX
0.393
0.157
0.068
0.019
0.049
F
0.386
0.150
0.054
0.014
0.016
R X 45
K
C
F
G
J
K
M
P
R
1.27 BSC
0.050 BSC
–T–
SEATING
PLANE
0.19
0.10
0
0.25
0.25
7
0.008
0.004
0
0.009
0.009
7
J
M
D
16 PL
5.80
0.25
6.20
0.50
0.229
0.010
0.244
0.019
M
S
S
0.25 (0.010)
T
B
A
12
MOTOROLA ANALOG IC DEVICE DATA
AM26LS30
OUTLINE DIMENSIONS
FN SUFFIX
PLASTIC PACKAGE
CASE 775–02
ISSUE C
M
S
S
0.007 (0.180)
T
L–M
N
B
Y BRK
–M–
–N–
M
S
S
0.007 (0.180)
T
L–M
N
U
D
D
–L–
Z
W
20
1
S
S
S
0.010 (0.250)
T
L–M
N
G1
X
V
VIEW D–D
M
M
S
S
S
S
A
R
0.007 (0.180)
0.007 (0.180)
T
L–M
L–M
N
N
Z
T
M
S
S
0.007 (0.180)
T
L–M
N
H
C
K1
E
K
0.004 (0.100)
–T– SEATING
G
J
PLANE
M
S
S
0.007 (0.180)
T
L–M
N
F
VIEW S
G1
VIEW S
S
S
S
0.010 (0.250)
T
L–M
N
NOTES:
INCHES
MILLIMETERS
1. DATUMS –L–, –M–, AND –N– DETERMINED
WHERE TOP OF LEAD SHOULDER EXITS PLASTIC
BODY AT MOLD PARTING LINE.
2. DIMENSION G1, TRUE POSITION TO BE
MEASURED AT DATUM –T–, SEATING PLANE.
3. DIMENSIONS R AND U DO NOT INCLUDE MOLD
FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250)
PER SIDE.
DIM
A
B
C
E
F
G
H
J
K
R
U
V
W
X
Y
Z
G1
K1
MIN
MAX
0.395
0.395
0.180
0.110
0.019
MIN
MAX
10.03
10.03
4.57
2.79
0.48
0.385
0.385
0.165
0.090
0.013
9.78
9.78
4.20
2.29
0.33
0.050 BSC
1.27 BSC
4. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
5. CONTROLLING DIMENSION: INCH.
0.026
0.020
0.025
0.350
0.350
0.042
0.042
0.042
–––
0.032
–––
–––
0.356
0.356
0.048
0.048
0.056
0.020
10
0.66
0.51
0.64
8.89
8.89
1.07
1.07
1.07
–––
2
0.81
–––
–––
9.04
9.04
1.21
1.21
1.42
0.50
10
6. THE PACKAGE TOP MAY BE SMALLER THAN THE
PACKAGE BOTTOM BY UP TO 0.012 (0.300).
DIMENSIONS R AND U ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS,
GATE BURRS AND INTERLEAD FLASH, BUT
INCLUDING ANY MISMATCH BETWEEN THE TOP
AND BOTTOM OF THE PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H
DIMENSION TO BE GREATER THAN 0.037 (0.940).
THE DAMBAR INTRUSION(S) SHALL NOT CAUSE
THE H DIMENSION TO BE SMALLER THAN 0.025
(0.635).
2
0.310
0.040
0.330
–––
7.88
1.02
8.38
–––
13
MOTOROLA ANALOG IC DEVICE DATA
AM26LS30
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,including“Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
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arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
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