BCW68GLT1 [ONSEMI]
General Purpose Transistors(PNP Silicon); 通用晶体管( PNP硅)![BCW68GLT1](http://pdffile.icpdf.com/pdf1/p00037/img/icpdf/BCW68_195055_icpdf.jpg)
型号: | BCW68GLT1 |
厂家: | ![]() |
描述: | General Purpose Transistors(PNP Silicon) |
文件: | 总4页 (文件大小:85K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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by BCW68GLT1/D
SEMICONDUCTOR TECHNICAL DATA
PNP Silicon
COLLECTOR
3
1
3
BASE
1
2
2
EMITTER
MAXIMUM RATINGS
CASE 318–08, STYLE 6
SOT–23 (TO–236AB)
Rating
Collector–Emitter Voltage
Symbol
Value
–45
Unit
Vdc
V
CEO
V
CBO
V
EBO
Collector–Base Voltage
Emitter–Base Voltage
–60
Vdc
–5.0
–800
Vdc
Collector Current — Continuous
DEVICE MARKING
I
C
mAdc
BCW68GLT1 = DH
THERMAL CHARACTERISTICS
Characteristic
(1)
Symbol
Max
Unit
Total Device Dissipation FR-5 Board
= 25°C
Derate above 25°C
P
D
225
mW
T
A
1.8
556
300
mW/°C
°C/W
mW
Thermal Resistance, Junction to Ambient
Total Device Dissipation
R
θJA
P
D
(2)
Alumina Substrate,
T = 25°C
A
Derate above 25°C
2.4
417
mW/°C
°C/W
°C
Thermal Resistance, Junction to Ambient
Junction and Storage Temperature
R
θJA
T , T
J stg
–55 to +150
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collector–Emitter Breakdown Voltage (I = –10 mAdc, I = 0)
V
–45
–60
–5.0
—
—
—
—
—
—
Vdc
Vdc
Vdc
C
B
(BR)CEO
Collector–Emitter Breakdown Voltage (I = –10 µAdc, V
EB
= 0)
V
C
(BR)CES
(BR)EBO
Emitter–Base Breakdown Voltage (I = –10 µAdc, I = 0)
V
E
C
Collector Cutoff Current
I
CES
(V = –45 Vdc, I = 0)
—
—
—
—
–20
–10
nAdc
µAdc
CE
CE
E
B
(V = –45 Vdc, I = 0, T = 150°C)
A
Emitter Cutoff Current (V
= –4.0 Vdc, I = 0)
I
—
—
–20
nAdc
EB
1. FR–5 = 1.0 x 0.75 x 0.062 in.
2. Alumina = 0.4 x 0.3 x 0.024 in. 99.5% alumina
C
EBO
Thermal Clad is a trademark of the Bergquist Company
Motorola, Inc. 1996
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (Continued)
A
Characteristic
Symbol
Min
Typ
Max
Unit
ON CHARACTERISTICS
DC Current Gain
h
FE
—
(I = –10 mAdc, V
= –1.0 Vdc)
120
160
60
—
—
—
400
—
—
C
CE
(I = –100 mAdc, V
= –1.0 Vdc)
= –1.0 Vdc)
C
CE
CE
(I = –300 mAdc, V
C
Collector–Emitter Saturation Voltage (I = –300 mAdc, I = –30 mAdc)
V
V
—
—
—
—
–1.5
–2.0
Vdc
Vdc
C
B
CE(sat)
Base–Emitter Saturation Voltage (I = –500 mAdc, I = –50 mAdc)
C
SMALL–SIGNAL CHARACTERISTICS
Current–Gain — Bandwidth Product
B
BE(sat)
f
T
100
—
—
—
—
—
—
18
MHz
pF
(I = –20 mAdc, V
C
= –10 Vdc, f = 100 MHz)
CE
Output Capacitance
C
obo
(V = –10 Vdc, I = 0, f = 1.0 MHz)
CB
E
Input Capacitance
C
—
105
10
pF
ibo
(V = –0.5 Vdc, I = 0, f = 1.0 MHz)
EB
C
Noise Figure
N
—
dB
F
(I = –0.2 mAdc, V
C
= –5.0 Vdc, R = 1.0 kΩ, f = 1.0 kHz,
S
CE
BW = 200 Hz)
2
Motorola Small–Signal Transistors, FETs and Diodes Device Data
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
inches
mm
SOT–23
SOT–23 POWER DISSIPATION
The power dissipation of the SOT–23 is a function of the
SOLDERING PRECAUTIONS
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
by T
, the maximum rated junction temperature of the
, the thermal resistance from the device junction to
J(max)
die, R
θJA
ambient, and the operating temperature, T . Using the
A
values provided on the data sheet for the SOT–23 package,
P
can be calculated as follows:
D
•
•
Always preheat the device.
The delta temperature between the preheat and
soldering should be 100°C or less.*
T
– T
A
J(max)
P
=
D
R
θJA
•
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature T of 25°C, one can
A
calculate the power dissipation of the device which in this
case is 225 milliwatts.
•
•
•
The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
150°C – 25°C
556°C/W
P
=
= 225 milliwatts
D
The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 225 milliwatts. There
are other alternatives to achieving higher power dissipation
from the SOT–23 package. Another alternative would be to
use a ceramic substrate or an aluminum core board such as
Thermal Clad . Using a board material such as Thermal
Clad, an aluminum core board, the power dissipation can be
doubled using the same footprint.
•
Mechanical stress or shock should not be applied during
cooling.
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
Motorola Small–Signal Transistors, FETs and Diodes Device Data
3
PACKAGE DIMENSIONS
NOTES:
A
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
L
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
3
S
B
1
2
INCHES
MIN MAX
MILLIMETERS
DIM
A
B
C
D
G
H
J
MIN
2.80
1.20
0.89
0.37
1.78
0.013
0.085
0.45
0.89
2.10
0.45
MAX
3.04
1.40
1.11
0.50
2.04
0.100
0.177
0.60
1.02
2.50
0.60
V
G
0.1102 0.1197
0.0472 0.0551
0.0350 0.0440
0.0150 0.0200
0.0701 0.0807
0.0005 0.0040
0.0034 0.0070
0.0180 0.0236
0.0350 0.0401
0.0830 0.0984
0.0177 0.0236
C
K
L
S
H
J
D
V
K
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
CASE 318–08
ISSUE AE
SOT–23 (TO–236AB)
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representationorguaranteeregarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
andspecifically disclaims any and all liability, includingwithoutlimitationconsequentialorincidentaldamages. “Typical” parameters can and do vary in different
applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does
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associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
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BCW68GLT1/D
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