BDW46BV [ONSEMI]
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| 型号： | BDW46BV |
| 厂家： | 
ONSEMI |
| 描述： | 暂无描述 晶体 晶体管 功率双极晶体管 |
| 文件： | 总8页 (文件大小：78K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
BDW42* − NPN, BDW46,
BDW47* − PNP
Preferred Device
Darlington Complementary
Silicon Power Transistors
This series of plastic, medium−power silicon NPN and PNP
Darlington transistors are designed for general purpose and low speed
switching applications.
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Features
15 A DARLINGTON
COMPLEMENTARY SILICON
POWER TRANSISTORS
80−100 V, 85 W
• Pb−Free Package is Available**
• High DC Current Gain − h = 2500 (typ) @ I = 5.0 Adc.
• Collector Emitter Sustaining Voltage @ 30 mAdc:
= 80 Vdc (min) − BDW46
FE
C
V
CEO(sus)
100 Vdc (min.) − BDW42/BDW47
MARKING
DIAGRAM
• Low Collector Emitter Saturation Voltage
V
CE(sat)
= 2.0 Vdc (max) @ I = 5.0 Adc
C
3.0 Vdc (max) @ I = 10.0 Adc
C
4
• Monolithic Construction with Built−In Base Emitter Shunt resistors
• TO−220AB Compact Package
TO−220AB
CASE 221A
STYLE 1
BDWxx
YYWW
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
1
2
3
Collector-Emitter Voltage
V
CEO
Vdc
BDW46
BDW42, BDW47
Collector-Base Voltage
80
100
xx = 42, 46 or 47
YY = Year
WW = Work Week
V
CB
Vdc
BDW46
BDW42, BDW47
80
100
Emitter-Base Voltage
Collector Current
Base Current
V
5.0
15
Vdc
Adc
Adc
EB
ORDERING INFORMATION
I
C
I
0.5
B
†
Device
Package
Shipping
Total Device Dissipation
P
D
BDW42
TO−220AB
50 Units/Rail
@ T = 25°C
85
W
C
Derate above 25°C
0.68
W/°C
BDW46
BDW47
BDW47G
TO−220AB
TO−220AB
50 Units/Rail
50 Units/Rail
50 Units/Rail
Operating and Storage Junction
Temperature Range
T , T
−55 to
+150
°C
J
stg
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits
are exceeded, device functional operation is not implied, damage may occur
and reliability may be affected.
TO−220AB
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance,
Junction−to−Case
Symbol
Max
Unit
*Preferred devices are ON Semiconductor recommended
choices for future use and best overall value
R
1.47
°C/W
q
JC
**For additional information on our Pb−Free strategy and soldering details,
please download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2004
Publication Order Number:
June, 2004 − Rev. 11
BDW42/D
BDW42* − NPN, BDW46, BDW47* − PNP
ELECTRICAL CHARACTERISTICS (T = 25_C unless otherwise noted)
C
Characteristic
Symbol
Min
Max
Unit
OFF CHARACTERISTICS
Collector Emitter Sustaining Voltage (Note 1)
(I = 30 mAdc, I = 0)
V
Vdc
CEO(sus)
BDW46
BDW42/BDW47
80
100
−
−
C
B
Collector Cutoff Current
(V = 40 Vdc, I = 0)
I
I
mAdc
mAdc
mAdc
CEO
BDW46
BDW42/BDW47
−
−
2.0
2.0
CE
B
(V = 50 Vdc, I = 0)
CE
B
Collector Cutoff Current
(V = 80 Vdc, I = 0)
CBO
BDW46
BDW42/BDW47
−
−
1.0
1.0
CB
E
(V = 100 Vdc, I = 0)
CB
E
Emitter Cutoff Current
(V = 5.0 Vdc, I = 0)
I
−
2.0
EBO
BE
C
ON CHARACTERISTICS (Note 1)
DC Current Gain
h
FE
(I = 5.0 Adc, V = 4.0 Vdc)
1000
250
−
−
C
CE
(I = 10 Adc, V = 4.0 Vdc)
C
CE
Collector−Emitter Saturation Voltage
(I = 5.0 Adc, I = 10 mAdc)
V
Vdc
Vdc
CE(sat)
−
−
2.0
3.0
C
B
(I = 10 Adc, I = 50 mAdc)
C
B
Base−Emitter On Voltage
(I = 10 Adc, V = 4.0 Vdc)
V
−
3.0
BE(on)
C
CE
SECOND BREAKDOWN (Note 2)
Second Breakdown Collector
Current with Base Forward Biased
BDW42
I
Adc
S/b
V
CE
V
CE
V
CE
V
CE
= 28.4 Vdc
= 40 Vdc
= 22.5 Vdc
= 36 Vdc
3.0
1.2
3.8
1.2
−
−
−
−
BDW46/BDW47
DYNAMIC CHARACTERISTICS
Magnitude of common emitter small signal short circuit current transfer ratio
(I = 3.0 Adc, V = 3.0 Vdc, f = 1.0 MHz)
f
4.0
−
MHz
pF
T
C
CE
Output Capacitance
(V = 10 Vdc, I = 0, f = 0.1 MHz)
C
ob
BDW42
−
−
200
300
CB
E
BDW46/BDW47
Small−Signal Current Gain
(I = 3.0 Adc, V = 3.0 Vdc, f = 1.0 kHz)
h
fe
300
−
C
CE
1. Pulse Test: Pulse Width = 300 µs, Duty Cycle = 2.0%.
2. Pulse Test non repetitive: Pulse Width = 250 ms.
90
80
70
60
50
40
30
20
10
0
25
50
75
100
125
150
T , CASE TEMPERATURE (°C)
C
Figure 1. Power Temperature Derating Curve
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2
BDW42* − NPN, BDW46, BDW47* − PNP
5.0
V
CC
− 30 V
t
s
R AND R VARIED TO OBTAIN DESIRED CURRENT LEVELS
C
3.0
2.0
B
D MUST BE FAST RECOVERY TYPES, e.g.:
1
ꢂ1N5825 USED ABOVE I [ 100 mA
B
R
C
ꢂMSD6100 USED BELOW I [ 100 mA
t
f
B
SCOPE
1.0
0.7
0.5
TUT
R
B
V
2
APPROX
+ 8.0 V
0.3
0.2
D
51
1
t
r
[ 8.0 k
[ 150
0
V
= 30 V
I /I = 250
CC
V
1
+ 4.0 V
C B
0.1
0.07
0.05
I
= I
B1 B2
APPROX
− 12 V
25 µs
for t and t , D id disconnected
d
r
1
T = 25°C
t @ V
d
= 0 V
J
BE(off)
and V = 0
2
t , t v 10 ns
r
f
DUTY CYCLE = 1.0%
0.1
0.2 0.3
0.5 0.7 1.0
2.0 3.0
5.0 7.0 10
For NPN test circuit reverse all polarities
I , COLLECTOR CURRENT (AMP)
C
Figure 3. Switching Times
Figure 2. Switching Times Test Circuit
1.0
0.7
0.5
D = 0.5
0.2
0.3
0.2
0.1
P
(pk)
0.05
0.02
0.1
0.07
0.05
R
R
(t) = r(t) R
θ
JC
= 1.92°C/W
θ
JC
JC
θ
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
t
1
0.03
0.02
t
2
SINGLE PULSE
0.01
1
T
− T = P
C
R (t)
θ
JC
J(pk)
(pk)
DUTY CYCLE, D = t /t
1 2
0.01
0.01 0.02 0.03 0.05
0.1
0.2 0.3 0.5
1.0
2.0 3.0 5.0
10
20 30
50
100
200 300 500
1000
t, TIME OR PULSE WIDTH (ms)
Figure 4. Thermal Response
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3
BDW42* − NPN, BDW46, BDW47* − PNP
ACTIVE−REGION SAFE OPERATING AREA
50
50
0.1 ms
0.1 ms
0.5 ms
20
10
20
T = 25°C
T = 25°C
J
J
10
1.0 ms
1.0 ms
dc
0.5 ms
5.0
5.0
SECOND BREAKDOWN LIMIT
BONDING WIRE LIMIT
THERMAL LIMITED
SECOND BREAKDOWN LIMIT
BONDING WIRE LIMIT
THERMAL LIMITED
dc
2.0
1.0
0.5
2.0
1.0
0.5
@ T = 25°C (SINGLE PULSE)
@ T = 25°C (SINGLE PULSE)
C
C
0.2
0.1
0.2
0.1
BDW46
BDW47
BDW42
0.05
0.05
1.0
2.0 3.0
5.0 7.0 10
20 30
50 70 100
1.0
2.0 3.0
5.0 7.0 10
20 30
50 70 100
V
CE
, COLLECTOR−EMITTER VOLTAGE (VOLTS)
V
CE
, COLLECTOR−EMITTER VOLTAGE (VOLTS)
Figure 5. BDW42
Figure 6. BDW46 and BDW47
There are two limitations on the power handling ability of a
transistor: average junction temperature and second
Second breakdown pulse limits are valid for duty cycles to
10% provided T
the data in Figure 4. At high case temperatures, thermal
limitations will reduce the power that can be handled to values
v 200_C. T
may be calculated from
J(pk)
J(pk)
breakdown. Safe operating area curves indicate I − V limits
C
CE
of the transistor that must be observed for reliable operation;
i.e., the transistor must not be subjected to greater dissipation
than the curves indicate. The data of Figure 5 and 6 is based on
less than the limitations imposed by second breakdown.
*Linear extrapolation
T
J(pk)
= 200_C; T is variable depending on conditions.
C
10,000
5000
300
T = + 25°C
J
3000
2000
200
1000
500
C
100
70
ob
300
200
T = 25°C
J
V = 3.0 V
CE
= 3.0 A
C
ib
I
C
100
50
50
BDW46, 47 (PNP)
BDW42 (NPN)
BDW46, 47 (PNP)
BDW42 (NPN)
30
20
10
1.0
30
0.1 0.2
2.0
5.0 10
20
50 100 200
500 1000
0.5
1.0 2.0
5.0 10
20
50 100
V , REVERSE VOLTAGE (VOLTS)
R
f, FREQUENCY (kHz)
Figure 7. Small−Signal Current Gain
Figure 8. Capacitance
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4
BDW42* − NPN, BDW46, BDW47* − PNP
BDW42 (NPN)
BDW46, 47 (PNP)
20,000
10,000
20,000
V
CE
= 3.0 V
V
CE
= 3.0 V
10,000
7000
5000
5000
T = 150°C
J
T = 150°C
J
3000
2000
3000
2000
25°C
25°C
1000
500
1000
−ꢃ55°C
700
500
−ꢃ55°C
300
200
300
200
0.1
0.1
0.2 0.3
0.5 0.7 1.0
2.0 3.0
5.0 7.0 10
0.2 0.3
0.5 0.7 1.0
2.0 3.0
5.0 7.0 10
I , COLLECTOR CURRENT (AMP)
C
I , COLLECTOR CURRENT (AMP)
C
Figure 9. DC Current Gain
3.0
2.6
2.2
1.8
3.0
T = 25°C
J
T = 25°C
J
2.6
2.2
1.8
1.4
I
= 2.0 A
4.0 A
6.0 A
C
I
= 2.0 A
4.0 A
6.0 A
C
1.4
1.0
0.3
0.5 0.7 1.0
2.0 3.0
5.0 7.0 10
20 30
1.0
0.3
0.5 0.7 1.0
2.0 3.0
5.0 7.0 10
20 30
I , BASE CURRENT (mA)
B
I , BASE CURRENT (mA)
B
Figure 10. Collector Saturation Region
3.0
2.5
3.0
T = 25°C
J
T = 25°C
J
2.5
2.0
2.0
1.5
V
@ I /I = 250
C B
BE(sat)
V
BE
@ V = 4.0 V
CE
1.5
1.0
0.5
V
@ V = 4.0 V
CE
BE
V
@ I /I = 250
C B
BE(sat)
1.0
0.5
V
@ I /I = 250
C B
CE(sat)
V
@ I /I = 250
C B
CE(sat)
0.1
0.2 0.3
0.5 0.7 1.0
2.0 3.0
5.0 7.0 10
0.1
0.2 0.3
0.5 0.7 1.0
2.0 3.0
5.0 7.0 10
I , COLLECTOR CURRENT (AMP)
C
I , COLLECTOR CURRENT (AMP)
C
Figure 11. “On” Voltages
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5
+
+
+
+
4.0
3.0
2.0
1.0
−
−
*θ for V
VC
−
−
3.0
4.0
−
5.0
+
.6 +
.4
+
0
0
0
.2
0
−ꢃ0.2 −ꢃ0.4
−ꢃ0.6 −ꢃ0.8 −ꢃ1.0 −ꢃ1.2 −ꢃ1.4
−ꢃ0.6 −ꢃ0.4 −ꢃ0.2
0
+ꢃ0.2 +ꢃ0.4 +ꢃ0.6 +ꢃ0.8 +ꢃ1.0 +ꢃ1.2 + 1.4
, BASE−EMITTER VOLTAGE (VOLTS)
BE
+
5.0
BDW42* − NPN, BDW46, BDW47* − PNP
BDW42 (NPN)
BDW46, 47 (PNP)
+ꢃ5.0
+ꢃ4.0
*I /I v 250
C B
*I /I v 250
C B
+ꢃ3.0
+25°C to 150°C
25°C to 150°C
−ꢃ55°C to 25°C
+ꢃ2.0
+ꢃ1.0
0
−ꢃ1.0
−ꢃ2.0
−ꢃ3.0
−ꢃ4.0
−ꢃ5.0
0
1.0
2.0
CE(sat)
*θ for V
VC
CE(sat)
−ꢃ55°C to +25°C
25°C to 150°C
θ
for V
VB BE
−ꢃ55°C to +25°C
+25°C to 150°C
θ
for V
BE
VB
−ꢃ55°C to 25°C
2.0 3.0 5.0 7.0 10
0.1
0.2 0.3
0.5
1.0
2.0 3.0
5.0
10
0.1
0.2 0.3
0.5 0.7 1.0
I , COLLECTOR CURRENT (AMP)
I , COLLECTOR CURRENT (AMP)
C
C
Figure 12. Temperature Coefficients
5
5
10
10
FORWARD
REVERSE
= 30 V
REVERSE
FORWARD
4
4
10
10
V
V
CE
= 30 V
CE
3
3
10
10
10
10
10
2
2
1
0
10
10
10
T = 150°C
J
T = 150°C
J
1
0
100°C
25°C
100°C
25°C
−ꢃ 1
−ꢃ 1
10
10
V
BE
, BASE−EMITTER VOLTAGE (VOLTS)
V
Figure 13. Collector Cut−Off Region
NPN
BDW42
COLLECTOR
PNP
BDW46
BDW47
COLLECTOR
BASE
BASE
[ 8.0 k
[ 60
[ 8.0 k
[ 60
EMITTER
EMITTER
Figure 14. Darlington Schematic
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6
BDW42* − NPN, BDW46, BDW47* − PNP
PACKAGE DIMENSIONS
TO−220AB
CASE 221A−09
ISSUE AB
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
SEATING
PLANE
B
F
−T−
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
C
4
1
T
S
A
K
Q
Z
INCHES
DIM MIN MAX
MILLIMETERS
2
3
MIN
14.48
9.66
4.07
0.64
3.61
2.42
2.80
0.46
12.70
1.15
4.83
2.54
2.04
1.15
5.97
0.00
1.15
−−−
MAX
15.75
10.28
4.82
0.88
3.73
2.66
3.93
0.64
14.27
1.52
5.33
3.04
2.79
1.39
6.47
1.27
−−−
A
B
C
D
F
0.570
0.380
0.160
0.025
0.142
0.095
0.110
0.018
0.500
0.045
0.190
0.100
0.080
0.045
0.235
0.000
0.045
−−−
0.620
0.405
0.190
0.035
0.147
0.105
0.155
0.025
0.562
0.060
0.210
0.120
0.110
0.055
0.255
0.050
−−−
H
U
G
H
J
L
K
L
V
R
N
Q
R
S
T
G
J
D
N
U
V
Z
0.080
2.04
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
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7
BDW42* − NPN, BDW46, BDW47* − PNP
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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BDW42/D
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