BTB12-600TW3G [ONSEMI]

Triacs Silicon Bidirectional Thyristors; 双向晶闸管硅双向晶闸管
BTB12-600TW3G
型号: BTB12-600TW3G
厂家: ONSEMI    ONSEMI
描述:

Triacs Silicon Bidirectional Thyristors
双向晶闸管硅双向晶闸管

三端双向交流开关 局域网
文件: 总6页 (文件大小:107K)
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BTB12-600TW3G  
Triacs  
Silicon Bidirectional Thyristors  
Designed for high performance full-wave ac control applications  
where high noise immunity and high commutating di/dt are required.  
Features  
Blocking Voltage to 600 V  
http://onsemi.com  
On-State Current Rating of 12 A RMS at 80°C  
Uniform Gate Trigger Currents in Three Quadrants  
High Immunity to dV/dt 10 V/s minimum at 125°C  
Minimizes Snubber Networks for Protection  
Industry Standard TO-220AB Package  
High Commutating dI/dt 1.75 A/ms minimum at 110°C  
These are PbFree Devices  
TRIACS  
12 AMPERES RMS  
600 VOLTS  
MT2  
MT1  
G
MARKING  
4
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
DIAGRAM  
Rating  
Symbol  
Value  
Unit  
Peak Repetitive OffState Voltage (Note 1)  
J
V
V
DRM,  
RRM  
(T = 40 to 110°C, Sine Wave,  
V
50 to 60 Hz, Gate Open)  
BTB12600TW3G  
600  
12  
BTB126TWG  
On-State RMS Current  
I
A
A
T(RMS)  
TO220AB  
CASE 221A  
STYLE 4  
AYWW  
(Full Cycle Sine Wave, 60 Hz, T = 80°C)  
C
1
2
Peak Non-Repetitive Surge Current  
(One Full Cycle Sine Wave, 60 Hz,  
I
126  
3
TSM  
T
= 25°C)  
C
A
Y
WW  
G
= Assembly Location  
= Year  
= Work Week  
2
2
Circuit Fusing Consideration (t = 8.3 ms)  
I t  
66  
A sec  
NonRepetitive Surge Peak OffState  
V
V
V
V
V
DSM/  
RSM  
DSM/ RSM  
= PbFree Package  
Voltage (T = 25°C, t = 10ms)  
+100  
J
Peak Gate Current (T = 110°C, t = 20 s)  
I
4.0  
A
J
GM  
Peak Gate Power  
P
GM  
20  
W
(Pulse Width 1.0 s, T = 80°C)  
C
PIN ASSIGNMENT  
Average Gate Power (T = 110°C)  
P
1.0  
W
°C  
°C  
J
G(AV)  
1
2
3
4
Main Terminal 1  
Operating Junction Temperature Range  
Storage Temperature Range  
T
40 to +110  
40 to +150  
J
Main Terminal 2  
Gate  
T
stg  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
Main Terminal 2  
1. V  
and V  
for all types can be applied on a continuous basis. Blocking  
DRM  
RRM  
ORDERING INFORMATION  
voltages shall not be tested with a constant current source such that the  
voltage ratings of the devices are exceeded.  
Device  
Package  
Shipping  
50 Units / Rail  
BTB12600TW3G TO220AB  
(PbFree)  
*For additional information on our PbFree strategy and  
soldering details, please download the ON Semicon-  
ductor Soldering and Mounting Techniques Reference  
Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2008  
1
Publication Order Number:  
October, 2008 Rev. 0  
BTB12600TW3/D  
BTB12600TW3G  
THERMAL CHARACTERISTICS  
Characteristic  
Symbol  
Value  
Unit  
Thermal Resistance,  
JunctiontoCase (AC)  
JunctiontoAmbient  
R
R
1.8  
60  
°C/W  
JC  
JA  
Maximum Lead Temperature for Soldering Purposes 1/8from Case for 10 seconds  
T
260  
°C  
L
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted; Electricals apply in both directions)  
J
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
Peak Repetitive Blocking Current  
I
/
mA  
DRM  
(V = Rated V  
, V  
; Gate Open)  
T = 25°C  
T = 110°C  
J
I
0.005  
1.0  
D
DRM RRM  
J
RRM  
ON CHARACTERISTICS  
Peak On-State Voltage (Note 2)  
(I 17 A Peak)  
Gate Trigger Current (Continuous dc) (V = 12 V, R = 30 )  
V
1.55  
V
TM  
=
TM  
I
mA  
D
L
GT  
MT2(+), G(+)  
MT2(+), G()  
MT2(), G()  
1.2  
1.2  
1.2  
5.0  
5.0  
5.0  
Holding Current  
(V = 12 V, Gate Open, Initiating Current = 100 mA)  
D
I
10  
mA  
mA  
H
Latching Current (V = 12 V, I = 7.5 mA)  
I
D
G
L
MT2(+), G(+)  
MT2(+), G()  
MT2(), G()  
15  
15  
15  
Gate Trigger Voltage (V = 12 V, R = 30 )  
V
V
V
D
L
GT  
MT2(+), G(+)  
MT2(+), G()  
MT2(), G()  
0.5  
0.5  
0.5  
1.3  
1.3  
1.3  
Gate NonTrigger Voltage (T = 110°C)  
V
GD  
J
MT2(+), G(+)  
MT2(+), G()  
MT2(), G()  
0.2  
0.2  
0.2  
DYNAMIC CHARACTERISTICS  
Rate of Change of Commutating Current, See Figure 10.  
(dI/dt)  
1.75  
45  
A/ms  
A/s  
V/s  
c
(Gate Open, T = 110°C, No Snubber)  
J
Critical Rate of Rise of OnState Current  
dI/dt  
(T = 110°C, f = 120 Hz, I = 2 x I , tr 100 ns)  
J
G
GT  
Critical Rate of Rise of Off-State Voltage  
(V = 0.66 x V , Exponential Waveform, Gate Open, T = 125°C)  
dV/dt  
10  
D
DRM  
J
2. Indicates Pulse Test: Pulse Width 2.0 ms, Duty Cycle 2%.  
http://onsemi.com  
2
BTB12600TW3G  
Voltage Current Characteristic of Triacs  
(Bidirectional Device)  
+ Current  
Quadrant 1  
MainTerminal 2 +  
Symbol  
Parameter  
V
TM  
V
Peak Repetitive Forward Off State Voltage  
Peak Forward Blocking Current  
DRM  
DRM  
on state  
I
I
H
I
at V  
RRM  
V
Peak Repetitive Reverse Off State Voltage  
Peak Reverse Blocking Current  
RRM  
RRM  
RRM  
I
V
Maximum On State Voltage  
Holding Current  
+ Voltage  
DRM  
off state  
TM  
I
H
I
at V  
DRM  
I
H
Quadrant 3  
MainTerminal 2 −  
V
TM  
Quadrant Definitions for a Triac  
MT2 POSITIVE  
(Positive Half Cycle)  
+
(+) MT2  
(+) MT2  
Quadrant II  
Quadrant I  
() I  
(+) I  
GT  
GT  
GATE  
GATE  
MT1  
MT1  
REF  
REF  
I
+ I  
GT  
GT  
() MT2  
() MT2  
Quadrant III  
Quadrant IV  
(+) I  
() I  
GT  
GT  
GATE  
GATE  
MT1  
REF  
MT1  
REF  
MT2 NEGATIVE  
(Negative Half Cycle)  
All polarities are referenced to MT1.  
With inphase signals (using standard AC lines) quadrants I and III are used.  
http://onsemi.com  
3
BTB12600TW3G  
125  
110  
20  
18  
DC  
180°  
120°  
120°, 90°, 60°, 30°  
16  
14  
12  
10  
8
95  
90°  
180°  
60°  
6
80  
65  
30°  
4
DC  
2
0
0
2
4
6
8
10  
12  
0
2
4
6
8
10  
12  
I
, RMS ON‐STATE CURRENT (AMP)  
I
T(AV)  
, AVERAGE ON‐STATE CURRENT (AMP)  
T(RMS)  
Figure 1. Typical RMS Current Derating  
Figure 2. On-State Power Dissipation  
1
100  
0.1  
TYPICAL AT  
T = 25°C  
J
10  
0.01  
4
0.1  
1
10  
100  
1000  
10  
t, TIME (ms)  
Figure 4. Thermal Response  
12  
11  
10  
9
1
8
MT2 Positive  
7
6
5
4
3
MT2 Negative  
2
1
0
40 25 10  
5
20 35 50 65 80 95 110  
0.1  
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
T , JUNCTION TEMPERATURE (°C)  
J
V , INSTANTANEOUS ON-STATE VOLTAGE (V)  
T
Figure 5. Typical Hold Current Variation  
Figure 3. On-State Characteristics  
http://onsemi.com  
4
BTB12600TW3G  
100  
10  
1
2
V
= 12 V  
D
V
= 12 V  
D
1.8  
1.6  
1.4  
1.2  
1
R = 30  
L
R = 30  
L
Q1  
Q3  
Q1  
Q3  
0.8  
0.6  
0.4  
0.2  
0
Q2  
Q2  
40 25 10  
5
20 35 50 65 80 95 110  
40 25 10  
5
20 35 50 65 80 95 110  
T , JUNCTION TEMPERATURE (°C)  
J
T , JUNCTION TEMPERATURE (°C)  
J
Figure 6. Typical Gate Trigger Current Variation  
Figure 7. Typical Gate Trigger Voltage Variation  
100  
10  
1
5000  
V
= 12 V  
D
V = 600 Vpk  
D
R = 30  
L
T = 110°C  
J
4K  
3K  
2K  
1K  
0
Q2  
Q1  
Q3  
10  
100  
1000  
40 25 10  
5
20 35 50 65 80 95 110  
R , GATE TO MAIN TERMINAL 1 RESISTANCE (OHMS)  
G
T , JUNCTION TEMPERATURE (°C)  
J
Figure 8. Typical Latching Current Variation  
Figure 9. Critical Rate of Rise of Off-State Voltage  
(Exponential Waveform)  
L
L
1N4007  
200 V  
RMS  
ADJUST FOR  
, 60 Hz V  
MEASURE  
I
I
TM  
AC  
CHARGE  
CONTROL  
-
TRIGGER  
200 V  
+
CHARGE  
MT2  
1N914  
51  
MT1  
NON‐POLAR  
C
G
L
Note: Component values are for verification of rated (di/dt) . See AN1048 for additional information.  
c
Figure 10. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Current (di/dt)c  
http://onsemi.com  
5
BTB12600TW3G  
PACKAGE DIMENSIONS  
TO220  
CASE 221A07  
ISSUE AA  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
SEATING  
PLANE  
T−  
2. CONTROLLING DIMENSION: INCH.  
3. DIMENSION Z DEFINES A ZONE WHERE ALL  
BODY AND LEAD IRREGULARITIES ARE  
ALLOWED.  
B
F
C
T
S
INCHES  
DIM MIN MAX  
MILLIMETERS  
MIN  
14.48  
9.66  
4.07  
0.64  
3.61  
2.42  
2.80  
0.36  
12.70  
1.15  
4.83  
2.54  
2.04  
1.15  
5.97  
0.00  
1.15  
---  
MAX  
15.75  
10.28  
4.82  
0.88  
3.73  
2.66  
3.93  
0.55  
14.27  
1.52  
5.33  
3.04  
2.79  
1.39  
6.47  
1.27  
---  
4
3
A
B
C
D
F
0.570  
0.380  
0.160  
0.025  
0.142  
0.095  
0.110  
0.014  
0.500  
0.045  
0.190  
0.100  
0.080  
0.045  
0.235  
0.000  
0.045  
---  
0.620  
0.405  
0.190  
0.035  
0.147  
0.105  
0.155  
0.022  
0.562  
0.060  
0.210  
0.120  
0.110  
0.055  
0.255  
0.050  
---  
Q
A
K
1
2
U
H
G
H
J
Z
K
L
N
Q
R
S
T
R
J
L
V
G
U
V
Z
D
0.080  
2.04  
N
STYLE 4:  
PIN 1. MAIN TERMINAL 1  
2. MAIN TERMINAL 2  
3. GATE  
4. MAIN TERMINAL 2  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
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USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
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ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
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For additional information, please contact your local  
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BTB12600TW3/D  

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