CAT24C16TDI.GT3_技术文档

CAT24C01, CAT24C02,

CAT24C04, CAT24C08,

CAT24C16

1-Kb, 2-Kb, 4-Kb, 8-Kb and

16-Kb I²C CMOS Serial

EEPROM

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SOIC−8

W SUFFIX

CASE 751BD

Description

The CAT24C01/02/04/08/16 are 1−Kb, 2−Kb, 4−Kb, 8−Kb and

16−Kb respectively CMOS Serial EEPROM devices organized

internally as 8/16/32/64 and 128 pages respectively of 16 bytes each.

All devices support both the Standard (100 kHz) as well as Fast

PDIP−8

L SUFFIX

CASE 646AA

TSOT−23

TD SUFFIX

CASE 419AE

2

(400 kHz) I C protocol.

MSOP−8

Z SUFFIX

CASE 846AD

TDFN−8*

VP2 SUFFIX

CASE 511AK

Data is written by providing a starting address, then loading 1 to 16

contiguous bytes into a Page Write Buffer, and then writing all data to

non−volatile memory in one internal write cycle. Data is read by

providing a starting address and then shifting out data serially while

automatically incrementing the internal address count.

External address pins make it possible to address up to eight

CAT24C01 or CAT24C02, four CAT24C04, two CAT24C08 and one

CAT24C16 device on the same bus.

TSSOP−8

Y SUFFIX

CASE 948AL

UDFN8−EP

HU4 SUFFIX

CASE 517AZ

WLCSP−4**

C4A SUFFIX

CASE 567DC

WLCSP−5**

C5A SUFFIX

CASE 567DD

Features

2

PIN CONFIGURATIONS

• Supports Standard and Fast I C Protocol

• 1.7 V to 5.5 V Supply Voltage Range

• 16−Byte Page Write Buffer

5

SCL

WP

1

2

3

V

SS

• Hardware Write Protection for Entire Memory

2

4

• Schmitt Triggers and Noise Suppression Filters on I C Bus Inputs

SDA

V

CC

(SCL and SDA)

TSOT−23 (TD) (Top View)

• Low power CMOS Technology

• More than 1,000,000 Program/Erase Cycles

• 100 Year Data Retention

A

B

1

2

3

Pin 1

1

A

B

C

V

CC

V

SS

V

CC

V

SS

• Industrial and Extended Temperature Range

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

SDA

2

SCL

SDA

WP

SCL

PIN CONFIGURATION

WLCSP−4**

(Top Views)

WLCSP−5**

CAT24C__

16 / 08 / 04 / 02 / 01

** WLCSP are available for the CAT24C04,

CAT24C08 and CAT24C16 only.

For availability, please contact factory.

V

/

8

7

6

5

NC NC NC

A

0

A

1

A

2

A

0

A

1

A

2

CC

1

2

3

4

/

WP

NC NC

A

1

A

2

/

NC

SCL

SDA

A

2

Pin 1

TOP MARKING FOR WLCSP

(Ball Down)

V

SS

PDIP (L), SOIC (W), TSSOP (Y), MSOP (Z),

TDFN, (VP2)*, UDFN−EP (HU4) (Top View)

X = Specific Device

X = Code

4 = 24C04

X

Y M

X

Y M

* The TDFN (VP2) package is not recommended for new designs.

8 = 24C08

WLCSP−4

WLCSP−5

6 = 24C16

Y = Production Year (Last Digit)

M = Production Month (1−9, O, N, D)

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 18 of this data sheet.

1

Publication Order Number:

CAT24C01/D

September, 2012 − Rev. 22

CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16

V

CC

Table 1. PIN FUNCTION

†

Pin Name

Function

A0, A1, A2

SDA

Device Address Input

SCL

Serial Data Input/Output

Serial Clock Input

Write Protect Input

Power Supply

SCL

A , A , A

CAT24Cxx

SDA

2

1

0

WP

V

CC

V

SS

Ground

NC

No Connect

V

SS

†The exposed pad for the TDFN/UDFN packages can be left floating

or connected to Ground.

Figure 1. Functional Symbol

Table 2. ABSOLUTE MAXIMUM RATINGS

Parameters

Ratings

Units

°C

Storage Temperature

−65 to +150

−0.5 to +6.5

Voltage on any pin with respect to Ground (Note 1)

V

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

1. During input transitions, voltage undershoot on any pin should not exceed −1 V for more than 20 ns. Voltage overshoot on pins A , A , A

0

1

2

and WP should not exceed V + 1 V for more than 20 ns, while voltage on the I C bus pins, SCL and SDA, should not exceed the absolute

CC

maximum ratings, irrespective of V

.

CC

Table 3. RELIABILITY CHARACTERISTICS (Note 2)

Symbol Parameter

(Note 3)

Min

1,000,000

100

Units

Program / Erase Cycles

Years

N

Endurance

END

T

DR

Data Retention

2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100

and JEDEC test methods.

3. Page Mode, V = 5 V, 25°C.

CC

Table 4. D.C. OPERATING CHARACTERISTICS

(V = 1.8 V to 5.5 V, T = −40°C to +125°C and V = 1.7 V to 5.5 V, T = −40°C to +85°C, unless otherwise specified.)

CC

A

CC

A

Symbol

Parameter

Test Conditions

Min

Max

Units

mA

I

Read Current

Write Current

Standby Current

Read, f

Write, f

= 400 kHz

1

2

1

CCR

SCL

I

mA

CCW

SCL

I

SB

All I/O Pins at GND or V

T = −40°C to +85°C

CC

mA

CC

A

V

≤ 3.3 V

T = −40°C to +85°C

CC

3

A

V

> 3.3 V

T = −40°C to +125°C

A

5

2

I

I/O Pin Leakage

Input Low Voltage

Input High Voltage

Pin at GND or V

mA

V

L

IL

IH

CC

V

−0.5

0.3 x V

CC

V

A , A , A and WP

0.7 x V

V + 0.5

CC

V

0

1

2

CC

SCL and SDA

> 2.5 V, I = 3 mA

0.7 x V

5.5

V

Output Low

Voltage

V

0.4

0.2

OL

CC

OL

< 2.5 V, I = 1 mA

CC

OL

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2

CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16

Table 5. PIN IMPEDANCE CHARACTERISTICS

(V = 1.8 V to 5.5 V, T = −40°C to +125°C and V = 1.7 V to 5.5 V, T = −40°C to +85°C, unless otherwise specified.)

CC

A

CC

A

Symbol

Parameter

SDA Pin Capacitance

Other Pins

Conditions

= 0 V, f = 1.0 MHz, V = 5.0 V

Max

8

Units

pF

C

(Note 4)

V

IN

CC

6

pF

I

(Note 5)

WP Input Current

V

IN

V

IN

V

IN

< V , V = 5.5 V

130

120

80

2

mA

WP

IH

CC

< V , V = 3.3 V

IH

CC

< V , V = 1.7 V

IH

CC

V

IN

> V

IH

I

A

(Note 5)

Address Input Current

(A0, A1, A2)

Product Rev H: CAT24C02

Product Rev K: CAT24C04,

CAT24C08, CAT24C16

V

IN

V

IN

V

IN

< V , V = 5.5 V

50

35

25

2

mA

IH

CC

< V , V = 3.3 V

IH

CC

< V , V = 1.7 V

IH

CC

V

IN

> V

IH

4. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100

and JEDEC test methods.

5. When not driven, the WP, A0, A1 and A2 pins are pulled down to GND internally. For improved noise immunity, the internal pull−down is

relatively strong; therefore the external driver must be able to supply the pull−down current when attempting to drive the input HIGH. To

conserve power, as the input level exceeds the trip point of the CMOS input buffer (~ 0.5 x VCC), the strong pull−down reverts to a weak

current source.

Table 6. A.C. CHARACTERISTICS

(Note 6) (V = 1.8 V to 5.5 V, T = −40°C to +125°C and V = 1.7 V to 5.5 V, T = −40°C to +85°C, unless otherwise specified.)

CC

A

CC

A

Standard

Fast

Min

Max

Min

Max

Symbol

Parameter

Units

kHz

ms

F

SCL

Clock Frequency

100

400

t

START Condition Hold Time

Low Period of SCL Clock

High Period of SCL Clock

START Condition Setup Time

Data In Hold Time

4

4.7

4

0.6

1.3

0.6

0

HD:STA

t

ms

LOW

t

ms

HIGH

t

4.7

0

ms

SU:STA

HD:DAT

t

ms

t

Data In Setup Time

250

100

ns

SU:DAT

t

SDA and SCL Rise Time

SDA and SCL Fall Time

STOP Condition Setup Time

1000

300

ns

R

t (Note 6)

ns

F

t

4

0.6

1.3

ms

SU:STO

t

Bus Free Time Between STOP and START

SCL Low to Data Out Valid

Data Out Hold Time

4.7

ms

BUF

t

3.5

0.9

ms

AA

DH

t

100

ns

T (Note 6)

Noise Pulse Filtered at SCL and SDA Inputs

WP Setup Time

100

ns

i

t

0

ms

SU:WP

HD:WP

t

WP Hold Time

2.5

ms

t

Write Cycle Time

5

1

5

1

ms

WR

t

(Notes 7, 8) Power−up to Ready Mode

PU

6. Test conditions according to “AC Test Conditions” table.

7. Tested initially and after a design or process change that affects this parameter.

8. t is the delay between the time V is stable and the device is ready to accept commands.

PU

CC

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CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16

Table 7. A.C. TEST CONDITIONS

Input Drive Levels

0.2 x V to 0.8 x V

CC

Input Rise and Fall Time

Input Reference Levels

Output Reference Level

Output Test Load

v 50 ns

0.3 x V , 0.7 x V

CC

0.5 x V

CC

Current Source I = 3 mA (V w 2.5 V); I = 1 mA (V < 2.5 V); C = 100 pF

OL

CC

OL

CC

L

Power−On Reset (POR)

bus via their respective SCL and SDA pins. The transmitting

device pulls down the SDA line to ‘transmit’ a ‘0’ and

releases it to ‘transmit’ a ‘1’.

Data transfer may be initiated only when the bus is not

busy (see AC Characteristics).

Each CAT24Cxx* incorporates Power−On Reset (POR)

circuitry which protects the internal logic against powering

up in the wrong state.

A CAT24Cxx device will power up into Standby mode

after V exceeds the POR trigger level and will power

During data transfer, the SDA line must remain stable

while the SCL line is high. An SDA transition while SCL is

high will be interpreted as a START or STOP condition

(Figure 2). The START condition precedes all commands. It

consists of a HIGH to LOW transition on SDA while SCL

is HIGH. The START acts as a ‘wake−up’ call to all

receivers. Absent a START, a Slave will not respond to

commands. The STOP condition completes all commands.

It consists of a LOW to HIGH transition on SDA while SCL

is HIGH.

CC

down into Reset mode when V drops below the POR

CC

trigger level. This bi−directional POR feature protects the

device against ‘brown−out’ failure following a temporary

loss of power.

*For common features, the CAT24C01/02/04/08/16 will be

referred to as CAT24Cxx.

Pin Description

SCL: The Serial Clock input pin accepts the Serial Clock

generated by the Master.

Device Addressing

SDA: The Serial Data I/O pin receives input data and

transmits data stored in EEPROM. In transmit mode, this pin

is open drain. Data is acquired on the positive edge, and is

delivered on the negative edge of SCL.

The Master initiates data transfer by creating a START

condition on the bus. The Master then broadcasts an 8−bit

serial Slave address. For normal Read/Write operations, the

first 4 bits of the Slave address are fixed at 1010 (Ah). The

next 3 bits are used as programmable address bits when

cascading multiple devices and/or as internal address bits.

The last bit of the slave address, R/W, specifies whether a

Read (1) or Write (0) operation is to be performed. The 3

address space extension bits are assigned as illustrated in

A0, A1 and A2: The Address inputs set the device address

when cascading multiple devices. When not driven, these

pins are pulled LOW internally.

WP: The Write Protect input pin inhibits all write

operations, when pulled HIGH. When not driven, this pin is

pulled LOW internally.

Figure 3. A , A and A must match the state of the external

2

1

0

address pins, and a , a and a are internal address bits.

10

9

8

Functional Description

Acknowledge

The CAT24Cxx supports the Inter−Integrated Circuit

After processing the Slave address, the Slave responds

with an acknowledge (ACK) by pulling down the SDA line

during the 9th clock cycle (Figure 4). The Slave will also

acknowledge the address byte and every data byte presented

in Write mode. In Read mode the Slave shifts out a data byte,

2

(I C) Bus data transmission protocol, which defines a device

that sends data to the bus as a transmitter and a device

receiving data as a receiver. Data flow is controlled by a

Master device, which generates the serial clock and all

START and STOP conditions. The CAT24Cxx acts as a

Slave device. Master and Slave alternate as either

transmitter or receiver.

th

and then releases the SDA line during the 9 clock cycle. As

long as the Master acknowledges the data, the Slave will

continue transmitting. The Master terminates the session by

not acknowledging the last data byte (NoACK) and by

issuing a STOP condition. Bus timing is illustrated in

Figure 5.

I²C Bus Protocol

2

The I C bus consists of two ‘wires’, SCL and SDA. The

two wires are connected to the V supply via pull−up

CC

resistors. Master and Slave devices connect to the 2−wire

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4

CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16

SCL

SDA

START

CONDITION

STOP

CONDITION

Figure 2. Start/Stop Timing

1

0

1

0

A

R/W

CAT24C01 and CAT24C02

CAT24C04

2

1

0

8

0

A

2

A

1

a

A

a

CAT24C08

2

9

a

10

CAT24C16

9

Figure 3. Slave Address Bits

BUS RELEASE DELAY (TRANSMITTER)

BUS RELEASE DELAY

(RECEIVER)

SCL FROM

MASTER

1

8

9

DATA OUTPUT

FROM TRANSMITTER

DATA OUTPUT

FROM RECEIVER

ACK SETUP (w t

)

SU:DAT

ACK DELAY (v t

)

START

AA

Figure 4. Acknowledge Timing

t

F

t

R

HIGH

t

LOW

SCL

t

HD:DAT

SU:STA

t

HD:SDA

SU:DAT

SU:STO

SDA IN

t

BUF

t

AA

t

DH

SDA OUT

Figure 5. Bus Timing

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5

CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16

WRITE OPERATIONS

Byte Write

sixteen bytes are received and the STOP condition has been

sent by the Master, the internal Write cycle begins. At this

point all received data is written to the CAT24Cxx in a single

write cycle.

In Byte Write mode, the Master sends the START

condition and the Slave address with the R/W bit set to zero

to the Slave. After the Slave generates an acknowledge, the

Master sends the byte address that is to be written into the

address pointer of the CAT24Cxx. After receiving another

acknowledge from the Slave, the Master transmits the data

byte to be written into the addressed memory location. The

CAT24Cxx device will acknowledge the data byte and the

Master generates the STOP condition, at which time the

device begins its internal Write cycle to nonvolatile memory

Acknowledge Polling

The acknowledge (ACK) polling routine can be used to

take advantage of the typical write cycle time. Once the stop

condition is issued to indicate the end of the host’s write

operation, the CAT24Cxx initiates the internal write cycle.

The ACK polling can be initiated immediately. This

involves issuing the start condition followed by the slave

address for a write operation. If the CAT24Cxx is still busy

with the write operation, NoACK will be returned. If the

CAT24Cxx has completed the internal write operation, an

ACK will be returned and the host can then proceed with the

next read or write operation.

(Figure 6). While this internal cycle is in progress (t ), the

SDA output will be tri−stated and the CAT24Cxx will not

respond to any request from the Master device (Figure 7).

WR

Page Write

The CAT24Cxx writes up to 16 bytes of data in a single

write cycle, using the Page Write operation (Figure 8). The

Page Write operation is initiated in the same manner as the

Byte Write operation, however instead of terminating after

the data byte is transmitted, the Master is allowed to send up

to fifteen additional bytes. After each byte has been

transmitted the CAT24Cxx will respond with an

acknowledge and internally increments the four low order

address bits. The high order bits that define the page address

remain unchanged. If the Master transmits more than sixteen

bytes prior to sending the STOP condition, the address

counter ‘wraps around’ to the beginning of page and

previously transmitted data will be overwritten. Once all

Hardware Write Protection

With the WP pin held HIGH, the entire memory is

protected against Write operations. If the WP pin is left

floating or is grounded, it has no impact on the operation of

the CAT24Cxx. The state of the WP pin is strobed on the last

falling edge of SCL immediately preceding the first data

byte (Figure 9). If the WP pin is HIGH during the strobe

interval, the CAT24Cxx will not acknowledge the data byte

and the Write request will be rejected.

Delivery State

The CAT24Cxx is shipped erased, i.e., all bytes are FFh.

S

T

A

R

T

BUS ACTIVITY:

MASTER

S

ADDRESS

BYTE

DATA

BYTE

T

O

P

SLAVE

ADDRESS

a

− a

d − d

7 0

7

0

S

P

A

C

K

A

C

K

A

C

K

SLAVE

* For the CAT24C01 a = 0

7

Figure 6. Byte Write Sequence

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CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16

SCL

SDA

th

8

Bit

ACK

Byte n

t

WR

STOP

CONDITION

START

CONDITION

ADDRESS

Figure 7. Write Cycle Timing

S

T

A

R

T

BUS ACTIVITY:

MASTER

S

DATA

T

O

P

ADDRESS

BYTE

SLAVE

ADDRESS

BYTE

n+1

BYTE

n+P

BYTE

n

S

P

A

C

K

A

C

K

A

C

K

A

C

K

A

C

K

SLAVE

n = 1

P v 15

Figure 8. Page Write Sequence

ADDRESS

BYTE

DATA

BYTE

1

8

9

1

7

8

SCL

a

7

a

d

0

SDA

WP

0

t

SU:WP

t

HD:WP

Figure 9. WP Timing

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7

CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16

READ OPERATIONS

Immediate Read

CAT24Cxx acknowledges the byte address, the Master

device resends the START condition and the slave address,

this time with the R/W bit set to one. The CAT24Cxx then

responds with its acknowledge and sends the requested data

byte. The Master device does not acknowledge the data

(NoACK) but will generate a STOP condition (Figure 11).

Upon receiving a Slave address with the R/W bit set to ‘1’,

the CAT24Cxx will interpret this as a request for data

residing at the current byte address in memory. The

CAT24Cxx will acknowledge the Slave address, will

immediately shift out the data residing at the current address,

and will then wait for the Master to respond. If the Master

does not acknowledge the data (NoACK) and then follows

up with a STOP condition (Figure 10), the CAT24Cxx

returns to Standby mode.

Sequential Read

If during a Read session, the Master acknowledges the 1

st

data byte, then the CAT24Cxx will continue transmitting

data residing at subsequent locations until the Master

responds with a NoACK, followed by a STOP (Figure 12).

In contrast to Page Write, during Sequential Read the

address count will automatically increment to and then

wrap−around at end of memory (rather than end of page). In

the CAT24C01, the internal address count will not wrap

around at the end of the 128 byte memory space.

Selective Read

Selective Read operations allow the Master device to

select at random any memory location for a read operation.

The Master device first performs a ‘dummy’ write operation

by sending the START condition, slave address and byte

address of the location it wishes to read. After the

N

S

T

A

R

T

O

BUS ACTIVITY:

MASTER

S

A T

C O

K P

SLAVE

ADDRESS

S

P

A

DATA

C

SLAVE

8

BYTE

K

SCL

SDA

9

th

8

Bit

DATA OUT

NO ACK

STOP

Figure 10. Immediate Read Sequence and Timing

N

O

S

T

A

R

T

S

T

A

R

T

BUS ACTIVITY:

MASTER

S

A T

C O

K P

ADDRESS

BYTE

SLAVE

ADDRESS

SLAVE

ADDRESS

S

P

A

C

K

A

C

K

A

C

K

DATA

BYTE

SLAVE

Figure 11. Selective Read Sequence

N

O

BUS ACTIVITY:

S

T

O

P

A

C

K

A

C

K

A

C

K

A

C

K

SLAVE

ADDRESS

MASTER

P

A

C

K

SLAVE

DATA

BYTE

n

DATA

BYTE

n+1

DATA

BYTE

n+2

DATA

BYTE

n+x

Figure 12. Sequential Read Sequence

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CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16

PACKAGE DIMENSIONS

PDIP−8, 300 mils

CASE 646AA

ISSUE A

SYMBOL

MIN

NOM

MAX

A

5.33

A1

A2

b

0.38

2.92

0.36

3.30

0.46

1.52

0.25

9.27

4.95

0.56

1.78

0.36

10.16

b2

c

1.14

0.20

9.02

E1

D

E

E1

e

7.62

6.10

7.87

6.35

8.25

7.11

2.54 BSC

7.87

2.92

10.92

3.80

eB

L

PIN # 1

IDENTIFICATION

3.30

D

TOP VIEW

E

A2

A1

A

c

b2

L

eB

e

b

SIDE VIEW

END VIEW

Notes:

(1) All dimensions are in millimeters.

(2) Complies with JEDEC MS-001.

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CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16

PACKAGE DIMENSIONS

SOIC 8, 150 mils

CASE 751BD

ISSUE O

SYMBOL

MIN

NOM

MAX

1.35

A

A1

b

1.75

0.25

0.51

0.25

0.10

0.33

0.19

c

E1

E

D

E

E1

e

4.80

5.80

3.80

5.00

6.20

4.00

1.27 BSC

h

0.25

0.40

0º

0.50

1.27

8º

L

PIN # 1

IDENTIFICATION

θ

TOP VIEW

D

h

A1

θ

A

c

e

b

L

SIDE VIEW

END VIEW

Notes:

(1) All dimensions are in millimeters. Angles in degrees.

(2) Complies with JEDEC MS-012.

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CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16

PACKAGE DIMENSIONS

TSSOP8, 4.4x3

CASE 948AL

ISSUE O

b

SYMBOL

MIN

NOM

MAX

A

A1

A2

b

1.20

0.15

1.05

0.30

0.20

3.10

6.50

4.50

0.05

0.80

0.19

0.09

2.90

6.30

4.30

0.90

E

c

E1

D

3.00

6.40

E

E1

e

4.40

0.65 BSC

1.00 REF

L

L1

0.50

0.60

0.75

0º

8º

θ

e

TOP VIEW

D

c

A2

A

q1

A1

L1

L

SIDE VIEW

END VIEW

Notes:

(1) All dimensions are in millimeters. Angles in degrees.

(2) Complies with JEDEC MO-153.

http://onsemi.com

11

CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16

PACKAGE DIMENSIONS

MSOP 8, 3x3

CASE 846AD

ISSUE O

SYMBOL

MIN

NOM

MAX

A

A1

A2

b

1.10

0.15

0.95

0.38

0.23

3.10

5.00

3.10

0.05

0.75

0.22

0.13

2.90

4.80

2.90

0.10

0.85

c

D

3.00

4.90

E

E1

E

E1

e

3.00

0.65 BSC

0.60

L

0.40

0.80

L1

L2

θ

0.95 REF

0.25 BSC

0º

6º

TOP VIEW

D

A2

A

DETAIL A

A1

e

b

c

SIDE VIEW

END VIEW

q

L2

Notes:

L

(1) All dimensions are in millimeters. Angles in degrees.

(2) Complies with JEDEC MO-187.

L1

DETAIL A

http://onsemi.com

12

CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16

PACKAGE DIMENSIONS

TDFN8, 2x3

CASE 511AK

ISSUE A

D

A

e

b

E2

E

PIN#1

IDENTIFICATION

A1

PIN#1 INDEX AREA

D2

L

TOP VIEW

SIDE VIEW

BOTTOM VIEW

SYMBOL

MIN

0.70

0.00

0.45

NOM

MAX

0.80

0.05

0.65

A

A1

A2

A3

b

0.75

0.02

A2

0.55

0.20 REF

0.25

A3

0.20

1.90

1.30

2.90

1.20

0.30

2.10

1.50

3.10

1.40

D

2.00

FRONT VIEW

D2

E

1.40

3.00

E2

e

1.30

0.50 TYP

0.30

L

0.20

0.40

Notes:

(1) All dimensions are in millimeters.

(2) Complies with JEDEC MO-229.

http://onsemi.com

13

CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16

PACKAGE DIMENSIONS

TSOT−23, 5 LEAD

CASE 419AE

ISSUE O

SYMBOL

MIN

NOM

MAX

1.00

0.10

0.90

0.45

0.20

D

A

A1

A2

b

e

0.01

0.80

0.30

0.12

0.05

0.87

c

0.15

D

2.90 BSC

2.80 BSC

1.60 BSC

0.95 TYP

0.40

E1

E

E1

e

L

0.30

0.50

L1

L2

θ

0.60 REF

0.25 BSC

0º

8º

TOP VIEW

A2 A

q

L

b

c

A1

L2

L1

SIDE VIEW

END VIEW

Notes:

(1) All dimensions are in millimeters. Angles in degrees.

(2) Complies with JEDEC MO-193.

http://onsemi.com

14

CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16

PACKAGE DIMENSIONS

UDFN8, 2x3 EXTENDED PAD

CASE 517AZ

ISSUE O

b

D

e

A

L

DAP SIZE 1.8 x 1.8

E2

E

PIN #1

IDENTIFICATION

A1

PIN #1 INDEX AREA

D2

TOP VIEW

SIDE VIEW

BOTTOM VIEW

SYMBOL

MIN

0.45

0.00

NOM

MAX

0.55

0.05

A

A1

A3

b

0.50

0.02

0.127 REF

0.25

A3

A

DETAIL A

0.065 REF

0.20

1.95

1.35

2.95

1.25

0.30

2.05

1.45

3.05

1.35

D

2.00

FRONT VIEW

D2

E

1.40

3.00

E2

e

1.30

0.50 REF

0.30

L

0.25

0.35

0.065 REF

Copper Exposed

A3 0.0 - 0.05

DETAIL A

Notes:

(1) ꢀAll dimensions are in millimeters.

(2) Refer JEDEC MO-236/MO-252.

http://onsemi.com

15

CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16

PACKAGE DIMENSIONS

WLCSP4, 0.86x0.84

CASE 567DC

ISSUE B

NOTES:

A

B

D

E

1. DIMENSIONING AND TOLERANCING PER ASME

Y14.5M, 1994.

PIN A1

REFERENCE

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DATUM C, THE SEATING PLANE, IS DEFINED BY

THE SPHERICAL CROWNS OF THE CONTACT

BALLS.

2X

0.10

C

4. COPLANARITY APPLIES TO SPHERICAL CROWNS

OF THE CONTACT BALLS.

5. DIMENSION b IS MEASURED AT THE MAXIMUM

CONTACT BALL DIAMETER PARALLEL TO DATUM C.

2X

TOP VIEW

MILLIMETERS

A2

DIM

A

A1

A2

b

D

E

MIN

0.28

0.08

MAX

0.38

0.12

A

C

0.10

C

0.23 REF

0.16

0.20

0.86 BSC

0.84 BSC

0.40 BSC

0.05

SEATING

PLANE

NOTE 4

A1

SIDE VIEW

e

NOTE 3

RECOMMENDED

SOLDERING FOOTPRINT*

e

A1

PACKAGE

OUTLINE

4X

b

e

M

0.10

C A B

B

NOTE 5

A

^4X0.18

1

2

0.40

PITCH

BOTTOM VIEW

0.40

PITCH

DIMENSIONS: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

http://onsemi.com

16

CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16

PACKAGE DIMENSIONS

WLCSP5, 0.84x0.86

CASE 567DD

ISSUE B

NOTES:

A

B

E

D

1. DIMENSIONING AND TOLERANCING PER ASME

Y14.5M, 1994.

PIN A1

REFERENCE

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DATUM C, THE SEATING PLANE, IS DEFINED BY THE

SPHERICAL CROWNS OF THE CONTACT BALLS.

4. COPLANARITY APPLIES TO SPHERICAL CROWNS

OF THE CONTACT BALLS.

2X

0.10

C

5. DIMENSION b IS MEASURED AT THE MAXIMUM CON-

TACT BALL DIAMETER PARALLEL TO DATUM C.

2X

TOP VIEW

MILLIMETERS

DIM

A

A1

A2

b

D

E

MIN

0.29

0.10

0.23 REF

0.14

MAX

0.39

0.14

A2

A

C

0.10

C

0.18

0.84 BSC

0.86 BSC

0.30 BSC

0.52 BSC

0.05

e

e1

SEATING

PLANE

NOTE 4

A1

SIDE VIEW

NOTE 3

RECOMMENDED

SOLDERING FOOTPRINT*

e

5X

b

e1

PACKAGE

A1

OUTLINE

M

0.10

C A B

C

NOTE 5

B

A

PIN A1

REFERENCE

1 2 3

^5X0.16

0.52

PITCH

BOTTOM VIEW

0.30

PITCH

DIMENSIONS: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

http://onsemi.com

17

CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16

Ordering Information

CAT24C01 Ordering Information

Specific

Device Marking

Package

Type

Temperature

Range (Note 9)

Lead

Finish

Device Order Number

CAT24C01TDI−GT3

CAT24C01VP2I−GT3*

CAT24C01WI−GT3

CAT24C01WE−GT3

CAT24C01YI−GT3

CAT24C01YE−GT3

CAT24C01ZI−GT3

Shipping

MM

TSOT−23−5

TDFN−8

Industrial

Extended

Industrial

Extended

Industrial

NiPdAu

Tape & Reel, 3,000 Units / Reel

EE

24C01WI

C01

SOIC−8

TSSOP−8

MSOP−8

C01

ABMK

CAT24C02 Ordering Information (Notes 10, 11)

Specific

Package

Temperature

Lead

Device Marking

Type

Range (Note 9)

Finish

Device Order Number

CAT24C02WI−G

Shipping

24C02H

C02H

C1T

SOIC−8

Industrial

Extended

Industrial

Extended

Industrial

Extended

Industrial

Extended

Industrial

Extended

Industrial

Extended

Industrial

Extended

Industrial

Extended

Industrial

Extended

NiPdAu

Tube, 100 Units / Tube

CAT24C02WI−GA

SOIC−8

Tube, 100 Units / Tube

CAT24C02WI−GT3

CAT24C02WI−GT3A

CAT24C02WE−GT3

CAT24C02WE−GT3A

CAT24C02YI−G

SOIC−8

Tape & Reel, 3,000 Units / Reel

Tube, 100 Units / Tube

SOIC−8

TSSOP−8

TDFN−8

CAT24C02YI−GA

Tube, 100 Units / Tube

CAT24C02YI−GT3

CAT24C02YI−GT3A

CAT24C02YE−GT3

CAT24C02YE−GT3A

CAT24C02VP2I−GT3*

CAT24C02VP2IGT3A*

CAT24C02VP2E−GT3*

CAT24C02VP2EGT3A*

CAT24C02ZI−GT3

CAT24C02ZE−GT3

CAT24C02ZI−GT3A

CAT24C02ZE−GT3A

CAT24C02TDI−GT3

CAT24C02TDE−GT3

CAT24C02TDI−GT3A

CAT24C02TDE−GT3A

CAT24C02LI−GA

Tape & Reel, 3,000 Units / Reel

Tube, 50 Units / Tube

C1T

TDFN−8

C1T

TDFN−8

C1T

TDFN−8

C1

MSOP−8

TSOT−23−5

PDIP−8

C1

24C02H

C1U

CAT24C02LE−GA

PDIP−8

Tube, 50 Units / Tube

CAT24C02HU4IGT3A

CAT24C02HU4EGT3A

UDFN8−EP

Tape & Reel, 3,000 Units / Reel

C1U

9. Industrial temperature range is −40°C to +85°C and Extended temperature range is −40°C to +125°C.

10.Part numbers ending with “A” for the CAT24C02 are for Gresham (Product Rev H) only die.

11. The CAT24C02 ”non−A” Device Order Numbers use Gresham die (Rev H) for date codes, starting August 1st, 2012. Therefore the Specific

Device Marking for these OPNs reflect Rev H die.

* The TDFN (VP2) package is not recommended for new designs.

http://onsemi.com

18

CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16

CAT24C04 Ordering Information

Specific

Package

Type

Temperature

Range (Note 12)

Lead

Finish

Device Marking

24C04K

C04K

C04

Device Order Number

CAT24C04WI−G

Shipping

SOIC−8

Industrial

Extended

Industrial

Extended

Industrial

Extended

Industrial

Extended

Industrial

Extended

Industrial

Extended

NiPdAu

N/A

Tube, 100 Units / Tube

CAT24C04WI−GT3

CAT24C04WE−GT3

CAT24C04YI−G

Tape & Reel, 3,000 Units / Reel

Tube, 100 Units / Tube

SOIC−8

TSSOP−8

TDFN−8

CAT24C04YI−GT3

CAT24C04YE−GT3

CAT24C04VP2I−GT3*

CAT24C04LI−G

Tape & Reel, 3,000 Units / Reel

Tube, 50 Units / Tube

C2T

24C04K

C2

PDIP−8

CAT24C04LE−G

PDIP−8

Tube, 50 Units / Tube

CAT24C04ZI−GT3

CAT24C04ZE−GT3

CAT24C04C4ATR**

CAT24C04C5ATR**

CAT24C04TDI−GT3

CAT24C04TDE−GT3

CAT24C04HU4I−GT3

CAT24C04HU4E−GT3

MSOP−8

WLCSP−4

WLCSP−5

TSOT−23−5

UDFN8−EP

Tape & Reel, 3,000 Units / Reel

Tape & Reel, 5,000 Units / Reel

Tape & Reel, 3,000 Units / Reel

C2

4

N/A

C2

NiPdAu

C2

C2U

CAT24C08 Ordering Information

Specific

Package

Type

Temperature

Range (Note 12)

Lead

Finish

Device Marking

24C08K

C08K

C08

Device Order Number

CAT24C08WI−G

Shipping

SOIC−8

Industrial

Extended

Industrial

Extended

Industrial

Extended

Industrial

Extended

Industrial

Extended

Industrial

Extended

Industrial

Extended

NiPdAu

N/A

Tube, 100 Units / Tube

CAT24C08WI−GT3

CAT24C08WE−GT3

CAT24C08YI−G

Tape & Reel, 3,000 Units / Reel

Tube, 100 Units / Tube

SOIC−8

TSSOP−8

TDFN−8

CAT24C08YI−GT3

CAT24C08YE−GT3

CAT24C08VP2I−GT3*

CAT24C08VP2E−GT3*

CAT24C08LI−G

Tape & Reel, 3,000 Units / Reel

Tube, 50 Units / Tube

C3T

TDFN−8

24C08K

C3

PDIP−8

CAT24C08LE−G

PDIP−8

Tube, 50 Units / Tube

CAT24C08ZI−GT3

CAT24C08ZE−GT3

CAT24C08C4ATR**

CAT24C08C5ATR**

CAT24C08TDI−GT3

CAT24C08TDE−GT3

CAT24C08HU4I−GT3

CAT24C08HU4E−GT3

MSOP−8

WLCSP−4

WLCSP−5

TSOT−23−5

UDFN8−EP

Tape & Reel, 3,000 Units / Reel

Tape & Reel, 5,000 Units / Reel

Tape & Reel, 3,000 Units / Reel

C3

8

N/A

C3

NiPdAu

C3

C3U

12.Industrial temperature range is −40°C to +85°C and Extended temperature range is −40°C to +125°C.

* The TDFN (VP2) package is not recommended for new designs.

** Contact factory for availability

http://onsemi.com

19

CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16

CAT24C16 Ordering Information

Specific

Package

Type

Temperature

Range (Note 13)

Lead

Finish

Device Marking

24C16K

C16K

C16

Device Order Number

CAT24C16WI−G

Shipping

SOIC−8

Industrial

Extended

Industrial

Extended

Industrial

Extended

Industrial

Extended

Industrial

Extended

Industrial

Extended

NiPdAu

N/A

Tube, 100 Units / Tube

CAT24C16WI−GT3

CAT24C16WE−GT3

CAT24C16YI−G

Tape & Reel, 3,000 Units / Reel

Tube, 100 Units / Tube

SOIC−8

TSSOP−8

TDFN−8

CAT24C16YI−GT3

CAT24C16YE−GT3

CAT24C16VP2I−GT3*

CAT24C16VP2E−GT3*

CAT24C16LI−G

Tape & Reel, 3,000 Units / Reel

Tube, 50 Units / Tube

C4T

TDFN−8

24C16K

C4

PDIP−8

CAT24C16LE−G

PDIP−8

Tube, 50 Units / Tube

CAT24C16ZI−GT3

CAT24C16ZE−GT3

CAT24C16C4ATR**

CAT24C16C5ATR**

CAT24C16TDI−GT3

CAT24C16TDE−GT3

CAT24C16HU4I−GT3

MSOP−8

WLCSP−4

WLCSP−5

TSOT−23−5

UDFN8−EP

Tape & Reel, 3,000 Units / Reel

Tape & Reel, 5,000 Units / Reel

Tape & Reel, 3,000 Units / Reel

C4

6

N/A

C4

NiPdAu

C4

C4U

13.Industrial temperature range is −40°C to +85°C and Extended temperature range is −40°C to +125°C.

14.All packages are RoHS−compliant (Lead−free, Halogen−free).

15.For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

16.For detailed information and a breakdown of device nomenclature and numbering systems, please see the ON Semiconductor Device

Nomenclature document, TND310/D, available at www.onsemi.com

* The TDFN (VP2) package is not recommended for new designs.

** Contact factory for availability

2

ON Semiconductor is licensed by Philips Corporation to carry the I C Bus Protocol.

ON Semiconductor and

are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,

copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC

reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any

particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without

limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications

and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC

does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for

surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where

personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and

its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,

any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture

of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

LITERATURE FULFILLMENT:

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

Europe, Middle East and Africa Technical Support:

Phone: 421 33 790 2910

Japan Customer Focus Center

Phone: 81−3−5817−1050

ON Semiconductor Website: www.onsemi.com

Order Literature: http://www.onsemi.com/orderlit

Literature Distribution Center for ON Semiconductor

P.O. Box 5163, Denver, Colorado 80217 USA

Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada

Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada

Email: orderlit@onsemi.com

For additional information, please contact your local

Sales Representative

CAT24C01/D

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20


型号：	CAT24C16TDI.GT3
厂家：	ONSEMI
描述：	1-Kb, 2-Kb, 4-Kb, 8-Kb and 16-Kb I2C CMOS Serial EEPROM 1 - KB ， 2 - KB， 4 KB ， 8 KB和16 KB的I2C CMOS串行EEPROM 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件：	总20页 (文件大小：215K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

CAT24C16TDI.GT3 [ONSEMI]

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